From patchwork Tue Feb 28 16:47:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657552 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66A8CC64ED6 for ; Tue, 28 Feb 2023 16:48:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229831AbjB1Qss (ORCPT ); Tue, 28 Feb 2023 11:48:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39488 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229811AbjB1Qsl (ORCPT ); Tue, 28 Feb 2023 11:48:41 -0500 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D6B01EC72 for ; Tue, 28 Feb 2023 08:48:10 -0800 (PST) Received: by mail-pj1-x102a.google.com with SMTP id m8-20020a17090a4d8800b002377bced051so14376063pjh.0 for ; Tue, 28 Feb 2023 08:48:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Idewr/c6anuiFZ8W+ANFStw5VD2DBWot5T+luCDLkeE=; b=HaEDfnx9/yzRqav9tJjlQHDYW4Aqn7/xGfokNxMrpyWPm661fo87bSmbc3jTGwGJkg 5KKX0H21UMvVlnT3IH50T5kUjKwG/vdQUJEqmXMcxYcYKv975/3A3t3QKo4KndgFVVVX Mk+boSqvyHOqYJX1nopulRW5/KQJXAkc8krfofbZmYxDQjmYV21Wh35o0aQlGxVvNY0+ vq28EPjvWvULxyqLSXuV852Ib02Fwj6iG2WILIh5KZNBPVrU4qnAFhbeA2swWzgH9uXV 25B2sAtPW8MHNU0k1joa4ok13CRc0MBbjPeTbio6ogEwtPG+d4H6yPQf3s8pTXqzFUAq Zy9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Idewr/c6anuiFZ8W+ANFStw5VD2DBWot5T+luCDLkeE=; b=04K/4NFJ19ksQHb0lhJVIYelbVvLgIynMjluZYs/ZS2bNqtv+zviCzu65InG+Oym1g y/1x5DwyN+GFwbbozKkCCJdodZjxT5joUE9hVSwQwdRkQ1XytTjmaO66LEQUuCBWb0lL kHltcDWOuItaLCjhpAzxiL0hCKuW41vlU7F6j20hB+YmC2F28KaNkcXkGlqSklXYABq2 xzwB0ghr4rmm0zIUjxQj3RoK6DeycEKUT6Jqh3RpcRBeNdEZK2vGpquY4SsTDITKtp4y rbsixN3xuovzDEtxj3tnEaeK39Ftjka75lzvWiccqSeiDkHFGzzh6z3cX3UfGrSkUEnm LXpw== X-Gm-Message-State: AO0yUKU1ujiSpPnyGUD/btkl2pfcBvjYFg8ZZNoUEHNZGChRWwLU6u7B +DljmjhEInBGofwkxlVGf0aP X-Google-Smtp-Source: AK7set8C0QfAqgl3jK8W5EJAII6wqS0FLRKYLHd/U6ullJGd+tsVTYAtVh8gl1PnzfvnOs0fFCJatA== X-Received: by 2002:a05:6a20:3947:b0:cd:fe1b:df8 with SMTP id r7-20020a056a20394700b000cdfe1b0df8mr1489022pzg.56.1677602890307; Tue, 28 Feb 2023 08:48:10 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:09 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 01/16] arm64: dts: qcom: sdm845: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:37 +0530 Message-Id: <20230228164752.55682-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 42ad231338c1 ("arm64: dts: qcom: sdm845: Add second PCIe PHY and controller") Fixes: 5c538e09cb19 ("arm64: dts: qcom: sdm845: Add first PCIe controller and PHY") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 479859bd8ab3..1c060ea960ff 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2292,8 +2292,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0xd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>; interrupts = ; interrupt-names = "msi"; @@ -2397,7 +2397,7 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ; From patchwork Tue Feb 28 16:47:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75D0EC6FA8E for ; Tue, 28 Feb 2023 16:48:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229842AbjB1Qs6 (ORCPT ); Tue, 28 Feb 2023 11:48:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229835AbjB1Qsv (ORCPT ); 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Tue, 28 Feb 2023 08:48:17 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 03/16] arm64: dts: qcom: sc7280: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:39 +0530 Message-Id: <20230228164752.55682-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address (0x40200000) specified in the ranges property for I/O region. Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index bdcb74925313..99845c79a8c4 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2077,7 +2077,7 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ; From patchwork Tue Feb 28 16:47:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657550 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2026CC6FA8E for ; Tue, 28 Feb 2023 16:49:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229898AbjB1QtF (ORCPT ); Tue, 28 Feb 2023 11:49:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229874AbjB1Qs6 (ORCPT ); Tue, 28 Feb 2023 11:48:58 -0500 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AEAE16320 for ; Tue, 28 Feb 2023 08:48:26 -0800 (PST) Received: by mail-pj1-x1034.google.com with SMTP id k21-20020a17090aaa1500b002376652e160so10257553pjq.0 for ; Tue, 28 Feb 2023 08:48:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=r06My2aq8Dmvi2FXH5CuaRQfq/pWOq5I+mThml6kdDc=; b=mj566OPk7ImfN/AU68UwLwS5qA/crpftIJk2+zaV8GZTqW8IFG//ePMocyMW9k8GnS XfLU8xG6R2UAhEX6/L6N1ykaHb2sYKFYIF/e5BnXnaU+YTcJ8Qazzcx6MIvvbcbAYD6G xR3mSPoN8H1kKpOqTlZOhkyPw1KXMSH+Hwwsp9iKwwHgeXb1wX7HIUuCY6dCuQWYHUUU tv7fvJelkiCfhP35GeDxuacaUIaaiQDkNe3i1MvaOgjpwc1VwHHTeDaK3Ckcjq1BCdOn cWuVaLdJUXsvRaT8AWqlKKUkF60U102BruutjXO0rMDs2fUJ6M0QA0XioDi30hBuGdsM N9kA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=r06My2aq8Dmvi2FXH5CuaRQfq/pWOq5I+mThml6kdDc=; b=jOSPo6gIlZ2mg4ckwI6lg410s5rU+kUjmgu805vsQIIHYibR8TzPnpMZdhMXe3ZrU6 HnG5n11fGxqaaKZUhv0wnxdrFGAm4TEJ7+VXq7G2WEyMRgyoKKXpopzJSTjbaJT8un6O pCctlrjlF8gLsQYfQsQzUv+IOAVu/5Ijn+DTF2lrr5wCKf/Da063dRfbJMvETMFu4Obi TGcGIMy5G0Z3felDp0u/HJxmxUytMi5P6LJMBrVJfC2zAJt1pRG+fH8WREEp9IBAaTgu sMWayJKHAsaq8ZXo5n9rMhTxlYewGRo6L2CQE5oTVQwXnyqVQ0meCDJ9nTYpsotzQ5CF qVaw== X-Gm-Message-State: AO0yUKWRSLNeg1FiPJxcZeZGV+dezrWpIKzbzYHX8XzNSETtVYpItjFO Fx1os3J/DoOV9OgjSASvkPyt X-Google-Smtp-Source: AK7set+Pws7ZZnufTrodK1tqCfOTEcN/eJcxq+ShHNx2ZK3FaD/TEbOUdzjnYHB+jasHxMxBOqIBvA== X-Received: by 2002:a05:6a20:a021:b0:cc:32a8:323f with SMTP id p33-20020a056a20a02100b000cc32a8323fmr4660667pzj.38.1677602906022; Tue, 28 Feb 2023 08:48:26 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:25 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 05/16] arm64: dts: qcom: ipq8074: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:41 +0530 Message-Id: <20230228164752.55682-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses (0x10200000, 0x20200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses and align them in a single line. Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 62d05d740646..e8dad3ff4fcc 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -780,10 +780,8 @@ pcie1: pci@10000000 { phys = <&pcie_phy1>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x10200000 0x10200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x10220000 0x10220000 - 0 0xfde0000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */ + <0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */ interrupts = ; interrupt-names = "msi"; @@ -844,10 +842,8 @@ pcie0: pci@20000000 { phys = <&pcie_phy0>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x20200000 0x20200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x20220000 0x20220000 - 0 0xfde0000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */ + <0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */ interrupts = ; interrupt-names = "msi"; From patchwork Tue Feb 28 16:47:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5976C64ED6 for ; Tue, 28 Feb 2023 16:49:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229906AbjB1QtJ (ORCPT ); Tue, 28 Feb 2023 11:49:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229876AbjB1QtH (ORCPT ); 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Tue, 28 Feb 2023 08:48:32 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 07/16] arm64: dts: qcom: msm8996: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:43 +0530 Message-Id: <20230228164752.55682-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x0c200000, 0x0d200000, 0x0e200000) specified in the ranges property for I/O region. While at it, let's also align the entries. Fixes: ed965ef89227 ("arm64: dts: qcom: msm8996: add support to pcie") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 905678e7175d..66af9526c98b 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1851,8 +1851,8 @@ pcie0: pcie@600000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x0c200000 0x0c200000 0x0 0x100000>, - <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>, + <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>; device_type = "pci"; @@ -1905,8 +1905,8 @@ pcie1: pcie@608000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x0d200000 0x0d200000 0x0 0x100000>, - <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>; + ranges = <0x01000000 0x0 0x00000000 0x0d200000 0x0 0x100000>, + <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>; device_type = "pci"; @@ -1956,8 +1956,8 @@ pcie2: pcie@610000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x0e200000 0x0e200000 0x0 0x100000>, - <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0e200000 0x0 0x100000>, + <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>; device_type = "pci"; From patchwork Tue Feb 28 16:47:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657548 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E385C64EC7 for ; Tue, 28 Feb 2023 16:49:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229971AbjB1Qt1 (ORCPT ); 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Tue, 28 Feb 2023 08:48:38 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 09/16] arm64: dts: qcom: qcs404: Use 0x prefix for the PCI I/O and MEM ranges Date: Tue, 28 Feb 2023 22:17:45 +0530 Message-Id: <20230228164752.55682-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org To maintain the uniformity, let's use the 0x prefix for the values of ranges property. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index bc2ed73afb74..42fc33ab8b2e 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1469,8 +1469,8 @@ pcie: pci@10000000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0 0x10003000 0 0x00010000>, /* I/O */ - <0x82000000 0 0x10013000 0x10013000 0 0x007ed000>; /* memory */ + ranges = <0x81000000 0x0 0x00000000 0x10003000 0x0 0x00010000>, /* I/O */ + <0x82000000 0x0 0x10013000 0x10013000 0x0 0x007ed000>; /* memory */ interrupts = ; interrupt-names = "msi"; From patchwork Tue Feb 28 16:47:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D2AAC6FA8E for ; Tue, 28 Feb 2023 16:49:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229964AbjB1Qt3 (ORCPT ); Tue, 28 Feb 2023 11:49:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40388 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229970AbjB1Qt1 (ORCPT ); Tue, 28 Feb 2023 11:49:27 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A73192CC4A for ; Tue, 28 Feb 2023 08:48:46 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id oj5so6496689pjb.5 for ; Tue, 28 Feb 2023 08:48:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2eEMB9s5VCpJlF9KahYvaWlXJSQFG2Rpw7o2twh3Yp4=; b=FQuMVxezTSRZiRV5XbRKPIaYLXP4B1Y3xCIXmpl9/LzT48Rm7keCfUTlCATPIUH/XV mablt9ofSz3ZxMN5qztABjuTS2KLkTpJzsqic3rbJk4Kxye9+sn3GgxmWYUzn5Roq4vP JduDPsRwxCalnhgQbGrqutA8D3d+H5z1E6iDXgKP/z6rjY+MtuA2xmKcNTQ+oA9RtQmN BYWMv/jnzfuwZevBi42gKSn0Jl2Aq06fF/KJ666tgZterkO0ywPkQ6j/WdDdPyh7huZe X56RATdR0zrQYI4fDd1VKTNy8yf1v0vEAQL01FIH2qVrZ84OHyLlijOt+/ot9zu9+uQy u+iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2eEMB9s5VCpJlF9KahYvaWlXJSQFG2Rpw7o2twh3Yp4=; b=TXY9N5WLC7ROF5bSHyzKXrcqRqqlD6hdeyCSkmdne6qkGszE+Z/IbD8HbdMDPwXRbq xs0Sy01yO7VezuGMp2wHbYFjeQSKGJ65g6fQZC6y+pC7qcUVvBi6Xf4NKusOeL+t4MJj 1mccbWlxDNTVury+ABSjJoT/HQCFcVJIr8NO3n93hH23yFDpDzTQnQEI7JTrx7CgVMjO cRwk9qokQ+YPPBeX0tHr1t/gSGxPSv6CXr5eNkRepvvBioUmWforal66YnoYW8t02XCY XQrv5aZqFQSDwWuqy/dP+xkuNbbkzW10QFj2or7gMN2ii51XGjJzS4vT5elw5JOJch4m OwjA== X-Gm-Message-State: AO0yUKX/JtWdLnX8YBy02vM0wFU7Kc2h/RzGpT9v5KMSKEp6yiLGOjwd 3xhNADZx4f8CeGwXQuqxE01N X-Google-Smtp-Source: AK7set9KMqVsd6eMVqwnfYGpkyUkg18ps6Si1zK8tVHG6melJDr4hZN1JceEcyUtYMORaaVKOhU++A== X-Received: by 2002:a05:6a20:431d:b0:bc:8254:ddff with SMTP id h29-20020a056a20431d00b000bc8254ddffmr4842486pzk.1.1677602926154; Tue, 28 Feb 2023 08:48:46 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:45 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 11/16] arm64: dts: qcom: sm8150: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:47 +0530 Message-Id: <20230228164752.55682-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: a1c86c680533 ("arm64: dts: qcom: sm8150: Add PCIe nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..1fabfa05708c 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1799,8 +1799,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; interrupts = ; interrupt-names = "msi"; @@ -1895,7 +1895,7 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ; From patchwork Tue Feb 28 16:47:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657546 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35CD5C64ED6 for ; Tue, 28 Feb 2023 16:49:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229987AbjB1Qtz (ORCPT ); Tue, 28 Feb 2023 11:49:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230018AbjB1Qtx (ORCPT ); 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Tue, 28 Feb 2023 08:48:53 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 13/16] arm64: dts: qcom: sm8350: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:49 +0530 Message-Id: <20230228164752.55682-14-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 6daee40678a0 ("arm64: dts: qcom: sm8350: add PCIe devices") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 1c97e28da6ad..1ca16bfc8988 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1487,8 +1487,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; interrupts = , , @@ -1581,8 +1581,8 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0 0x40200000 0x0 0x100000>, - <0x02000000 0x0 0x40300000 0 0x40300000 0x0 0x1fd00000>; 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Hence, fix the bogus PCI address (0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: 187519403273 ("ARM: dts: ipq4019: Add a few peripheral nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index 02e9ea78405d..1159268f06d7 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -426,8 +426,8 @@ pcie0: pci@40000000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>, - <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>; + ranges = <0x81000000 0x0 0x00000000 0x40200000 0x0 0x00100000>, + <0x82000000 0x0 0x40300000 0x40300000 0x0 0x00d00000>; interrupts = ; interrupt-names = "msi";