From patchwork Thu May 16 02:08:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kugan Vivekanandarajah X-Patchwork-Id: 164315 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp207381ili; Wed, 15 May 2019 19:08:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqybtkAI0CoEZHxn3JnKaeuJAuXEb7opY/808RAX59gAaX25dArSVieMv7ow/ThoBCJg78ec X-Received: by 2002:a17:902:6b:: with SMTP id 98mr47670160pla.271.1557972529093; Wed, 15 May 2019 19:08:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557972529; cv=none; d=google.com; s=arc-20160816; b=WemcJcmA5iDXzQhatNPFNIMlm/Zu5CbwprPRelgY2Iu4ZJ4H6QrMg0ruwDCnOtG+/e Vmp2P2/KWPL+ZAQJNgwdIyJ53gQDAQB7ZKupaJhK2VZ/rjogaPmsQ+lJzMN4qXZlc8gV P8P8uTkru5UFn55IBZccTka45/N9XSBGlFPfkcH5DAMhNqVw8WzPYGObHPHAoV0wloS4 7GJ4ZIxJOUx2xlGKM8JFp6SgScumbUco2kWyYFZtVv7g2GKtvAl7NwAzyXXrsmMCa8/R V3sFrPoL1bih+tyZLcdM+0409u6BMo7/ymfBV0ErEyMXrIyRaQl8KysiVF4MC29LvBu5 PjWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=LVd/56hmH7fdjZPFuLtVQ9zND9C7JYw7Z8nWN0tMbgs=; b=AUyvgA798aXSbKF8bpHJTff581e0jKbc6luA3By6KuslvuKo0mqNorWQd7Fvo7Ffkf E5CQ/v41lz10MtbLYQoaj/8JWPeUx/1ehyPQRsI6L8uihzVBqaaNdUHcLN7y5BWPaPtF EgaDa87ykljgFYAbGe7mK1Sf6KWgwMNqYrnH5LRBorbFTegWX2tC289fYhciKFp/STKy c6qXQOJPgoO26XY3wqLlMEHZG5e/HTYvS9qT7MbZwkJHvpGQXiFAFAc1pUbcTcyTKWMr AHzWASy+sOvoH0j30YfXLgENF/wUxd5F9rIAuUl6Y9dB/Rgqyrf1f5FRO+gE3EGjpGqW N9oA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=IjO2jX7P; dkim=pass header.i=@linaro.org header.s=google header.b=VnLlFeJO; spf=pass (google.com: domain of gcc-patches-return-500848-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-500848-patch=linaro.org@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id u5si3502749pgc.472.2019.05.15.19.08.48 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 May 2019 19:08:49 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-500848-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=IjO2jX7P; dkim=pass header.i=@linaro.org header.s=google header.b=VnLlFeJO; spf=pass (google.com: domain of gcc-patches-return-500848-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-500848-patch=linaro.org@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=YzOscL7w5u0xdneegbwnjeej87vi0Mw4NmyB034q0dLPNea7nFKcp rwTroBGFJqzQLXwnP8iDIxaAAmAkL1DJN5lDYJv6GFW4WWEJguYeezep4qtmy2jB kcMsRhU94O66KKf/fkbsXN2hzclw/Kaxv8SmqWaVcUuDuvfhqvhFIk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=GVOdYkA4FSy7O0w8YdONnu/Yg+A=; b=IjO2jX7Pj+QvRoOTi50d tRCaWU5KKS1Zwt+60i57DOisGMHlQ+1JTqCNtuZvSpDYzDYwWM9Tkw9phJRzg6zY 5HgjgPkFxJI/XobKr/s75v5tDvmgk6WLWdStJjWxHIBGJ3QZR7Dsr5Z3c7zXL5GF cGJejKPvGdTHlOVxDoiAWvY= Received: (qmail 71435 invoked by alias); 16 May 2019 02:08:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 71363 invoked by uid 89); 16 May 2019 02:08:28 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-22.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=HX-Received:8ec4, H*RU:209.85.214.196, HX-Spam-Relays-External:209.85.214.196, H*r:sk:mail-pl X-HELO: mail-pl1-f196.google.com Received: from mail-pl1-f196.google.com (HELO mail-pl1-f196.google.com) (209.85.214.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 16 May 2019 02:08:26 +0000 Received: by mail-pl1-f196.google.com with SMTP id g9so776362plm.6 for ; Wed, 15 May 2019 19:08:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LVd/56hmH7fdjZPFuLtVQ9zND9C7JYw7Z8nWN0tMbgs=; b=VnLlFeJOfYPNNLbcbk0m7fGW+XjYBN81at8wapI3Y1h+bsEqtuJv93v532Phx327PV 3V0/Kt9vNBawzaFuMSsY3kWTFJLZGPGwPF54VfFDnlmwalVCs64vvdMuM8xpbb6OScbP TwahXWhpSCv52yv9s29iNHUbSaCgFDQQPwP5AElrZ72RHP/YZXHg92Na5cW1cUwuf3H+ SSotkvUkVwRuoCZd84OOhMawa6UGdeuGdU47tJMNCrAXB36UK1ZCfp4rKz0yFvdfFdpb G3vYn2gE4Ya1gfNzKl5IHBRj3sbjRLiB//NIGFjXNxzFJPbFxjuj3N35em300aPavVRI NSAQ== Return-Path: Received: from localhost.localdomain (203-219-253-77.static.tpgi.com.au. [203.219.253.77]) by smtp.gmail.com with ESMTPSA id w6sm3827266pge.30.2019.05.15.19.08.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 May 2019 19:08:23 -0700 (PDT) From: kugan.vivekanandarajah@linaro.org To: gcc-patches@gcc.gnu.org Cc: Kugan Vivekanandarajah Subject: [PATCH 1/2] [PR88836][aarch64] Set CC_REGNUM instead of clobber Date: Thu, 16 May 2019 12:08:03 +1000 Message-Id: <1557972484-24599-2-git-send-email-kugan.vivekanandarajah@linaro.org> In-Reply-To: <1557972484-24599-1-git-send-email-kugan.vivekanandarajah@linaro.org> References: <1557972484-24599-1-git-send-email-kugan.vivekanandarajah@linaro.org> X-IsSubscribed: yes From: Kugan Vivekanandarajah For aarch64 sve while_ult pattern, Set CC_REGNUM instead of clobbering. gcc/ChangeLog: 2019-05-16 Kugan Vivekanandarajah PR target/88834 * config/aarch64/aarch64-sve.md (while_ult): Set CC_REGNUM instead of clobbering. Change-Id: I96f16b8f81140fb4a6897d31d427c62bcc1e7997 --- gcc/config/aarch64/aarch64-sve.md | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 3f39c4c..a18eb80 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -1331,13 +1331,18 @@ ) ;; Set element I of the result if operand1 + J < operand2 for all J in [0, I]. -;; with the comparison being unsigned. +;; with the comparison being unsigned. Als set CC_REFNUM with the flags. (define_insn "while_ult" [(set (match_operand:PRED_ALL 0 "register_operand" "=Upa") (unspec:PRED_ALL [(match_operand:GPI 1 "aarch64_reg_or_zero" "rZ") (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")] UNSPEC_WHILE_LO)) - (clobber (reg:CC CC_REGNUM))] + (set (reg:CC CC_REGNUM) + (compare:CC + (unspec:SI [(vec_duplicate:PRED_ALL (const_int 1)) + (match_dup 0)] + UNSPEC_PTEST_PTRUE) + (const_int 0)))] "TARGET_SVE" "whilelo\t%0., %1, %2" ) From patchwork Thu May 16 02:08:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kugan Vivekanandarajah X-Patchwork-Id: 164316 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp207547ili; Wed, 15 May 2019 19:09:02 -0700 (PDT) X-Google-Smtp-Source: APXvYqzF1F3KBBNnWVrPd39n+MSGMEyS34QsSQWYwWPL3/cD+C6nQA0aDhsHRGIyMYqW4vP+YVLK X-Received: by 2002:a17:902:be09:: with SMTP id r9mr47527859pls.215.1557972542024; Wed, 15 May 2019 19:09:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557972542; cv=none; d=google.com; s=arc-20160816; b=BMnmy3l8xEJZZZBE9f35TVsyUtsyTZcPB6btzxechKadDjY1KVbGa9/oCjyc7HXozl hXCIuw4r+nKZPLfaQEQM7eKTJ5brgZULE4+mXUkYZ4BYxHcKsYFg/cQ2VkiXYwxwnx9x Li7fD1p1dyGqtxgXsy/U1ZprZ9Yv82QKGpykjYKCvGMn+4CPveYnMGSZ7X/2j6GSOp2f 0RDVtawHj1MYZXdH/0PppFQ/N1+8jRJ39etvOS6Y5o5g3ICEIlpPdWIfzHmL9rtistm8 2Sjqe4j37R9eDybh5wdGDCUm/NFWp6QFCvQB7UCVCN1MKXGBcOocsNvD+zfLasK9qWf6 nG6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=pU7pL+rnfRRZs2kGV7vpI6cLw1hR5KaB845wgx+Zuq4=; b=TP39KabKtACH5Mq0nowfnZSO4E1XJLjyomUGTwDGTM1/+cxOJC2vFYUD1QBuYyTnJz 7JqhlypGSbiemFPyO6Jcu3p+UVwufRUYoU2b8nxIzM+JYyJfFvlbkcLkR5xg6k0bLBKc nVzUjTZd1AQFXOYc12zQrYeZGGt0J6zewMYEBMwfWiSec9NCOgX/NFHbh9V7VXgO7wE2 fyRPKK09lAW40/fXQp3h3Q5rS6nHrBTgGQpbq4mvvkJlZIAkbVpZ+J9sz59NX/wtyXDx WvSD3UgjfvaJPrzckl4hRKnfdMKIhkBa2Bv4Nf8O9e1RrLI+MAaTrUAYfhGq1DfSDLet G+CA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=JUS9i7zC; dkim=pass header.i=@linaro.org header.s=google header.b=HWznyh0F; spf=pass (google.com: domain of gcc-patches-return-500849-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-500849-patch=linaro.org@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from sourceware.org (server1.sourceware.org. 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[203.219.253.77]) by smtp.gmail.com with ESMTPSA id w6sm3827266pge.30.2019.05.15.19.08.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 May 2019 19:08:34 -0700 (PDT) From: kugan.vivekanandarajah@linaro.org To: gcc-patches@gcc.gnu.org Cc: Kugan Vivekanandarajah Subject: [PATCH 2/2] [PR88836][aarch64] Fix CSE to process parallel rtx dest one by one Date: Thu, 16 May 2019 12:08:04 +1000 Message-Id: <1557972484-24599-3-git-send-email-kugan.vivekanandarajah@linaro.org> In-Reply-To: <1557972484-24599-1-git-send-email-kugan.vivekanandarajah@linaro.org> References: <1557972484-24599-1-git-send-email-kugan.vivekanandarajah@linaro.org> X-IsSubscribed: yes From: Kugan Vivekanandarajah This patch changes cse_insn to process parallel rtx one by one such that any destination rtx in cse list is invalidated before processing the next. gcc/ChangeLog: 2019-05-16 Kugan Vivekanandarajah PR target/88834 * cse.c (safe_hash): Handle VEC_DUPLICATE. (exp_equiv_p): Likewise. (hash_rtx_cb): Change to accept const_rtx. (struct set): Add field to record if uses of dest is invalidated. (cse_insn): For parallel rtx, invalidate register set by first rtx before processing the next. gcc/testsuite/ChangeLog: 2019-05-16 Kugan Vivekanandarajah PR target/88834 * gcc.target/aarch64/pr88834.c: New test. Change-Id: I7c3a61f034128f38abe0c2b7dab5d81dec28146c --- gcc/cse.c | 67 ++++++++++++++++++++++++++---- gcc/testsuite/gcc.target/aarch64/pr88836.c | 14 +++++++ 2 files changed, 73 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr88836.c -- 2.7.4 diff --git a/gcc/cse.c b/gcc/cse.c index 6c9cda1..9dc31f5 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -570,7 +570,7 @@ static void invalidate_for_call (void); static rtx use_related_value (rtx, struct table_elt *); static inline unsigned canon_hash (rtx, machine_mode); -static inline unsigned safe_hash (rtx, machine_mode); +static inline unsigned safe_hash (const_rtx, machine_mode); static inline unsigned hash_rtx_string (const char *); static rtx canon_reg (rtx, rtx_insn *); @@ -2369,6 +2369,11 @@ hash_rtx_cb (const_rtx x, machine_mode mode, hash += fixed_hash (CONST_FIXED_VALUE (x)); return hash; + case VEC_DUPLICATE: + return hash_rtx_cb (XEXP (x, 0), VOIDmode, + do_not_record_p, hash_arg_in_memory_p, + have_reg_qty, cb); + case CONST_VECTOR: { int units; @@ -2599,7 +2604,7 @@ canon_hash (rtx x, machine_mode mode) and hash_arg_in_memory are not changed. */ static inline unsigned -safe_hash (rtx x, machine_mode mode) +safe_hash (const_rtx x, machine_mode mode) { int dummy_do_not_record; return hash_rtx (x, mode, &dummy_do_not_record, NULL, true); @@ -2630,6 +2635,16 @@ exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse) return x == y; code = GET_CODE (x); + if ((code == CONST_VECTOR && GET_CODE (y) == VEC_DUPLICATE) + || (code == VEC_DUPLICATE && GET_CODE (y) == CONST_VECTOR)) + { + if (code == VEC_DUPLICATE) + std::swap (x, y); + if (const_vector_encoded_nelts (x) != 1) + return 0; + return exp_equiv_p (CONST_VECTOR_ENCODED_ELT (x, 0), XEXP (y, 0), + validate, for_gcse); + } if (code != GET_CODE (y)) return 0; @@ -4192,7 +4207,8 @@ struct set char src_in_memory; /* Nonzero if the SET_SRC contains something whose value cannot be predicted and understood. */ - char src_volatile; + char src_volatile : 1; + char invalidate_dest_p : 1; /* Original machine mode, in case it becomes a CONST_INT. The size of this field should match the size of the mode field of struct rtx_def (see rtl.h). */ @@ -4639,7 +4655,7 @@ cse_insn (rtx_insn *insn) for (i = 0; i < n_sets; i++) { bool repeat = false; - bool mem_noop_insn = false; + bool noop_insn = false; rtx src, dest; rtx src_folded; struct table_elt *elt = 0, *p; @@ -4736,6 +4752,7 @@ cse_insn (rtx_insn *insn) sets[i].src = src; sets[i].src_hash = HASH (src, mode); sets[i].src_volatile = do_not_record; + sets[i].invalidate_dest_p = 1; sets[i].src_in_memory = hash_arg_in_memory; /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is @@ -5365,7 +5382,7 @@ cse_insn (rtx_insn *insn) || insn_nothrow_p (insn))) { SET_SRC (sets[i].rtl) = trial; - mem_noop_insn = true; + noop_insn = true; break; } @@ -5418,6 +5435,19 @@ cse_insn (rtx_insn *insn) src_folded_cost = constant_pool_entries_cost; src_folded_regcost = constant_pool_entries_regcost; } + else if (n_sets == 1 + && REG_P (trial) + && REG_P (SET_DEST (sets[i].rtl)) + && GET_MODE_CLASS (mode) == MODE_CC + && REGNO (trial) == REGNO (SET_DEST (sets[i].rtl)) + && !side_effects_p (dest) + && (cfun->can_delete_dead_exceptions + || insn_nothrow_p (insn))) + { + SET_SRC (sets[i].rtl) = trial; + noop_insn = true; + break; + } } /* If we changed the insn too much, handle this set from scratch. */ @@ -5588,7 +5618,7 @@ cse_insn (rtx_insn *insn) } /* Similarly for no-op MEM moves. */ - else if (mem_noop_insn) + else if (noop_insn) { if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn)) cse_cfg_altered = true; @@ -5760,6 +5790,26 @@ cse_insn (rtx_insn *insn) } elt = insert (src, classp, sets[i].src_hash, mode); elt->in_memory = sets[i].src_in_memory; + + if (REG_P (dest) + && ! reg_mentioned_p (dest, src)) + { + sets[i].invalidate_dest_p = 0; + unsigned int regno = REGNO (dest); + unsigned int endregno = END_REGNO (dest); + unsigned int j; + + for (j = regno; j < endregno; j++) + { + if (REG_IN_TABLE (j) >= 0) + { + remove_invalid_refs (j); + REG_IN_TABLE (j) = -1; + } + } + invalidate (dest, VOIDmode); + } + /* If inline asm has any clobbers, ensure we only reuse existing inline asms and never try to put the ASM_OPERANDS into an insn that isn't inline asm. */ @@ -5853,7 +5903,8 @@ cse_insn (rtx_insn *insn) previous quantity's chain. Needed for memory if this is a nonvarying address, unless we have just done an invalidate_memory that covers even those. */ - if (REG_P (dest) || GET_CODE (dest) == SUBREG) + if ((REG_P (dest) || GET_CODE (dest) == SUBREG) + && sets[i].invalidate_dest_p) invalidate (dest, VOIDmode); else if (MEM_P (dest)) invalidate (dest, VOIDmode); @@ -5887,7 +5938,7 @@ cse_insn (rtx_insn *insn) if (!REG_P (x)) mention_regs (x); - else + else if (sets[i].invalidate_dest_p) { /* We used to rely on all references to a register becoming inaccessible when a register changes to a new quantity, diff --git a/gcc/testsuite/gcc.target/aarch64/pr88836.c b/gcc/testsuite/gcc.target/aarch64/pr88836.c new file mode 100644 index 0000000..442e8a7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr88836.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-S -O3 -march=armv8.2-a+sve" } */ + +void +f (int *restrict x, int *restrict y, int *restrict z, int n) +{ + for (int i = 0; i < n; i += 2) + { + x[i] = y[i] + z[i]; + x[i + 1] = y[i + 1] - z[i + 1]; + } +} + +/* { dg-final { scan-assembler-times {ptest} 0 } } */