From patchwork Wed Mar 29 19:17:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 668184 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93437C77B61 for ; Wed, 29 Mar 2023 19:17:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230236AbjC2TRu (ORCPT ); Wed, 29 Mar 2023 15:17:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230225AbjC2TRt (ORCPT ); Wed, 29 Mar 2023 15:17:49 -0400 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69CA26A44 for ; Wed, 29 Mar 2023 12:17:39 -0700 (PDT) Received: by mail-lj1-x231.google.com with SMTP id by8so17242938ljb.12 for ; Wed, 29 Mar 2023 12:17:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680117457; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=i75VT9iHv+RQumVifxqdOqhI73icvNqP22fPvcEQdoU=; b=ubhALSethZ3f57tX9OLKfXZrI7UmEbjyqygzC9f/0RoaLeA0fadM8d/iX861w3RGtM 6M2Xp8CTCtvrKlSDSqfuDmvH+eSQaoDxSQkfWdQ8S+CWQJ1O8FmR22mleoW1CBDxHrzU mWQ+qj6i/aft5e7XlmFuLW8kFRmtJHkyMdZeZ7KidKSWkMWp4cqc+psqRjfbE5rJTj78 BI1qjAf1GORpcZ+AXr5e3vfJrwYhtWw/hCOKso5L1qDvlDAQ9Moasxs8DyI4QjWleIzX ht2kkmk+DbRqlzMDmJMCQOm/ty+uKB2i9nBlkCM76D9yAeKlMC0Uof+CcDkDmmgWA+/X Dv+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680117457; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=i75VT9iHv+RQumVifxqdOqhI73icvNqP22fPvcEQdoU=; b=CXqZi6O8/glLJ6nJq3XZ9/gBgHg0HJD6HZJ/S4gjPlSI0X11Sdf9Lc0aHCtxBWXI/d smCHAlsKTyTVS85JCV4KXLKETNOkn4k82LhqBhDbTD10imxlbmmWbWT9WSL3Ha6ogAaH +Da3+t10qSwbUtLnFw08TcymubFE+DdKkgCXWxvZlXKCGGO8JJ3d+47uYMYA3YAclsFb OdpsWh850oy9dSW7MztkRr3cYonqxsDbUDe5Rk+HmFYGXngZDQjqvQFt0Jp5e9oM0cdO e5FboDmHjkENHYxRD3/ZUzcNGEL20bLsraJ/7XeRVQFmWcpQrYXfpgr1zfyDXzRKgZ+G AxxA== X-Gm-Message-State: AAQBX9fRQSvG4iQBE+tDKvRnAe/ego20TKr0FpTuHHrpDnhxTDXjS4IW zzmqLnH9CS7678pGbh2FuB+lQg== X-Google-Smtp-Source: AKy350ZfvqbkKUbInO2LPR9pxLn1EXDL65EJxZnE6SDdRR8dw4JsDXmbGJXMSH4xzaiqosqmIyGTEg== X-Received: by 2002:a2e:9c04:0:b0:29e:e7b1:1202 with SMTP id s4-20020a2e9c04000000b0029ee7b11202mr5746591lji.43.1680117457657; Wed, 29 Mar 2023 12:17:37 -0700 (PDT) Received: from [192.168.1.101] (abxj225.neoplus.adsl.tpnet.pl. [83.9.3.225]) by smtp.gmail.com with ESMTPSA id f4-20020a2e3804000000b0029ad1fc89b3sm5189658lja.60.2023.03.29.12.17.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 12:17:37 -0700 (PDT) From: Konrad Dybcio Date: Wed, 29 Mar 2023 21:17:28 +0200 Subject: [PATCH 1/4] arm64: dts: qcom: msm8998: Improve GPU OPP table MIME-Version: 1.0 Message-Id: <20230329-topic-adreno_opp-v1-1-24d34ac6f007@linaro.org> References: <20230329-topic-adreno_opp-v1-0-24d34ac6f007@linaro.org> In-Reply-To: <20230329-topic-adreno_opp-v1-0-24d34ac6f007@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno , Jordan Crouse , Srinivas Kandagatla , Vivek Gautam , Vinod Koul , Rob Clark , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1680117452; l=3231; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=BuTOgjCT81kJFbrqBabPtOTaRvqV7WCYi0kTMwbrGyM=; b=sIueiwaBv29WZYicIP/gR6f1I5FJrtIi4R/EoqLoj5R6f4Cpwk3nADWHqIKjdyJsZQNZ5nsG2rgH BOk3yWWuDdxPFGzt0xsYbCEE08QXV0aCsCc9Zw/ZrDReYpsf8AdS X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a newline before the first OPP subnode, remove useless opp-supported-hw (there's only a single speed bin anyway) and replace opp-level with required-opps to make sure the power domain level is actually set, as opp-level is not the right property for this.. Furthermore, correct the levels that were incorrect before (confirmed against downstream). Round off frequencies that had uneven fluff on the last two digits. To top if off, leave a note that we should really be scaling the VDD GFX power domain coming from CPR4, which is not yet supported. Scaling MX is still very important though and can be considered valid for the time being - it's better if we scale at one of two voltage rails than if we scaled none.. Fixes: 87cd46d68aea ("arm64: dts: qcom: msm8998: Configure Adreno GPU and related IOMMU") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 39 +++++++++++++++-------------------- 1 file changed, 17 insertions(+), 22 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 09b222f363c2..11952f9ed9ae 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -1396,51 +1396,46 @@ adreno_gpu: gpu@5000000 { interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>; iommus = <&adreno_smmu 0>; operating-points-v2 = <&gpu_opp_table>; + /* TODO: also scale VDDGFX with CPR4 */ power-domains = <&rpmpd MSM8998_VDDMX>; status = "disabled"; gpu_opp_table: opp-table { compatible = "operating-points-v2"; - opp-710000097 { - opp-hz = /bits/ 64 <710000097>; - opp-level = ; - opp-supported-hw = <0xff>; + + opp-710000000 { + opp-hz = /bits/ 64 <710000000>; + required-opps = <&rpmpd_opp_turbo>; }; - opp-670000048 { - opp-hz = /bits/ 64 <670000048>; - opp-level = ; - opp-supported-hw = <0xff>; + opp-670000000 { + opp-hz = /bits/ 64 <670000000>; + required-opps = <&rpmpd_opp_turbo>; }; - opp-596000097 { - opp-hz = /bits/ 64 <596000097>; - opp-level = ; - opp-supported-hw = <0xff>; + opp-596000000 { + opp-hz = /bits/ 64 <596000000>; + required-opps = <&rpmpd_opp_nom>; }; - opp-515000097 { - opp-hz = /bits/ 64 <515000097>; - opp-level = ; - opp-supported-hw = <0xff>; + opp-515000000 { + opp-hz = /bits/ 64 <515000000>; + required-opps = <&rpmpd_opp_nom>; }; opp-414000000 { opp-hz = /bits/ 64 <414000000>; - opp-level = ; - opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_svs>; }; opp-342000000 { opp-hz = /bits/ 64 <342000000>; - opp-level = ; - opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_svs>; }; opp-257000000 { opp-hz = /bits/ 64 <257000000>; - opp-level = ; - opp-supported-hw = <0xff>; + required-opps = <&rpmpd_opp_svs>; }; }; }; From patchwork Wed Mar 29 19:17:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 669005 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20BBDC77B6D for ; Wed, 29 Mar 2023 19:17:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230256AbjC2TRx (ORCPT ); Wed, 29 Mar 2023 15:17:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230250AbjC2TRv (ORCPT ); Wed, 29 Mar 2023 15:17:51 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D52FD6A7F for ; Wed, 29 Mar 2023 12:17:40 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id x20so17258923ljq.9 for ; Wed, 29 Mar 2023 12:17:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680117459; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=FkAai3XhfiUPRhW3jICgZ5p+Oa8ltVSaTnDmaflq7J0=; b=h2ZHVxfVjRCAHLr2IjDjiLbFb1+cBIYfc9aUZq26bTziEOKuyjCvaNzR21aZpshJhl 0z+e7glfFGvqF5p1LyX266gHOECuCV5VIl8TpbA4Oe8pAU5FbdZKGj6YslqmUY6Vg72s gKagz4V0V3xNGEt73Zy5sk27tYRs8YmoqdEd54ibxlMgObc3z6UExRkmb2jFdYoE9128 E2Y+oCYj7e5VUy+PzyI4bp46j+blfd8pFoQllSitaF4g5rFfndNK6koBJtEsmudItEHf a2n+1CHR+0H0+PKkD4mHX9B3DOK9+MuwcJI5XLl0ylGSY4Ca5TmOm8M0sy7eqw+6exWd 6fZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680117459; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FkAai3XhfiUPRhW3jICgZ5p+Oa8ltVSaTnDmaflq7J0=; b=U0j1aPTkntCX8f3VInlnJI2cvLZ+IoQr/K7yF5M7FVO3R4DNVkKaHX6fZGN0iBDtYq Zo8esShw5OygqGTeHiyGMQPnOspvUoUJH9s5KUsA0L2RF5G6N4Yu+Kv9g6EGfrkW7IJB hklPpNYBeqNYDtnas82xeGG198KReF1yFDHf9MGYl+VBH5bSpMH7DMJz3BBZW5xQ3s7M cM25rOV8iQXiXQnP7M8YRi+HXoe783vX9/7QRx1DQ09puBBNbOk+vBLAEOXrV+HALVjK VWBWQEol7aZ0S1l/YhudICfjr6TBduajTWNKaRd4JaaaHf0tcEy5RrRT6B2aVWXMzSKV OiAg== X-Gm-Message-State: AAQBX9czB1NTKM6ywQQPfSvq7LD+ydTkY6Lzhko9Zb5vXqkah5q9urtz Q7KuvTI4LFwYpeFhHpEVwJM0EA== X-Google-Smtp-Source: AKy350Y6N2QBFcszpreUAjNB5vbbYZ/x8V1DIVwJGSTWXjpolHT7cCqcTY4tZvENYdTB90Nj9ksMAQ== X-Received: by 2002:a2e:6e16:0:b0:2a6:1682:3a1e with SMTP id j22-20020a2e6e16000000b002a616823a1emr107837ljc.31.1680117458981; Wed, 29 Mar 2023 12:17:38 -0700 (PDT) Received: from [192.168.1.101] (abxj225.neoplus.adsl.tpnet.pl. [83.9.3.225]) by smtp.gmail.com with ESMTPSA id f4-20020a2e3804000000b0029ad1fc89b3sm5189658lja.60.2023.03.29.12.17.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 12:17:38 -0700 (PDT) From: Konrad Dybcio Date: Wed, 29 Mar 2023 21:17:29 +0200 Subject: [PATCH 2/4] arm64: dts: qcom: msm8996: Pass VDDMX to gpu in power-domains MIME-Version: 1.0 Message-Id: <20230329-topic-adreno_opp-v1-2-24d34ac6f007@linaro.org> References: <20230329-topic-adreno_opp-v1-0-24d34ac6f007@linaro.org> In-Reply-To: <20230329-topic-adreno_opp-v1-0-24d34ac6f007@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno , Jordan Crouse , Srinivas Kandagatla , Vivek Gautam , Vinod Koul , Rob Clark , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1680117452; l=1874; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=B4c/XI1szXxzRjFxiQx3VjZCHnPxGxqsOILu9llcN2Y=; b=Zs9LksiWRztnXYtI4O3NfXHgKmEahbtvCpXjg3ZG98cB1u4HUyqw+s4VmKtPstHhnnUov1foxpUk RR4OCGrFDyd3G9norJZwh8qiAX82Ny9DXokCHV9hL/kqR5rGpXms X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Since power-domains is used for perf_level pm_genpd scaling, it's only fitting that we pass a power domain that's actually supposed to be scaled (and not only turned on/off) to the GPU. While we don't quite support CPR3 yet, the next best thing we can do is pass VDDMX, so that we're at least guaranteed a reasonable vote on the memory side of things. Do so and leave a note mentioning CPR3 PD should be used here instead when support is added. Fixes: 69cc3114ab0f ("arm64: dts: Add Adreno GPU definitions") Fixes: 3f65d51e9e22 ("arm64: dts: qcom: msm8996: Make GPU node control GPU_GX GDSC") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 4661a556772e..4dd37f72e018 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1228,7 +1228,8 @@ gpu: gpu@b00000 { interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>; interconnect-names = "gfx-mem"; - power-domains = <&mmcc GPU_GX_GDSC>; + /* TODO: also scale VDDGFX with CPR3 */ + power-domains = <&rpmpd MSM8996_VDDMX>; iommus = <&adreno_smmu 0>; nvmem-cells = <&speedbin_efuse>; @@ -2254,7 +2255,13 @@ adreno_smmu: iommu@b40000 { <&mmcc GPU_AHB_CLK>; clock-names = "bus", "iface"; - power-domains = <&mmcc GPU_GDSC>; + /* + * We need both GPU_GDSC and GPU_GX_GDSC to be on, but the + * power-domains entry under gpu is occupied by the scaled + * voltage domain. Since GPU_GDSC is a parent of GX_GDSC, + * we can simply pass GX here to turn them both on! + */ + power-domains = <&mmcc GPU_GX_GDSC>; }; venus: video-codec@c00000 { From patchwork Wed Mar 29 19:17:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 668183 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D4B5C761AF for ; Wed, 29 Mar 2023 19:17:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230313AbjC2TR6 (ORCPT ); Wed, 29 Mar 2023 15:17:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230264AbjC2TRw (ORCPT ); Wed, 29 Mar 2023 15:17:52 -0400 Received: from mail-lj1-x22f.google.com (mail-lj1-x22f.google.com [IPv6:2a00:1450:4864:20::22f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A6F96A7B for ; Wed, 29 Mar 2023 12:17:42 -0700 (PDT) Received: by mail-lj1-x22f.google.com with SMTP id e21so17285133ljn.7 for ; Wed, 29 Mar 2023 12:17:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680117460; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ViLPrFFT9b2xN8fTsQ82odoC+1YzAduaFKgrDzgE2N4=; b=TmKvhDjGEbK7ITJhW4r6/CTbtHiKWtyrpJPDMJwZfFyX6EHkUEH5D1grLtTGdkKJ7/ EkhzYL0LV6JbuuJYpYRUdlUcu/kW3v0sPj6tmd5ou3BTMw9P8xTsykZnO+V9hEACebCe reln6sZ0oY9x39Oz4CZ6M1Sh15TFl/cdMBHwm38w7Whspxk5VUxX4+bYObs7joy2pzEr s7ftr0VJsp5dXO+SmotjZnrTzRjPkOj1K4U/DumWZhGG/cZCBfj0z5yZSAd0Qw4kW+Sk qZHHWgW4C0zDgQkL9luC96KruGbBlpb/nLiB0Cd1Hv/WSmfgVCwMwp/peokhgXlthW77 MpPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680117460; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ViLPrFFT9b2xN8fTsQ82odoC+1YzAduaFKgrDzgE2N4=; b=tlH/rzHm4O0pZfHMkjr2C1nfL2qdApS42DcVgMLpxK9p6aC067BkzLuuzHB4QQXCph nPV8DrR4AHzfafM9v76l+rtSpZjDuS8TY+3kfsfobmu4GqpDGFfJ+bhP+szkutQN7pFQ +aw29fEFYv8BJNLPSNXIpEKtbCrHfK8mAXHoTRGiNxiOPzbZOp1sjDQ0FtGLsMA9St4o 49+ygaD7xAJI3WdgA4AdWJDbyuDqMA3Iedc4H+wChofad8X8eYVe6xLwSOyL4HVE87n5 f6BNBuyhVNT5Oz/JxWWAhL+znR5ihA7/q70WKppBsMJQeF4esW2iiUqRhA+hUy1LJXKf ZCew== X-Gm-Message-State: AAQBX9divCeGcNe4QyhnP34QR0sIHbdx1tqs2oe2no+qZBZZZTiM6jEF 2qG0BbexDPv59p1tbLpvoVFTdg== X-Google-Smtp-Source: AKy350Y1ZQ1nM53sJv20DLlfGDuxW/q4qG1NtiQSjtVJrZ/QzCXz769W2Edvn0mJmIiDjfS46Yo+CQ== X-Received: by 2002:a05:651c:22d:b0:29b:6521:8869 with SMTP id z13-20020a05651c022d00b0029b65218869mr6141744ljn.20.1680117460348; Wed, 29 Mar 2023 12:17:40 -0700 (PDT) Received: from [192.168.1.101] (abxj225.neoplus.adsl.tpnet.pl. [83.9.3.225]) by smtp.gmail.com with ESMTPSA id f4-20020a2e3804000000b0029ad1fc89b3sm5189658lja.60.2023.03.29.12.17.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 12:17:40 -0700 (PDT) From: Konrad Dybcio Date: Wed, 29 Mar 2023 21:17:30 +0200 Subject: [PATCH 3/4] arm64: dts: qcom: msm8996: Improve GPU OPP table MIME-Version: 1.0 Message-Id: <20230329-topic-adreno_opp-v1-3-24d34ac6f007@linaro.org> References: <20230329-topic-adreno_opp-v1-0-24d34ac6f007@linaro.org> In-Reply-To: <20230329-topic-adreno_opp-v1-0-24d34ac6f007@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno , Jordan Crouse , Srinivas Kandagatla , Vivek Gautam , Vinod Koul , Rob Clark , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1680117452; l=2100; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=HHs9XUkau//fB7qwICGVh9A9wHhqzyRvVAVcwO4KDfs=; b=78jckBmXgNXovF2Ypqr1OD6fjvfwgaTJPmXe+Ex0iTBQcKoz9mv8K8UM4YxbtIL5EcHHQOAtW9iT FXeHmfBjATuEPj7/i+Ciw/ONUdUNPpV84+0+3EDe0sM4abfpIaOw X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Remove the self-explanatory comment about opp-supported-hw contents, add required-opps to ensure reasonable power domain levels are voted for (currently we've been piggybacking off of miracles and MDP votes) and add newlines between each subnode. Fixes: 69cc3114ab0f ("arm64: dts: Add Adreno GPU definitions") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 4dd37f72e018..62ad30e94f40 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1244,37 +1244,45 @@ gpu: gpu@b00000 { gpu_opp_table: opp-table { compatible = "operating-points-v2"; - /* - * 624Mhz is only available on speed bins 0 and 3. - * 560Mhz is only available on speed bins 0, 2 and 3. - * All the rest are available on all bins of the hardware. - */ opp-624000000 { opp-hz = /bits/ 64 <624000000>; + required-opps = <&rpmpd_opp_turbo>; opp-supported-hw = <0x09>; }; + opp-560000000 { opp-hz = /bits/ 64 <560000000>; + required-opps = <&rpmpd_opp_turbo>; opp-supported-hw = <0x0d>; }; + opp-510000000 { opp-hz = /bits/ 64 <510000000>; + required-opps = <&rpmpd_opp_nom>; opp-supported-hw = <0xff>; }; + opp-401800000 { opp-hz = /bits/ 64 <401800000>; + required-opps = <&rpmpd_opp_nom>; opp-supported-hw = <0xff>; }; + opp-315000000 { opp-hz = /bits/ 64 <315000000>; + required-opps = <&rpmpd_opp_svs>; opp-supported-hw = <0xff>; }; + opp-214000000 { opp-hz = /bits/ 64 <214000000>; + required-opps = <&rpmpd_opp_svs>; opp-supported-hw = <0xff>; }; + opp-133000000 { opp-hz = /bits/ 64 <133000000>; + required-opps = <&rpmpd_opp_svs>; opp-supported-hw = <0xff>; }; }; From patchwork Wed Mar 29 19:17:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 669004 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59D4AC77B62 for ; Wed, 29 Mar 2023 19:18:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230232AbjC2TR7 (ORCPT ); Wed, 29 Mar 2023 15:17:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230245AbjC2TRw (ORCPT ); Wed, 29 Mar 2023 15:17:52 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49BFE4223 for ; Wed, 29 Mar 2023 12:17:43 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id a11so17269919lji.6 for ; Wed, 29 Mar 2023 12:17:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680117461; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PkKk7Qpt0miI3NiUcSnncqHdyr3DuNCBLMRDZMN+mTU=; b=enBcjGxxUnor9oWLRKL39mGkXt0uM4ukXO4TmIUsx8QDTVJHE+WtDZJp8K6XZtoUsO TtPTRxWK2LFhLrFf4LbFuqwmGw457e0bhK7OydymVlxIrOBf48dOQvOGlTqCzguFflOD YeyL8hWsKo5R0OyIMLU63dzzDWsGQ+Ham8ad67fdl6G+QEbuZp79MnA80woYVwVd5fMF r1slPiC7RNS6x3IwlPQqR7CVKKBuK5VloT4SKHBNqUs9EGlMN7THx2mC1SdSaBCajuH1 uUWVG2VleI+tiKgTLS7u+YD4KkyBxjGZqlhzYA8LomlrT+FeMM+t5OxMTSNk6FtSYYEN ZvRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680117461; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PkKk7Qpt0miI3NiUcSnncqHdyr3DuNCBLMRDZMN+mTU=; b=tLsbY7cNinG4Dfl41m4EpM37kVG2TVIh5TVd4hX8bU3+ymbgeDJXrWAwn5wNM/Q92t tZLiSYGfhz2U0wg5sNXjbcJ7Ak0wbQ7EvNSWwRnZuwFLNW8Uut5ByV734lSGYN+Kgghh aIRfi+hE2wHXMTb8+odHwN1N/wdXThEP6eocRr/5+STUrMjH7fmvEakaJq+XjMfDPoD9 hpA66OTxTAdhuaGCkRDdanzWvmrhc1CguXaE5LtMmiVRmfuLsZ/KGgVlkwddje5dsXuY uPTJG4IhSF5jYXOMhC7kxN1r0oZeKfTHjriBv3+VHiG0WHH/6vooD83u0jZepYXfCu69 7rgg== X-Gm-Message-State: AAQBX9eXBXEYObJA4Bus0wC77UnkJxjGhCOD3HPupewNnMw77cyLpT1M KhdHQFq14OMgpzxhMfBcTH47dw== X-Google-Smtp-Source: AKy350Ys71TFalUqyX/0rCk+E386hQB0F1YvA98ANc8+ixU1OZVN8vyGzE0saNWdDU0GDay7QHZOGA== X-Received: by 2002:a2e:9bcf:0:b0:29e:a3a0:ee2f with SMTP id w15-20020a2e9bcf000000b0029ea3a0ee2fmr5997809ljj.30.1680117461681; Wed, 29 Mar 2023 12:17:41 -0700 (PDT) Received: from [192.168.1.101] (abxj225.neoplus.adsl.tpnet.pl. [83.9.3.225]) by smtp.gmail.com with ESMTPSA id f4-20020a2e3804000000b0029ad1fc89b3sm5189658lja.60.2023.03.29.12.17.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Mar 2023 12:17:41 -0700 (PDT) From: Konrad Dybcio Date: Wed, 29 Mar 2023 21:17:31 +0200 Subject: [PATCH 4/4] arm64: dts: qcom: msm8916: Improve GPU OPP table MIME-Version: 1.0 Message-Id: <20230329-topic-adreno_opp-v1-4-24d34ac6f007@linaro.org> References: <20230329-topic-adreno_opp-v1-0-24d34ac6f007@linaro.org> In-Reply-To: <20230329-topic-adreno_opp-v1-0-24d34ac6f007@linaro.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno , Jordan Crouse , Srinivas Kandagatla , Vivek Gautam , Vinod Koul , Rob Clark , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1680117452; l=1898; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=JPOS4C7Jq8MAmse1/02vKyaIWx2AGQSTrD2cYU4Vq9M=; b=lR/hlBWa2ERR2A1gCrnw36uoxaK8g9TG5iXuPzYclbj1Ce9GkiXJWntiYjP8oOqkHpGQkzk4jdjf xNIJmF5aCXtrCkWWqIkgo6zRBmnrYl36cNeRr/WMJC811dC8QWzk X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add required-opps to ensure reasonable power domain levels are voted for (currently we've been piggybacking off of miracles and MDP votes), add missing frequencies and add newlines between each subnode. Fixes: 61b83be9117c ("arm64: dts: qcom: msm8916: Add gpu support") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 639b158b4fbe..13bd0c647c1d 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1287,18 +1287,31 @@ gpu@1c00000 { <&gcc GCC_BIMC_GFX_CLK>, <&gcc GCC_BIMC_GPU_CLK>, <&gcc GFX3D_CLK_SRC>; - power-domains = <&gcc OXILI_GDSC>; + power-domains = <&rpmpd MSM8916_VDDCX>; operating-points-v2 = <&gpu_opp_table>; iommus = <&gpu_iommu 1>, <&gpu_iommu 2>; gpu_opp_table: opp-table { compatible = "operating-points-v2"; + opp-27000000 { + opp-hz = /bits/ 64 <27000000>; + required-opps = <&rpmpd_opp_svs_krait>; + }; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + required-opps = <&rpmpd_opp_svs_soc>; + }; + + opp-310000000 { + opp-hz = /bits/ 64 <310000000>; + required-opps = <&rpmpd_opp_nom>; + }; + opp-400000000 { opp-hz = /bits/ 64 <400000000>; - }; - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmpd_opp_super_turbo>; }; }; }; @@ -1368,6 +1381,7 @@ gpu_iommu: iommu@1f08000 { clocks = <&gcc GCC_SMMU_CFG_CLK>, <&gcc GCC_GFX_TCU_CLK>; clock-names = "iface", "bus"; + power-domains = <&gcc OXILI_GDSC>; qcom,iommu-secure-id = <18>; /* GFX3D_USER */