From patchwork Fri May 24 12:32:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Gonzalez X-Patchwork-Id: 165115 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp3520926ili; Fri, 24 May 2019 05:32:09 -0700 (PDT) X-Google-Smtp-Source: APXvYqznsdRQOWt6xAyT86CVh3MeglA8jns4QraYd8NQr74RzKB6cpUiAFbb/zx7qxtnpF0YsHwi X-Received: by 2002:a17:902:9007:: with SMTP id a7mr7926575plp.221.1558701129634; Fri, 24 May 2019 05:32:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558701129; cv=none; d=google.com; s=arc-20160816; b=dV+BFNY/pTcfE3xoO/vdtLqxgBKGOlgJt6I9OaJFGxYtXla9bJhBJ6z2143Rpvzmoa 9gVeT0/15QbHLP44Ujm3HgnoGtc+kZwSLWw/js3IH2969DsuYbnyT/SulekvHNt2Fj2B jPYJgREkqDf5ykFShAgdIkExP/53b14YSCGYL+/8xVuxbz4CFxAxriBDCfS+r3p8D3hi hPS9LR9P6pXDH/S3xL5Jgh5kAcmb4IrdVpTYxi6dovZA74T329abHbr6bVbwB+cZW/3a BNg02UqumHEfag5CFhx6SGtjl8E8qVllxdFmbGqlxioZ0YuUnLnijuZev4qWyRbA6LqE tPpA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=37REAAafZEIoJyQNYDh0Xeh4xZayIUdyXVzb+Li/g20=; b=jslpUSbaLg+XDYIIwoiDSE19oXK2WWOf+HKzt7z4Z6VHsytW49WZXKQ6VyJTufED/t NT0mGOM3Q1HpEk0Yhtey5D0jqALU78AYEYzWRD6PFzkpzkR2rhjya1LMSFdQ7vEsheXP 6uxBmHHEipUc5xKvHiFH+mhO7RfnQfvxjxY1tcQU0NXjxYEjXzwYjcevulEWmUUv17YA MUe8WPfHwl/nor0YxQJPwzq6uTAYAE6dm4N2lSfr0ghegxJo3Hm3Y14actpTM8toX3YD edCPiEtaAkg0+IWiyCcxS/QJbzOibsb36wmbzopO3wGTHizVtdEcsBbd62SiOwq3cBdV P0Pg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s207si3742456pfs.119.2019.05.24.05.32.09; Fri, 24 May 2019 05:32:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390781AbfEXMcI (ORCPT + 15 others); Fri, 24 May 2019 08:32:08 -0400 Received: from ns.iliad.fr ([212.27.33.1]:37824 "EHLO ns.iliad.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389057AbfEXMcI (ORCPT ); Fri, 24 May 2019 08:32:08 -0400 Received: from ns.iliad.fr (localhost [127.0.0.1]) by ns.iliad.fr (Postfix) with ESMTP id 9D5C4213EC; Fri, 24 May 2019 14:32:06 +0200 (CEST) Received: from [192.168.108.49] (freebox.vlq16.iliad.fr [213.36.7.13]) by ns.iliad.fr (Postfix) with ESMTP id 817B4213CE; Fri, 24 May 2019 14:32:06 +0200 (CEST) Subject: [PATCH v4] arm64: dts: qcom: msm8998: Add PSCI cpuidle low power states To: Niklas Cassel , Bjorn Andersson , Amit Kucheria Cc: MSM , Linux ARM , Daniel Lezcano , Sibi Sankar , Jeffrey Hugo , Andy Gross References: <346cd9f0-583d-f467-83d0-e73768bf5aac@free.fr> <20190523214619.GB25133@centauri> From: Marc Gonzalez Message-ID: Date: Fri, 24 May 2019 14:32:06 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <20190523214619.GB25133@centauri> Content-Language: en-US X-Virus-Scanned: ClamAV using ClamSMTP ; ns.iliad.fr ; Fri May 24 14:32:06 2019 +0200 (CEST) Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Amit Kucheria Add device bindings for cpuidle states for cpu devices. [marc: rebase, fix arm,psci-suspend-param, fix entry-latency-us] Acked-by: Daniel Lezcano Signed-off-by: Amit Kucheria Signed-off-by: Marc Gonzalez --- Changes from v3: - Fixup all 4 entry-latency-us (Niklas) Changes from v2: - Rebase - Fixup arm,psci-suspend-param for power-collapse states (otherwise: reboot) --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 50 +++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 412195b9794c..ac6bd32c0e7d 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -78,6 +78,7 @@ compatible = "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "arm,arch-cache"; @@ -96,6 +97,7 @@ compatible = "arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; next-level-cache = <&L2_0>; L1_I_1: l1-icache { compatible = "arm,arch-cache"; @@ -110,6 +112,7 @@ compatible = "arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; next-level-cache = <&L2_0>; L1_I_2: l1-icache { compatible = "arm,arch-cache"; @@ -124,6 +127,7 @@ compatible = "arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + cpu-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>; next-level-cache = <&L2_0>; L1_I_3: l1-icache { compatible = "arm,arch-cache"; @@ -138,6 +142,7 @@ compatible = "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "arm,arch-cache"; @@ -156,6 +161,7 @@ compatible = "arm,armv8"; reg = <0x0 0x101>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; next-level-cache = <&L2_1>; L1_I_101: l1-icache { compatible = "arm,arch-cache"; @@ -170,6 +176,7 @@ compatible = "arm,armv8"; reg = <0x0 0x102>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; next-level-cache = <&L2_1>; L1_I_102: l1-icache { compatible = "arm,arch-cache"; @@ -184,6 +191,7 @@ compatible = "arm,armv8"; reg = <0x0 0x103>; enable-method = "psci"; + cpu-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>; next-level-cache = <&L2_1>; L1_I_103: l1-icache { compatible = "arm,arch-cache"; @@ -230,6 +238,48 @@ }; }; }; + + idle-states { + entry-method = "psci"; + + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { + compatible = "arm,idle-state"; + idle-state-name = "little-retention"; + arm,psci-suspend-param = <0x00000002>; + entry-latency-us = <81>; + exit-latency-us = <86>; + min-residency-us = <200>; + }; + + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 { + compatible = "arm,idle-state"; + idle-state-name = "little-power-collapse"; + arm,psci-suspend-param = <0x40000003>; + entry-latency-us = <273>; + exit-latency-us = <612>; + min-residency-us = <1000>; + local-timer-stop; + }; + + BIG_CPU_SLEEP_0: cpu-sleep-1-0 { + compatible = "arm,idle-state"; + idle-state-name = "big-retention"; + arm,psci-suspend-param = <0x00000002>; + entry-latency-us = <79>; + exit-latency-us = <82>; + min-residency-us = <200>; + }; + + BIG_CPU_SLEEP_1: cpu-sleep-1-1 { + compatible = "arm,idle-state"; + idle-state-name = "big-power-collapse"; + arm,psci-suspend-param = <0x40000003>; + entry-latency-us = <336>; + exit-latency-us = <525>; + min-residency-us = <1000>; + local-timer-stop; + }; + }; }; firmware {