From patchwork Wed May 29 09:18:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 165353 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp9614891ili; Wed, 29 May 2019 02:19:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqw4RqIrCxW3ShipdPxZ65M8Ds74K9PSc7+qHMgDxqZKhiW+6ndoRsJ3N9k+OUxVqiCrKjGt X-Received: by 2002:a63:fe51:: with SMTP id x17mr26487912pgj.339.1559121597764; Wed, 29 May 2019 02:19:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559121597; cv=none; d=google.com; s=arc-20160816; b=lqLSkB208ppoTsGVTX0F4fr5HBXWZxcaROJxj8Yj9FeAjmxsytby6TPWLNxscuDAgu Z/gybXy8L75yw9z0LFfqhRF4uki+Zo/L88EmJNZ1STUXdbKbpQxSLStUutEy7Vlwn6JN UOHEAJh7WJ9xvG86PU6I/lSyJHbn6Mm9RF3Mb+2vcgJfLnj0Un8fJSZ39Ddu25C//4Ja XLV7SFtqtyqUckdZpWnlqj/tEtANhnEg/EnksEkpeTjefiQnw7ZENQyiG87JRwP6fJUZ 50527/Wv1zJzUONgQGKC5+PvU9vuJlrUuxZlj8ErhDhoenp/f/5G5Wo2u+1cTkk0DeLa ZuPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=+xTE10V8aohxT+Kq0AQML6/+dZPD7lAi9/07SdRegaY=; b=PHr6PPxssaQzD+6Ud4o4QDe48Sh7Tqe2UCEg2Gu6pmEAqQZdHUoptMaDV1bURH9Y0e 1MXCTWyetNZ7T1a1oIQM3T5qZZuFuwJEItANugqzjDymOKXOToqCDbJH1md9sXAU864e IUNOeHNVqFC9SoFQu5UwIChtmrwuBjhzUkEzqxQnFCM0vPpz96sIm/CS9MR93Yt2Q/T8 R8Xmmf32yJtpillteFI0ULIVagtTs4LCROG879wTSv8uis1+AcZ1PfRcqpCTAlWuYera KzIxHfKh0u94regDvH/lWBduckfbqcYFX9z8AOXVEL71WWkgFolPOY4EPo98z7PDeYok Ryxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OxggvS07; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a18si6416425pgk.150.2019.05.29.02.19.57; Wed, 29 May 2019 02:19:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OxggvS07; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726549AbfE2JT4 (ORCPT + 30 others); Wed, 29 May 2019 05:19:56 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:54898 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725911AbfE2JTy (ORCPT ); Wed, 29 May 2019 05:19:54 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x4T9JifF009253; Wed, 29 May 2019 04:19:44 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1559121584; bh=+xTE10V8aohxT+Kq0AQML6/+dZPD7lAi9/07SdRegaY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=OxggvS07d1QGnNPKT2xbYCr3tGN+bMA8m0Ihxjwyo40LB1Hp+asIBeUbURCPcRF8Z DH90Bn7NhVBADXtAYfHCm2BTzSKq6KD92ix/tcDxUiVYJx/g8pTPwGCsHh2fCbxitC +O+hccVq9rrguRi5XWooDJ0TqFlA7Oxkxu/YIcFA= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x4T9JiUl032612 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 29 May 2019 04:19:44 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 29 May 2019 04:19:44 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 29 May 2019 04:19:44 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x4T9JVxQ079377; Wed, 29 May 2019 04:19:42 -0500 From: Kishon Vijay Abraham I To: Tero Kristo , Nishanth Menon CC: Rob Herring , Mark Rutland , , , , Kishon Vijay Abraham I Subject: [PATCH 3/6] arm64: dts: k3-am6: Add SERDES DT node Date: Wed, 29 May 2019 14:48:09 +0530 Message-ID: <20190529091812.20764-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190529091812.20764-1-kishon@ti.com> References: <20190529091812.20764-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DT node for SERDES0 and SERDES1. Signed-off-by: Kishon Vijay Abraham I --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 41 ++++++++++++++++++++++++ 1 file changed, 41 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 99d2402455d1..443de60576f8 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -4,6 +4,7 @@ * * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ */ +#include &cbass_main { msmc_ram: sram@70000000 { @@ -61,6 +62,36 @@ interrupts = ; }; + serdes0: serdes@900000 { + compatible = "ti,phy-am654-serdes"; + reg = <0x0 0x900000 0x0 0x2000>; + reg-names = "serdes"; + #phy-cells = <2>; + power-domains = <&k3_pds 153>; + clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>; + clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk"; + assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; + assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; + ti,serdes-clk = <&serdes0_clk>; + #clock-cells = <1>; + mux-controls = <&serdes_mux 0>; + }; + + serdes1: serdes@910000 { + compatible = "ti,phy-am654-serdes"; + reg = <0x0 0x910000 0x0 0x2000>; + reg-names = "serdes"; + #phy-cells = <2>; + power-domains = <&k3_pds 154>; + clocks = <&serdes0 AM654_SERDES_RO_REFCLK>, <&k3_clks 154 1>, <&k3_clks 154 5>; + clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk"; + assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>; + assigned-clock-parents = <&k3_clks 154 9>, <&k3_clks 154 5>; + ti,serdes-clk = <&serdes1_clk>; + #clock-cells = <1>; + mux-controls = <&serdes_mux 1>; + }; + main_uart0: serial@2800000 { compatible = "ti,am654-uart"; reg = <0x00 0x02800000 0x00 0x100>; @@ -234,6 +265,16 @@ #size-cells = <1>; ranges = <0x0 0x0 0x00100000 0x1c000>; + serdes0_clk: serdes_clk@4080 { + compatible = "syscon"; + reg = <0x00004080 0x4>; + }; + + serdes1_clk: serdes_clk@4090 { + compatible = "syscon"; + reg = <0x00004090 0x4>; + }; + serdes_mux: mux-controller { compatible = "mmio-mux"; #mux-control-cells = <1>; From patchwork Wed May 29 09:18:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 165356 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp9615012ili; Wed, 29 May 2019 02:20:04 -0700 (PDT) X-Google-Smtp-Source: APXvYqycxNWy2iYSbblhZcTlD/vzDKPxm+7fl7ojF1kiqqD66mL1JYFV12Mjf2+mRd0HGAAwC57i X-Received: by 2002:a63:4c54:: with SMTP id m20mr137436516pgl.316.1559121604588; Wed, 29 May 2019 02:20:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559121604; cv=none; d=google.com; s=arc-20160816; b=ndZ9bq8DUAwV4E1Ve/M6Y36YpYxLeo897kh1/F1TFaAORRFKqANwkrlUFd+9nGAXPB DYI0keQ9RH1rsykpd17zcnJpJL/HuMi1shqZwpQNz2LhMDPnekkLxQqi1EcZxfXfM+n8 5eIwOxAxd32Z6EdsjKeRcQ3ML7f00UoOU3uAAKi7gWaEMlUsCV5RAwX6zanbWfady/tp y7zjqRg08v3gsFc4orumAPu8eLMjCJHtpGLS/mt4OOOMmp2TQZgQyA9aqLgvWyjyiM4v +38abnz9NR98tHPhFCkCsrLVVUG5ESBqQvG/GYPBu5/JX129cU83o2mIsTpCaHd7pyHg SMqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=SnNDdZO8f1mZszMzppiz05NBYAG7PY4/O0tZ3qXbBwo=; b=r9c81OEmaOCpIp/JSP5YKZNbuZ2gm4I48jQipw5ckGddOTS3Jz74Qybh0h1jqu39n7 ookagjRIyv5ynbuQuGzhd1wCg9FwfvC0xWeRGxJN/6QOrsSPyIbnP/nTqVvobL99Y1gt +3J65QTWuJf9bDrFJmCreWVV5Asm2IHXfotmWT7ZOcRlfKQUstcY4OooEbXNa6eYQPlJ b4rqjJQCSv5kJ27JsQDzxCUr3VLe9yHUUXCDLi6FiIOadeOsb7z3P8o45C5RaUvt7yDk c33I6XatCQROI0YQXsZcq7nEw4wo+JJoASlD6Eq0yoDOvPb1W0DxlryyKaTz4vui8y+c 7WGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=owxkauXf; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Kishon Vijay Abraham I --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 53 ++++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am65.dtsi | 1 + 2 files changed, 54 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 443de60576f8..09f18b1e70f2 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -265,6 +265,21 @@ #size-cells = <1>; ranges = <0x0 0x0 0x00100000 0x1c000>; + pcie0_mode: pcie-mode@4060 { + compatible = "syscon"; + reg = <0x00004060 0x4>; + }; + + pcie1_mode: pcie-mode@4070 { + compatible = "syscon"; + reg = <0x00004070 0x4>; + }; + + pcie_devid: pcie-devid@210 { + compatible = "syscon"; + reg = <0x00000210 0x4>; + }; + serdes0_clk: serdes_clk@4080 { compatible = "syscon"; reg = <0x00004080 0x4>; @@ -358,4 +373,42 @@ clock-names = "wkupclk", "refclk"; #phy-cells = <0>; }; + + pcie0_rc: pcie@5500000 { + compatible = "ti,am654-pcie-rc"; + reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>; + reg-names = "app", "dbics", "config", "atu"; + power-domains = <&k3_pds 120>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000 + 0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>; + ti,syscon-pcie-id = <&pcie_devid>; + ti,syscon-pcie-mode = <&pcie0_mode>; + bus-range = <0x0 0xff>; + num-viewport = <16>; + max-link-speed = <3>; + dma-coherent; + interrupts = ; + msi-map = <0x0 &gic_its 0x0 0x10000>; + }; + + pcie1_rc: pcie@5600000 { + compatible = "ti,am654-pcie-rc"; + reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>; + reg-names = "app", "dbics", "config", "atu"; + power-domains = <&k3_pds 121>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000 + 0x82000000 0 0x18030000 0x0 0x18030000 0 0x07FD0000>; + ti,syscon-pcie-id = <&pcie_devid>; + ti,syscon-pcie-mode = <&pcie1_mode>; + bus-range = <0x0 0xff>; + num-viewport = <16>; + max-link-speed = <3>; + dma-coherent; + interrupts = ; + msi-map = <0x0 &gic_its 0x10000 0x10000>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index 50f4be2047a9..5a021321d4ed 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -68,6 +68,7 @@ <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */ <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */ + <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */ /* MCUSS Range */ <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,