From patchwork Sat Apr 15 10:40:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 673468 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99B5CC7619A for ; Sat, 15 Apr 2023 10:41:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229773AbjDOKlT (ORCPT ); Sat, 15 Apr 2023 06:41:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229540AbjDOKlR (ORCPT ); Sat, 15 Apr 2023 06:41:17 -0400 Received: from mail-il1-x12b.google.com (mail-il1-x12b.google.com [IPv6:2607:f8b0:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F2D04C3F; Sat, 15 Apr 2023 03:41:16 -0700 (PDT) Received: by mail-il1-x12b.google.com with SMTP id e9e14a558f8ab-32a7770f7d1so13783095ab.1; Sat, 15 Apr 2023 03:41:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1681555275; x=1684147275; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=NxV/r2dg6tmyFGrf7XbFu39RjdGZZ9Qw/qpOckRtFcs=; b=nkxVRMgX1GxubqUedgn9gXUJHy+brhU+3BcUFfjVgyCkoGudE9vSWr3Y8suNnwiEv+ W8yGBeGfODXBLYCs6nVn2KX4m+oD6yWq/F1eRJp3Z+aFjU608yiclFytafmdERH3CJJR HtMwgvVu1OTXrkiIiNzRBci8NMvJdEMUm8Oj5Vm31359sF/pA4PDYmJMIsd9Q8h1Y8Xk q+HUt00HV7vkK9y9UukZsBljW5DjBzm9uSDN7sChkNbjExgM9QLRAx2Hytcq1BZp8C/o iw2zx3nm8q2SPJVubnoX8TCVQCtB4H2vnS4TKmGvyjsAoFY9mfB+fRsHBMnwUpLQeHr3 baZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681555275; x=1684147275; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=NxV/r2dg6tmyFGrf7XbFu39RjdGZZ9Qw/qpOckRtFcs=; b=AeTVLMF1o+SQClNYYmvBvgWjb9dXzltjoNQppHOE2h2RkS1JDB7e0uZ12eNE3cIRU6 5oXcbltkiWStuaTfHvI7sfmm9xeaBo2pQRnFszoVbn4Ife2hDz46q51nTaH6LIi4lZwR W4xWB8ZTIT/8l01h5dgMO49uV8zMSrx8FE6NfIRXzv5SQqYcZ/xX7E3XkpBEA5N5Qv7l HTqJNv4slHKToAmcnN8sbVFQbz35InNlTBB5dUTjBU/iBg64rVXsEgRU3wqRhnHPzbeg AhXpVOjgO+QgdGh5ukmj9OkS16fpsG/dlFKtZIFIgFDzVdMbqnG4PesmpauoV4HTVGOM viQQ== X-Gm-Message-State: AAQBX9eqgNSktpfTVyRM1ItAm+6IQwaEUgrEYV7m0x7csOugrliEH6+r Ijlwo4tS+uBxNvCGak4tc5E= X-Google-Smtp-Source: AKy350be9XGQbEpTAMxfp/yDs4zbKCqaElyWQiPWqA6tPdcVQdgTQGeHdLNOwe+rg1tq3rDX2lHvrA== X-Received: by 2002:a05:6e02:526:b0:328:edf8:be71 with SMTP id h6-20020a056e02052600b00328edf8be71mr5849677ils.0.1681555275334; Sat, 15 Apr 2023 03:41:15 -0700 (PDT) Received: from aford-B741.lan ([2601:447:d001:897f:40bb:6fe6:ddbc:cc9a]) by smtp.gmail.com with ESMTPSA id bp11-20020a056638440b00b0040b38102b79sm246536jab.82.2023.04.15.03.41.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Apr 2023 03:41:14 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Cc: m.szyprowski@samsung.com, marex@denx.de, aford@beaconembedded.com, Adam Ford , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Inki Dae , Jagan Teki , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/6] drm: bridge: samsung-dsim: Support multi-lane calculations Date: Sat, 15 Apr 2023 05:40:58 -0500 Message-Id: <20230415104104.5537-1-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If there is more than one lane, the HFP, HBP, and HSA is calculated in bytes/pixel, then they are divided amongst the different lanes with some additional overhead. This is necessary to achieve higher resolutions while keeping the pixel clocks lower as the number of lanes increase. Signed-off-by: Adam Ford --- drivers/gpu/drm/bridge/samsung-dsim.c | 40 +++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index e0a402a85787..1ccbad4ea577 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -215,6 +215,7 @@ #define DSI_RX_FIFO_SIZE 256 #define DSI_XFER_TIMEOUT_MS 100 #define DSI_RX_FIFO_EMPTY 0x30800002 +#define DSI_HSYNC_PKT_OVERHEAD 6 #define OLD_SCLK_MIPI_CLK_NAME "pll_clk" @@ -879,13 +880,40 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi) | DSIM_MAIN_VBP(m->vtotal - m->vsync_end); samsung_dsim_write(dsi, DSIM_MVPORCH_REG, reg); - reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay) - | DSIM_MAIN_HBP(m->htotal - m->hsync_end); - samsung_dsim_write(dsi, DSIM_MHPORCH_REG, reg); + /* + * If there is more than one lane, the HFP, HBP, and HSA + * is calculated in bytes/pixel, then they are divided + * amongst the different lanes with some additional + * overhead correction + */ + if (dsi->lanes > 1) { + u32 hfp, hbp, hsa; + int bpp = mipi_dsi_pixel_format_to_bpp(dsi->format) / 8; + + hfp = ((m->hsync_start - m->hdisplay) * bpp) / dsi->lanes; + hfp -= (hfp > DSI_HSYNC_PKT_OVERHEAD) ? DSI_HSYNC_PKT_OVERHEAD : 0; + + hbp = ((m->htotal - m->hsync_end) * bpp) / dsi->lanes; + hbp -= (hbp > DSI_HSYNC_PKT_OVERHEAD) ? DSI_HSYNC_PKT_OVERHEAD : 0; - reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start) - | DSIM_MAIN_HSA(m->hsync_end - m->hsync_start); - samsung_dsim_write(dsi, DSIM_MSYNC_REG, reg); + hsa = ((m->hsync_end - m->hsync_start) * bpp) / dsi->lanes; + hsa -= (hsa > DSI_HSYNC_PKT_OVERHEAD) ? DSI_HSYNC_PKT_OVERHEAD : 0; + + reg = DSIM_MAIN_HFP(hfp) | DSIM_MAIN_HBP(hbp); + samsung_dsim_write(dsi, DSIM_MHPORCH_REG, reg); + + reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start) + | DSIM_MAIN_HSA(hsa); + samsung_dsim_write(dsi, DSIM_MSYNC_REG, reg); + } else { + reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay) + | DSIM_MAIN_HBP(m->htotal - m->hsync_end); + samsung_dsim_write(dsi, DSIM_MHPORCH_REG, reg); + + reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start) + | DSIM_MAIN_HSA(m->hsync_end - m->hsync_start); + samsung_dsim_write(dsi, DSIM_MSYNC_REG, reg); + } } reg = DSIM_MAIN_HRESOL(m->hdisplay, num_bits_resol) | DSIM_MAIN_VRESOL(m->vdisplay, num_bits_resol); From patchwork Sat Apr 15 10:40:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 674097 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14FF5C77B71 for ; Sat, 15 Apr 2023 10:41:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229829AbjDOKlU (ORCPT ); Sat, 15 Apr 2023 06:41:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229780AbjDOKlT (ORCPT ); Sat, 15 Apr 2023 06:41:19 -0400 Received: from mail-io1-xd2b.google.com (mail-io1-xd2b.google.com [IPv6:2607:f8b0:4864:20::d2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 315A94ED1; Sat, 15 Apr 2023 03:41:18 -0700 (PDT) Received: by mail-io1-xd2b.google.com with SMTP id ca18e2360f4ac-760bba6404cso20398539f.1; Sat, 15 Apr 2023 03:41:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1681555277; x=1684147277; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=56ZqII4Fb21fefI3ij/UQDEmcVSWwrH95gBjy3Mjo2c=; b=c8R4I6O7ggblq3O1pN0J/PavAtXqWA4bYUwa0MWOlSiv+6wVMfuKWJjDtC7rumJhcN 0wnseCj6TyzdfajLDnKts4AwioLf4PO6JyroWchUm/aq2GRk9J+Lg3+Xoc14CHqCaw+2 YW33BbG9KN3jggKvsgFWRlVK6qxRfaPAAb/BZ5zbH+Rk8Wlnp4UN9QUF9G9PbETTzSy4 29TtbhcGai+nhWmrd4BBMWnOBy59vNlI2foFoP9nU76fTp2lRKxj3WqSBo5tZ3oOp0q8 dQdHlgD28OO9t5wPpSbx45HEVfMBwSIq7B7r+qmyPSSWtXkh2BQ/+YEKhgdehA4QHEyp j1Rw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681555277; x=1684147277; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=56ZqII4Fb21fefI3ij/UQDEmcVSWwrH95gBjy3Mjo2c=; b=kLu+s32quCEUPPtT9n/G5tU+rm8ZYFDUAysJBtR1FbXIMMLiWqwmn+lhuIVgPgoqad rulItJsanBOcERdWY7SkfRhtKGFNrEYiX1jYGhg887SIOmjz9+EInAK+CTBTPDn71H6Q jwlx9ZaLWTLIBg5H/QxZ8F4Yb2N6rte/KDhiZS5DuauyBi5RMqX9vWmOVa+pKiJXmxu8 X/n9QtXCoauPzc0vWERwOi+rK2nmMY5Ig2spq5LdDOk9zXkCJisBWHCeRFJrNZfxkPHJ 7Gd05doEtf9FTXRELfFolI3eOmqS2j3owwxICuhxJf6iGUnFlTN9q81+NQJtqWrcYKXv d39w== X-Gm-Message-State: AAQBX9eCP3FOQAevEEMBqtYXaYpL9ZXZJ4JHtqSD7LfAkjsZEtamah5c /WXbJmSJxYnrq0wgdhmD9CI= X-Google-Smtp-Source: AKy350YMpZS9K/4tuqfAqbcnOR5F8JMUeFciCZKRV1EEP8gaOTJNwxUsnA9p449Upwgys2q4gez8qA== X-Received: by 2002:a92:d80f:0:b0:329:5a6e:3a18 with SMTP id y15-20020a92d80f000000b003295a6e3a18mr5513977ilm.4.1681555277355; Sat, 15 Apr 2023 03:41:17 -0700 (PDT) Received: from aford-B741.lan ([2601:447:d001:897f:40bb:6fe6:ddbc:cc9a]) by smtp.gmail.com with ESMTPSA id bp11-20020a056638440b00b0040b38102b79sm246536jab.82.2023.04.15.03.41.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Apr 2023 03:41:16 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Cc: m.szyprowski@samsung.com, marex@denx.de, aford@beaconembedded.com, Adam Ford , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Inki Dae , Jagan Teki , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , Frieder Schrempf , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/6] drm: bridge: samsung-dsim: Fix PMS Calculator on imx8m[mnp] Date: Sat, 15 Apr 2023 05:40:59 -0500 Message-Id: <20230415104104.5537-2-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230415104104.5537-1-aford173@gmail.com> References: <20230415104104.5537-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org According to Table 13-45 of the i.MX8M Mini Reference Manual, the min and max values for M and the frequency range for the VCO_out calculator were incorrect. This also appears to be the case for the imx8mn and imx8mp. To fix this, make new variables to hold the min and max values of m and the minimum value of VCO_out, and update the PMS calculator to use these new variables instead of using hard-coded values to keep the backwards compatibility with other parts using this driver. Fixes: 4d562c70c4dc ("drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support") Signed-off-by: Adam Ford --- drivers/gpu/drm/bridge/samsung-dsim.c | 22 ++++++++++++++++++++-- include/drm/bridge/samsung-dsim.h | 3 +++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 1ccbad4ea577..9fec32b44e05 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -406,6 +406,9 @@ static const struct samsung_dsim_driver_data exynos3_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .vco_min = 500, }; static const struct samsung_dsim_driver_data exynos4_dsi_driver_data = { @@ -419,6 +422,9 @@ static const struct samsung_dsim_driver_data exynos4_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .vco_min = 500, }; static const struct samsung_dsim_driver_data exynos5_dsi_driver_data = { @@ -430,6 +436,9 @@ static const struct samsung_dsim_driver_data exynos5_dsi_driver_data = { .num_bits_resol = 11, .pll_p_offset = 13, .reg_values = reg_values, + .m_min = 41, + .m_max = 125, + .vco_min = 500, }; static const struct samsung_dsim_driver_data exynos5433_dsi_driver_data = { @@ -442,6 +451,9 @@ static const struct samsung_dsim_driver_data exynos5433_dsi_driver_data = { .num_bits_resol = 12, .pll_p_offset = 13, .reg_values = exynos5433_reg_values, + .m_min = 41, + .m_max = 125, + .vco_min = 500, }; static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { @@ -454,6 +466,9 @@ static const struct samsung_dsim_driver_data exynos5422_dsi_driver_data = { .num_bits_resol = 12, .pll_p_offset = 13, .reg_values = exynos5422_reg_values, + .m_min = 41, + .m_max = 125, + .vco_min = 500, }; static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { @@ -470,6 +485,9 @@ static const struct samsung_dsim_driver_data imx8mm_dsi_driver_data = { */ .pll_p_offset = 14, .reg_values = imx8mm_dsim_reg_values, + .m_min = 64, + .m_max = 1023, + .vco_min = 1050, }; static const struct samsung_dsim_driver_data * @@ -548,12 +566,12 @@ static unsigned long samsung_dsim_pll_find_pms(struct samsung_dsim *dsi, tmp = (u64)fout * (_p << _s); do_div(tmp, fin); _m = tmp; - if (_m < 41 || _m > 125) + if (_m < driver_data->m_min || _m > driver_data->m_max) continue; tmp = (u64)_m * fin; do_div(tmp, _p); - if (tmp < 500 * MHZ || + if (tmp < driver_data->vco_min * MHZ || tmp > driver_data->max_freq * MHZ) continue; diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung-dsim.h index ba5484de2b30..a088d84579bc 100644 --- a/include/drm/bridge/samsung-dsim.h +++ b/include/drm/bridge/samsung-dsim.h @@ -59,6 +59,9 @@ struct samsung_dsim_driver_data { unsigned int num_bits_resol; unsigned int pll_p_offset; const unsigned int *reg_values; + u16 m_min; + u16 m_max; + u64 vco_min; }; struct samsung_dsim_host_ops { From patchwork Sat Apr 15 10:41:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 673467 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 663C3C77B77 for ; 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Sat, 15 Apr 2023 03:41:19 -0700 (PDT) Received: from aford-B741.lan ([2601:447:d001:897f:40bb:6fe6:ddbc:cc9a]) by smtp.gmail.com with ESMTPSA id bp11-20020a056638440b00b0040b38102b79sm246536jab.82.2023.04.15.03.41.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Apr 2023 03:41:18 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Cc: m.szyprowski@samsung.com, marex@denx.de, aford@beaconembedded.com, Adam Ford , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Inki Dae , Jagan Teki , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/6] drm: bridge: samsung-dsim: Fetch pll-clock-frequency automatically Date: Sat, 15 Apr 2023 05:41:00 -0500 Message-Id: <20230415104104.5537-3-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230415104104.5537-1-aford173@gmail.com> References: <20230415104104.5537-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fetch the clock rate of "sclk_mipi" (or "pll_clk") instead of having an entry in the device tree for samsung,pll-clock-frequency. Signed-off-by: Adam Ford --- drivers/gpu/drm/bridge/samsung-dsim.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 9fec32b44e05..73f0c3fbbdf5 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1744,11 +1744,6 @@ static int samsung_dsim_parse_dt(struct samsung_dsim *dsi) struct device_node *node = dev->of_node; int ret; - ret = samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency", - &dsi->pll_clk_rate); - if (ret < 0) - return ret; - ret = samsung_dsim_of_read_u32(node, "samsung,burst-clock-frequency", &dsi->burst_clk_rate); if (ret < 0) @@ -1823,13 +1818,18 @@ int samsung_dsim_probe(struct platform_device *pdev) if (IS_ERR(dsi->clks[i])) { if (strcmp(clk_names[i], "sclk_mipi") == 0) { dsi->clks[i] = devm_clk_get(dev, OLD_SCLK_MIPI_CLK_NAME); - if (!IS_ERR(dsi->clks[i])) + if (!IS_ERR(dsi->clks[i])) { + dsi->pll_clk_rate = clk_get_rate(dsi->clks[i]); continue; + } } dev_info(dev, "failed to get the clock: %s\n", clk_names[i]); return PTR_ERR(dsi->clks[i]); } + + if (strcmp(clk_names[i], "sclk_mipi") == 0) + dsi->pll_clk_rate = clk_get_rate(dsi->clks[i]); } dsi->reg_base = devm_platform_ioremap_resource(pdev, 0); From patchwork Sat Apr 15 10:41:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Ford X-Patchwork-Id: 674096 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8623EC77B76 for ; Sat, 15 Apr 2023 10:41:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230009AbjDOKl2 (ORCPT ); Sat, 15 Apr 2023 06:41:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39726 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229931AbjDOKlZ (ORCPT ); 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Sat, 15 Apr 2023 03:41:21 -0700 (PDT) From: Adam Ford To: dri-devel@lists.freedesktop.org Cc: m.szyprowski@samsung.com, marex@denx.de, aford@beaconembedded.com, Adam Ford , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Inki Dae , Jagan Teki , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , Frieder Schrempf , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/6] drm: bridge: samsung-dsim: Dynamically configure DPHY timing Date: Sat, 15 Apr 2023 05:41:01 -0500 Message-Id: <20230415104104.5537-4-aford173@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230415104104.5537-1-aford173@gmail.com> References: <20230415104104.5537-1-aford173@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org NXP uses a lookup table to determine the various values for the PHY Timing based on the clock rate in their downstream kernel. Since the input clock can be variable, the phy settings need to be variable too. Add an additional variable to the driver data to enable this feature to prevent breaking boards that don't support it. Signed-off-by: Adam Ford --- drivers/gpu/drm/bridge/samsung-dsim.c | 85 +++++++-- drivers/gpu/drm/bridge/samsung-dsim.h | 254 ++++++++++++++++++++++++++ include/drm/bridge/samsung-dsim.h | 1 + 3 files changed, 326 insertions(+), 14 deletions(-) create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.h diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 73f0c3fbbdf5..c48db27adafe 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -18,13 +18,14 @@ #include #include #include - +#include #include