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[71.195.29.92]) by smtp.gmail.com with ESMTPSA id q15sm1626947ioi.15.2019.05.30.20.53.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 20:54:00 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, arnd@arndb.de, bjorn.andersson@linaro.org, ilias.apalodimas@linaro.org Cc: evgreen@chromium.org, benchan@google.com, ejcaruso@google.com, cpratapa@codeaurora.org, syadagir@codeaurora.org, subashab@codeaurora.org, abhishek.esse@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 04/17] soc: qcom: ipa: configuration data Date: Thu, 30 May 2019 22:53:35 -0500 Message-Id: <20190531035348.7194-5-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190531035348.7194-1-elder@linaro.org> References: <20190531035348.7194-1-elder@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch defines configuration data that is used to specify some of the details of IPA hardware supported by the driver. It is built as Device Tree match data, discovered at boot time. Initially the driver only supports the Qualcomm SDM845 SoC. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_data-sdm845.c | 245 +++++++++++++++++++++++++++ drivers/net/ipa/ipa_data.h | 267 ++++++++++++++++++++++++++++++ 2 files changed, 512 insertions(+) create mode 100644 drivers/net/ipa/ipa_data-sdm845.c create mode 100644 drivers/net/ipa/ipa_data.h -- 2.20.1 diff --git a/drivers/net/ipa/ipa_data-sdm845.c b/drivers/net/ipa/ipa_data-sdm845.c new file mode 100644 index 000000000000..62c0f25f5161 --- /dev/null +++ b/drivers/net/ipa/ipa_data-sdm845.c @@ -0,0 +1,245 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 Linaro Ltd. + */ + +#include + +#include "gsi.h" +#include "ipa_data.h" +#include "ipa_endpoint.h" + +/* Differentiate Boolean from numerical options */ +#define NO 0 +#define YES 1 + +/* Endpoint configuration for the SDM845 SoC. */ +static const struct gsi_ipa_endpoint_data gsi_ipa_endpoint_data[] = { + { + .ee_id = GSI_EE_AP, + .channel_id = 4, + .endpoint_id = IPA_ENDPOINT_AP_COMMAND_TX, + .toward_ipa = YES, + .channel = { + .tlv_count = 20, + .wrr_priority = YES, + .tre_count = 256, + .event_count = 512, + }, + .endpoint = { + .seq_type = IPA_SEQ_DMA_ONLY, + .config = { + .dma_mode = YES, + .dma_endpoint = IPA_ENDPOINT_AP_LAN_RX, + }, + }, + }, + { + .ee_id = GSI_EE_AP, + .channel_id = 5, + .endpoint_id = IPA_ENDPOINT_AP_LAN_RX, + .toward_ipa = NO, + .channel = { + .tlv_count = 8, + .tre_count = 256, + .event_count = 256, + }, + .endpoint = { + .seq_type = IPA_SEQ_INVALID, + .config = { + .checksum = YES, + .aggregation = YES, + .status_enable = YES, + .rx = { + .pad_align = ilog2(sizeof(u32)), + }, + }, + }, + }, + { + .ee_id = GSI_EE_AP, + .channel_id = 3, + .endpoint_id = IPA_ENDPOINT_AP_MODEM_TX, + .toward_ipa = YES, + .channel = { + .tlv_count = 16, + .tre_count = 512, + .event_count = 512, + }, + .endpoint = { + .support_flt = YES, + .seq_type = + IPA_SEQ_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, + .config = { + .checksum = YES, + .qmap = YES, + .status_enable = YES, + .tx = { + .delay = YES, + .status_endpoint = + IPA_ENDPOINT_MODEM_AP_RX, + }, + }, + }, + }, + { + .ee_id = GSI_EE_AP, + .channel_id = 6, + .endpoint_id = IPA_ENDPOINT_AP_MODEM_RX, + .toward_ipa = NO, + .channel = { + .tlv_count = 8, + .tre_count = 256, + .event_count = 256, + }, + .endpoint = { + .seq_type = IPA_SEQ_INVALID, + .config = { + .checksum = YES, + .qmap = YES, + .aggregation = YES, + .rx = { + .aggr_close_eof = YES, + }, + }, + }, + }, + { + .ee_id = GSI_EE_MODEM, + .channel_id = 1, + .endpoint_id = IPA_ENDPOINT_MODEM_COMMAND_TX, + .toward_ipa = YES, + .endpoint = { + .seq_type = IPA_SEQ_PKT_PROCESS_NO_DEC_UCP, + }, + }, + { + .ee_id = GSI_EE_MODEM, + .channel_id = 0, + .endpoint_id = IPA_ENDPOINT_MODEM_LAN_TX, + .toward_ipa = YES, + .endpoint = { + .support_flt = YES, + }, + }, + { + .ee_id = GSI_EE_MODEM, + .channel_id = 3, + .endpoint_id = IPA_ENDPOINT_MODEM_LAN_RX, + .toward_ipa = NO, + }, + { + .ee_id = GSI_EE_MODEM, + .channel_id = 4, + .endpoint_id = IPA_ENDPOINT_MODEM_AP_TX, + .toward_ipa = YES, + .endpoint = { + .support_flt = YES, + }, + }, + { + .ee_id = GSI_EE_MODEM, + .channel_id = 2, + .endpoint_id = IPA_ENDPOINT_MODEM_AP_RX, + .toward_ipa = NO, + }, +}; + +static const struct ipa_resource_src ipa_resource_src[] = { + { + .type = IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS, + .limits[IPA_RESOURCE_GROUP_LWA_DL] = { + .min = 1, + .max = 63, + }, + .limits[IPA_RESOURCE_GROUP_UL_DL] = { + .min = 1, + .max = 63, + }, + }, + { + .type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS, + .limits[IPA_RESOURCE_GROUP_LWA_DL] = { + .min = 10, + .max = 10, + }, + .limits[IPA_RESOURCE_GROUP_UL_DL] = { + .min = 10, + .max = 10, + }, + }, + { + .type = IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF, + .limits[IPA_RESOURCE_GROUP_LWA_DL] = { + .min = 12, + .max = 12, + }, + .limits[IPA_RESOURCE_GROUP_UL_DL] = { + .min = 14, + .max = 14, + }, + }, + { + .type = IPA_RESOURCE_TYPE_SRC_HPS_DMARS, + .limits[IPA_RESOURCE_GROUP_LWA_DL] = { + .min = 0, + .max = 63, + }, + .limits[IPA_RESOURCE_GROUP_UL_DL] = { + .min = 0, + .max = 63, + }, + }, + { + .type = IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES, + .limits[IPA_RESOURCE_GROUP_LWA_DL] = { + .min = 14, + .max = 14, + }, + .limits[IPA_RESOURCE_GROUP_UL_DL] = { + .min = 20, + .max = 20, + }, + }, +}; + +static const struct ipa_resource_dst ipa_resource_dst[] = { + { + .type = IPA_RESOURCE_TYPE_DST_DATA_SECTORS, + .limits[IPA_RESOURCE_GROUP_LWA_DL] = { + .min = 4, + .max = 4, + }, + .limits[IPA_RESOURCE_GROUP_UL_DL] = { + .min = 4, + .max = 4, + }, + }, + { + .type = IPA_RESOURCE_TYPE_DST_DPS_DMARS, + .limits[IPA_RESOURCE_GROUP_LWA_DL] = { + .min = 2, + .max = 63, + }, + .limits[IPA_RESOURCE_GROUP_UL_DL] = { + .min = 1, + .max = 63, + }, + }, +}; + +/* Resource configuration for the SDM845 SoC. */ +static const struct ipa_resource_data ipa_resource_data = { + .resource_src = ipa_resource_src, + .resource_src_count = ARRAY_SIZE(ipa_resource_src), + .resource_dst = ipa_resource_dst, + .resource_dst_count = ARRAY_SIZE(ipa_resource_dst), +}; + +/* Configuration data for the SDM845 SoC. */ +const struct ipa_data ipa_data_sdm845 = { + .endpoint_data = gsi_ipa_endpoint_data, + .endpoint_data_count = ARRAY_SIZE(gsi_ipa_endpoint_data), + .resource_data = &ipa_resource_data, +}; diff --git a/drivers/net/ipa/ipa_data.h b/drivers/net/ipa/ipa_data.h new file mode 100644 index 000000000000..f7669f73efc3 --- /dev/null +++ b/drivers/net/ipa/ipa_data.h @@ -0,0 +1,267 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 Linaro Ltd. + */ +#ifndef _IPA_DATA_H_ +#define _IPA_DATA_H_ + +#include + +#include "ipa_endpoint.h" + +/** + * DOC: IPA/GSI Configuration Data + * + * Boot-time configuration data is used to define the configuration of the + * IPA and GSI resources to use for a given platform. This data is supplied + * via the Device Tree match table, associated with a particular compatible + * string. The data defines information about resources, endpoints, and + * channels. For endpoints and channels, the configuration data defines how + * these hardware entities are initially configured, but in almost all cases, + * this configuration never changes. + * + * Resources are data structures used internally by the IPA hardware. The + * configuration data defines the number (or limits of the number) of various + * types of these resources. + * + * Endpoint configuration data defines properties of both IPA endpoints and + * GSI channels. A channel is a GSI construct, and represents a single + * communication path between the IPA and a particular execution environment + * (EE), such as the AP or Modem. Each EE has a set of channels associated + * with it, and each channel has an ID unique for that EE. Only GSI channels + * associated with the AP are of concern to this driver. + * + * An endpoint is an IPA construct representing a single channel anywhere + * within the system. As such, an IPA endpoint ID maps directly to an + * (EE, channel_id) pair. Generally, this driver is concerned with only + * endpoints associated with the AP, however this will change when support + * for routing (etc.) is added. IPA endpoint and GSI channel configuration + * data are defined together, establishing the endpoint_id->(EE, channel_id) + * mapping. + * + * Endpoint configuration data consists of three parts: properties that + * are common to IPA and GSI (EE ID, channel ID, endpoint ID, and direction); + * properties associated with the GSI channel; and properties associated with + * the IPA endpoint. + */ + +/** + * struct gsi_channel_data - GSI channel configuration data + * @tlv_count: number of entries in channel's TLV FIFO + * @wrr_priority: whether channel gets priority (AP command TX only) + * @tre_count: number of TREs in the channel ring + * @event_count: number of slots in the associated event ring + * + * A GSI channel is a unidirectional means of transferring data to or from + * (and through) the IPA. A GSI channel has a fixed number of "transfer + * elements" (TREs) that specify individual commands. A set of commands + * are provided to a GSI channel, and when they complete the GSI generates + * an event (and an interrupt) to signal their completion. These event + * structures are managed in a fixed-size event ring. + * + * Each GSI channel is fed by a FIFO if type/length/value (TLV) structures, + * and the number of entries in this FIFO limits the number of TREs that can + * be included in a single transaction. + * + * The GSI does weighted round-robin servicing of its channels, and it's + * possible to adjust a channel's priority of service. Only the AP command + * TX channel specifies that it should get priority. + */ +struct gsi_channel_data { + u32 tlv_count; + + u32 wrr_priority; + u32 tre_count; + u32 event_count; +}; + +/** + * struct ipa_endpoint_tx_data - configuration data for TX endpoints + * @delay: whether endpoint starts in delay mode + * @status_endpoint: endpoint to which status elements are sent + * + * Delay mode prevents an endpoint from transmitting anything, even if + * commands have been presented to the hardware. Once the endpoint exits + * delay mode, queued transfer commands are sent. + * + * The @status_endpoint is only valid if the endpoint's @status_enable + * flag is set. + */ +struct ipa_endpoint_tx_data { + u32 delay; + enum ipa_endpoint_id status_endpoint; +}; + +/** + * struct ipa_endpoint_rx_data - configuration data for RX endpoints + * @pad_align: power-of-2 boundary to which packet payload is aligned + * @aggr_close_eof: whether aggregation closes on end-of-frame + * + * With each packet it transfers, the IPA hardware can perform certain + * transformations of its packet data. One of these is adding pad bytes + * to the end of the packet data so the result ends on a power-of-2 boundary. + * + * It is also able to aggregate multiple packets into a single receive buffer. + * Aggregation is "open" while a buffer is being filled, and "closes" when + * certain criteria are met. One of those criteria is the sender indicating + * a "frame" consisting of several transfers has ended. + */ +struct ipa_endpoint_rx_data { + u32 pad_align; + u32 aggr_close_eof; +}; + +/** + * struct ipa_endpoint_config_data - IPA endpoint hardware configuration + * @checksum: whether checksum offload is enabled + * @qmap: whether endpoint uses QMAP protocol + * @aggregation: whether endpoint supports aggregation + * @dma_mode: whether endpoint operates in DMA mode + * @dma_endpoint: peer endpoint, if operating in DMA mode + * @status_enable: whether status elements are generated for endpoint + * @tx: TX-specific endpoint information (see above) + * @rx: RX-specific endpoint information (see above) + */ +struct ipa_endpoint_config_data { + u32 checksum; + u32 qmap; + u32 aggregation; + u32 dma_mode; + enum ipa_endpoint_id dma_endpoint; + u32 status_enable; + union { + struct ipa_endpoint_tx_data tx; + struct ipa_endpoint_rx_data rx; + }; +}; + +/** + * struct ipa_endpoint_data - IPA endpoint configuration data + * @support_flt: whether endpoint supports filtering + * @seq_type: hardware sequencer type used for endpoint + * @config: hardware configuration (see above) + * + * Not all endpoints support the IPA filtering capability. A filter table + * defines the filters to apply for those endpoints that support it. The + * AP is responsible for initializing this table, and it must include entries + * for non-AP endpoints. For this reason we define *all* endpoints used + * in the system, and indicate whether they support filtering. + * + * The remaining endpoint configuration data applies only to AP endpoints. + * The IPA hardware is implemented by sequencers, and the AP must program + * the type(s) of these sequencers at initialization time. The remaining + * endpoint configuration data is defined above. + */ +struct ipa_endpoint_data { + u32 support_flt; + /* The rest are specified only for AP endpoints */ + enum ipa_seq_type seq_type; + struct ipa_endpoint_config_data config; +}; + +/** + * struct gsi_ipa_endpoint_data - GSI channel/IPA endpoint data + * ee: GSI execution environment ID + * channel_id: GSI channel ID + * endpoint_id: IPA endpoint ID + * toward_ipa: direction of data transfer + * gsi: GSI channel configuration data (see above) + * ipa: IPA endpoint configuration data (see above) + */ +struct gsi_ipa_endpoint_data { + u32 ee_id; + u32 channel_id; + enum ipa_endpoint_id endpoint_id; + u32 toward_ipa; + + struct gsi_channel_data channel; + struct ipa_endpoint_data endpoint; +}; + +/** enum ipa_resource_group - IPA resource group */ +enum ipa_resource_group { + IPA_RESOURCE_GROUP_LWA_DL, /* currently not used */ + IPA_RESOURCE_GROUP_UL_DL, + IPA_RESOURCE_GROUP_MAX, +}; + +/** enum ipa_resource_type_src - source resource types */ +enum ipa_resource_type_src { + IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS, + IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS, + IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF, + IPA_RESOURCE_TYPE_SRC_HPS_DMARS, + IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES, +}; + +/** enum ipa_resource_type_dst - destination resource types */ +enum ipa_resource_type_dst { + IPA_RESOURCE_TYPE_DST_DATA_SECTORS, + IPA_RESOURCE_TYPE_DST_DPS_DMARS, +}; + +/** + * struct ipa_resource_limits - minimum and maximum resource counts + * @min: minimum number of resources of a given type + * @max: maximum number of resources of a given type + */ +struct ipa_resource_limits { + u32 min; + u32 max; +}; + +/** + * struct ipa_resource_src - source endpoint group resource usage + * @type: source group resource type + * @limits: array of limits to use for each resource group + */ +struct ipa_resource_src { + enum ipa_resource_type_src type; + struct ipa_resource_limits limits[IPA_RESOURCE_GROUP_MAX]; +}; + +/** + * struct ipa_resource_dst - destination endpoint group resource usage + * @type: destination group resource type + * @limits: array of limits to use for each resource group + */ +struct ipa_resource_dst { + enum ipa_resource_type_dst type; + struct ipa_resource_limits limits[IPA_RESOURCE_GROUP_MAX]; +}; + +/** + * struct ipa_resource_data - IPA resource configuration data + * @resource_src: source endpoint group resources + * @resource_src_count: number of entries in the resource_src array + * @resource_dst: destination endpoint group resources + * @resource_dst_count: number of entries in the resource_dst array + * + * In order to manage quality of service between endpoints, certain resources + * required for operation are allocated to groups of endpoints. Generally + * this information is invisible to the AP, but the AP is responsible for + * programming it at initialization time, so we specify it here. + */ +struct ipa_resource_data { + const struct ipa_resource_src *resource_src; + u32 resource_src_count; + const struct ipa_resource_dst *resource_dst; + u32 resource_dst_count; +}; + +/** + * struct ipa_data - combined IPA/GSI configuration data + * @resource_data: IPA resource configuration data + * @endpoint_data: IPA endpoint/GSI channel data + * @endpoint_data_count: number of entries in endpoint_data array + */ +struct ipa_data { + const struct ipa_resource_data *resource_data; + const struct gsi_ipa_endpoint_data *endpoint_data; + u32 endpoint_data_count; /* # entries in endpoint_data[] */ +}; + +extern const struct ipa_data ipa_data_sdm845; + +#endif /* _IPA_DATA_H_ */ From patchwork Fri May 31 03:53:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 165493 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp185937ili; Thu, 30 May 2019 20:54:11 -0700 (PDT) X-Google-Smtp-Source: APXvYqy9kvSaHV4KJ0KAw8ChYvwr9yjnltZzC9XthM4rRzizdHxOiB1XTLBzaQpxq7KaZir3bKsw X-Received: by 2002:a17:90a:b393:: with SMTP id e19mr6752603pjr.91.1559274851317; Thu, 30 May 2019 20:54:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559274851; cv=none; d=google.com; s=arc-20160816; b=o5f2WrdGgAWvdop6UM4yPeG3h5RNxtf3CLuk+N1ROJaPdvGOMwp/DY2brn/4s+uXyu Wn6onElCRGnxOhXwMYcaHbl8pQuVUfjuMPt1TeIJaQi2P9XRDK04NjRhj9rx9qSY+tuR 0xMKDVTyAhnJCeq5N10eli4V27IlMV3HrvqXKNTdB5s3yk1R1dy4Lz0lcBjfrTUayqZp q1GpnP090jkaXU3HpZ6bjbMu//yG0rHYGOlqEMB8gT9FD2HpWix2z/rubf9v7a8g7Q29 TU1fUctUIhECPvyKimROxQUFLjhWdeO3AYPB/4/WWfD5qjfoucte3qQkbQbxQXxSTD48 RdMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qcjrhVYsZg52RJ5XXriOknCyqMNzK66d33ZzlwDcMVo=; b=Tww0TZAu5+HAEGecLP4es3HsbWxBG7rzihbqhkPc/ab0yM+hkn5d4UIjmxn5onVO0l H/xOeh5ww/Y1SnE2RvhtyksAJbE5Z0RLZ1Ka+JAhz5wWCXjiP1m3HYMkOVhzcdS8KzmJ C9iAHGhxbRlFZ5QQ5iTsawOrd3aLwcbgaHY0aRqKE0cWRgXTX/p4piq57uu1v6FSHxu1 wB+FSCuyzAjtQpY+FshTr4NsyWIF5DnU49y28c5iwNwvdVjfJTkyZLFWkWF7niJHNYRd MR+bjz5plRFddKtvE+0lIpKDJOm32JL2mswUXMJgxjWMUU2N4RYphl5TaZXdCUCAk1WK 3v5Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=W3TwW4Dq; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[71.195.29.92]) by smtp.gmail.com with ESMTPSA id q15sm1626947ioi.15.2019.05.30.20.54.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 20:54:07 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, arnd@arndb.de, bjorn.andersson@linaro.org, ilias.apalodimas@linaro.org Cc: evgreen@chromium.org, benchan@google.com, ejcaruso@google.com, cpratapa@codeaurora.org, syadagir@codeaurora.org, subashab@codeaurora.org, abhishek.esse@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 09/17] soc: qcom: ipa: IPA interface to GSI Date: Thu, 30 May 2019 22:53:40 -0500 Message-Id: <20190531035348.7194-10-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190531035348.7194-1-elder@linaro.org> References: <20190531035348.7194-1-elder@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch provides interface functions supplied by the IPA layer that are called from the GSI layer. One function is called when a GSI transaction has completed. The others allow the GSI layer to inform the IPA layer when the hardware has been told it has new TREs to execute, and when the hardware has indicated transactions have completed. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_gsi.c | 48 ++++++++++++++++++++++++++++++++++++++ drivers/net/ipa/ipa_gsi.h | 49 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 97 insertions(+) create mode 100644 drivers/net/ipa/ipa_gsi.c create mode 100644 drivers/net/ipa/ipa_gsi.h -- 2.20.1 diff --git a/drivers/net/ipa/ipa_gsi.c b/drivers/net/ipa/ipa_gsi.c new file mode 100644 index 000000000000..7f8d74688c1e --- /dev/null +++ b/drivers/net/ipa/ipa_gsi.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 Linaro Ltd. + */ + +#include + +#include "gsi_trans.h" +#include "ipa.h" +#include "ipa_endpoint.h" + +void ipa_gsi_trans_complete(struct gsi_trans *trans) +{ + struct ipa *ipa = container_of(trans->gsi, struct ipa, gsi); + struct ipa_endpoint *endpoint; + + endpoint = ipa->endpoint_map[trans->channel_id]; + if (endpoint == ipa->command_endpoint) + return; /* Nothing to do for commands */ + + if (endpoint->toward_ipa) + ipa_endpoint_skb_tx_complete(trans); + else + ipa_endpoint_rx_complete(trans); +} + +void ipa_gsi_channel_tx_queued(struct gsi *gsi, u32 channel_id, u32 count, + u32 byte_count) +{ + struct ipa *ipa = container_of(gsi, struct ipa, gsi); + struct ipa_endpoint *endpoint; + + endpoint = ipa->endpoint_map[channel_id]; + if (endpoint->netdev) + netdev_sent_queue(endpoint->netdev, byte_count); +} + +void ipa_gsi_channel_tx_completed(struct gsi *gsi, u32 channel_id, u32 count, + u32 byte_count) +{ + struct ipa *ipa = container_of(gsi, struct ipa, gsi); + struct ipa_endpoint *endpoint; + + endpoint = ipa->endpoint_map[channel_id]; + if (endpoint->netdev) + netdev_completed_queue(endpoint->netdev, count, byte_count); +} diff --git a/drivers/net/ipa/ipa_gsi.h b/drivers/net/ipa/ipa_gsi.h new file mode 100644 index 000000000000..72adb520da40 --- /dev/null +++ b/drivers/net/ipa/ipa_gsi.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 Linaro Ltd. + */ +#ifndef _IPA_GSI_TRANS_H_ +#define _IPA_GSI_TRANS_H_ + +#include + +struct gsi_trans; + +/** + * ipa_gsi_trans_complete() - GSI transaction completion callback + * @gsi: GSI pointer + * @trans: Transaction that has completed + * + * This called from the GSI layer to notify the IPA layer that a + * transaction has completed. + */ +void ipa_gsi_trans_complete(struct gsi_trans *trans); + +/** + * ipa_gsi_channel_tx_queued() - GSI queued to hardware notification + * @gsi: GSI pointer + * @channel_id: Channel number + * @count: Number of transactions queued + * @byte_count: Number of bytes to transfer represented by transactions + * + * This called from the GSI layer to notify the IPA layer that some + * number of transactions have been queued to hardware for execution. + */ +void ipa_gsi_channel_tx_queued(struct gsi *gsi, u32 channel_id, u32 count, + u32 byte_count); +/** + * ipa_gsi_trans_complete() - GSI transaction completion callback +ipa_gsi_channel_tx_completed() + * @gsi: GSI pointer + * @channel_id: Channel number + * @count: Number of transactions completed since last report + * @byte_count: Number of bytes transferred represented by transactions + * + * This called from the GSI layer to notify the IPA layer that the hardware + * has reported the completion of some number of transactions. + */ +void ipa_gsi_channel_tx_completed(struct gsi *gsi, u32 channel_id, u32 count, + u32 byte_count); + +#endif /* _IPA_GSI_TRANS_H_ */ From patchwork Fri May 31 03:53:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 165502 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp186848ili; Thu, 30 May 2019 20:55:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqzm9dj3rxVVSBZHu+qMkHCIUkcPxE7BE+bnXUcIIfy5rE9bQjDHsPCOKpETEtdOxFtzeAtH X-Received: by 2002:a63:295:: with SMTP id 143mr6577152pgc.279.1559274903222; Thu, 30 May 2019 20:55:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559274903; cv=none; d=google.com; s=arc-20160816; b=XOfuJE6Bwv0yESoSd9Yq5eRCLCpYFBwym7QVHus07KZYDJONemXVC6IE4VC4Xa7OA8 SydwY7LZ9QGsSbntApIHb0UpMjjswl2kCpb9wWiuFVyAYddRykB5Jwd/etBIqW9aPHqk MkSs5l0zhKK3mbAdcW1oIaf1IGpherxvzoIVerarFz9RuTCRqCRNUOkMGW27V/YpNOlv 2ZXaWXA9cDKIPnJj2Nthuwzn5/as4dYLPKmXUAeRZwUn124JP5TqxaZCU4eX3l9BkQWW uCp0dSjIYM3R7/aNQ1+CyHuIaiduK8vglBWy8nU1jmrGEfKmtrJcB9jQYuFYp92THccL Mixw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=n9vDD3Jfc66TNCOaDCzcBm5exj2keDdJZBnw5RzUKQQ=; b=ayEn4CnDwkWhwJ79L1e2ZFXHayUi/1slhVdozSDmWpL6G+7z57XNjI7s0iqLJBole8 XM+zH4y1EpiiaX82MsSZaIXmTKZ58S/Xyq0ooDfsSTkhE4LaIXIJPYrv8AYqIE5yuvSa JiRsz3OON7sa5UhQ4jsMsyVKLv0kSrLVmwck8fe2v8xlqWBIAYHBl5v7zARtpiaSwb1J UW6nQiRxUxhbj6mnptJRolnfoehvrXIU4oc8wUzpI5wtodr7VwSy4ZsFW8F6z3GTzJsL COnL1CyZqfq1xSOnCozXfW8mBJXUoVCGxUYF0Ta+Wo/82uk3qCUA4/cU9z0eROrDEwyE mEGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BR9ktqiy; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[71.195.29.92]) by smtp.gmail.com with ESMTPSA id q15sm1626947ioi.15.2019.05.30.20.54.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 20:54:10 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, arnd@arndb.de, bjorn.andersson@linaro.org, ilias.apalodimas@linaro.org Cc: evgreen@chromium.org, benchan@google.com, ejcaruso@google.com, cpratapa@codeaurora.org, syadagir@codeaurora.org, subashab@codeaurora.org, abhishek.esse@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 11/17] soc: qcom: ipa: immediate commands Date: Thu, 30 May 2019 22:53:42 -0500 Message-Id: <20190531035348.7194-12-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190531035348.7194-1-elder@linaro.org> References: <20190531035348.7194-1-elder@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org One TX endpoint (per EE) is used for issuing immediate commands to the IPA. These commands request activites beyond simple data transfers to be done by the IPA hardware. For example, the IPA is able to manage routing packets among endpoints, and immediate commands are used to configure tables used for that routing. Immediate commands are built on top of GSI transactions. They are different from normal transfers (in that they use a special endpoint, and their "payload" is interpreted differently), so separate functions are used to issue immediate command transactions. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_cmd.c | 377 ++++++++++++++++++++++++++++++++++++++ drivers/net/ipa/ipa_cmd.h | 116 ++++++++++++ 2 files changed, 493 insertions(+) create mode 100644 drivers/net/ipa/ipa_cmd.c create mode 100644 drivers/net/ipa/ipa_cmd.h -- 2.20.1 diff --git a/drivers/net/ipa/ipa_cmd.c b/drivers/net/ipa/ipa_cmd.c new file mode 100644 index 000000000000..32b11941436d --- /dev/null +++ b/drivers/net/ipa/ipa_cmd.c @@ -0,0 +1,377 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 Linaro Ltd. + */ + +#include +#include +#include +#include + +#include "gsi.h" +#include "gsi_trans.h" +#include "ipa.h" +#include "ipa_endpoint.h" +#include "ipa_cmd.h" +#include "ipa_mem.h" + +/** + * DOC: IPA Immediate Commands + * + * The AP command TX endpoint is used to issue immediate commands to the IPA. + * An immediate command is generally used to request the IPA do something + * other than data transfer to another endpoint. + * + * Immediate commands are represented by GSI transactions just like other + * transfer requests, represented by a single GSI TRE. Each immediate + * command has a well-defined format, having a payload of a known length. + * This allows the transfer element's length field to be used to hold an + * immediate command's opcode. The payload for a command resides in DRAM + * and is described by a single scatterlist entry in its transaction. + * Commands do not require a transaction completion callback. To commit + * an immediate command transaction, either gsi_trans_commit_command() or + * gsi_trans_commit_command_timeout() is used. + */ + +#define IPA_GSI_DMA_TASK_TIMEOUT 15 /* milliseconds */ + +/** + * __ipa_cmd_timeout() - Send an immediate command with timeout + * @ipa: IPA structure + * @opcode: Immediate command opcode (must not be IPA_CMD_NONE) + * @payload: Pointer to command payload + * @size: Size of payload + * @timeout: Milliseconds to wait for completion (0 waits indefinitely) + * + * This common function implements ipa_cmd() and ipa_cmd_timeout(). It + * allocates, initializes, and commits a transaction for the immediate + * command. The transaction is committed using gsi_trans_commit_command(), + * or if a non-zero timeout is supplied, gsi_trans_commit_command_timeout(). + * + * @Return: 0 if successful, or a negative error code + */ +static int __ipa_cmd_timeout(struct ipa *ipa, enum ipa_cmd_opcode opcode, + void *payload, size_t size, u32 timeout) +{ + struct ipa_endpoint *endpoint = ipa->command_endpoint; + struct gsi_trans *trans; + int ret; + + /* assert(opcode != IPA_CMD_NONE) */ + trans = gsi_channel_trans_alloc(&ipa->gsi, endpoint->channel_id, 1); + if (!trans) + return -EBUSY; + + sg_init_one(trans->sgl, payload, size); + + if (timeout) + ret = gsi_trans_commit_command_timeout(trans, opcode, timeout); + else + ret = gsi_trans_commit_command(trans, opcode); + if (ret) + goto err_trans_free; + + return 0; + +err_trans_free: + gsi_trans_free(trans); + + return ret; +} + +static int +ipa_cmd(struct ipa *ipa, enum ipa_cmd_opcode opcode, void *payload, size_t size) +{ + return __ipa_cmd_timeout(ipa, opcode, payload, size, 0); +} + +static int ipa_cmd_timeout(struct ipa *ipa, enum ipa_cmd_opcode opcode, + void *payload, size_t size) +{ + return __ipa_cmd_timeout(ipa, opcode, payload, size, + IPA_GSI_DMA_TASK_TIMEOUT); +} + +/* Field masks for ipa_imm_cmd_hw_hdr_init_local structure fields */ +#define IPA_CMD_HDR_INIT_FLAGS_TABLE_SIZE_FMASK GENMASK(11, 0) +#define IPA_CMD_HDR_INIT_FLAGS_HDR_ADDR_FMASK GENMASK(27, 12) +#define IPA_CMD_HDR_INIT_FLAGS_RESERVED_FMASK GENMASK(28, 31) + +struct ipa_imm_cmd_hw_hdr_init_local { + u64 hdr_table_addr; + u32 flags; + u32 reserved; +}; + +/* Initialize header space in IPA-local memory */ +int ipa_cmd_hdr_init_local(struct ipa *ipa, u32 offset, u32 size) +{ + struct ipa_imm_cmd_hw_hdr_init_local *payload; + struct device *dev = &ipa->pdev->dev; + dma_addr_t addr; + void *virt; + u32 flags; + u32 max; + int ret; + + if (size > field_max(IPA_CMD_HDR_INIT_FLAGS_TABLE_SIZE_FMASK)) + return -EINVAL; + + max = field_max(IPA_CMD_HDR_INIT_FLAGS_HDR_ADDR_FMASK); + if (offset > max || ipa->shared_offset > max - offset) + return -EINVAL; + offset += ipa->shared_offset; + + /* With this command we tell the IPA where in its local memory the + * header tables reside. We also supply a (host) buffer whose + * content is copied via DMA into that table space. We just want + * to zero fill it, so a zeroed DMA buffer is all that's required + * The IPA owns the table, but the AP must initialize it. + */ + virt = dma_alloc_coherent(dev, size, &addr, GFP_KERNEL); + if (!virt) + return -ENOMEM; + + payload = kzalloc(sizeof(*payload), GFP_KERNEL); + if (!payload) { + ret = -ENOMEM; + goto out_dma_free; + } + + payload->hdr_table_addr = addr; + flags = u32_encode_bits(size, IPA_CMD_HDR_INIT_FLAGS_TABLE_SIZE_FMASK); + flags |= u32_encode_bits(offset, IPA_CMD_HDR_INIT_FLAGS_HDR_ADDR_FMASK); + payload->flags = flags; + + ret = ipa_cmd(ipa, IPA_CMD_HDR_INIT_LOCAL, payload, sizeof(*payload)); + + kfree(payload); +out_dma_free: + dma_free_coherent(dev, size, virt, addr); + + return ret; +} + +enum ipahal_pipeline_clear_option { + IPAHAL_HPS_CLEAR = 0, + IPAHAL_SRC_GRP_CLEAR = 1, + IPAHAL_FULL_PIPELINE_CLEAR = 2, +}; + +/* Field masks for ipa_imm_cmd_hw_dma_shared_mem structure fields */ +#define IPA_CMD_DMA_SHARED_FLAGS_DIRECTION_FMASK GENMASK(0, 0) +#define IPA_CMD_DMA_SHARED_FLAGS_SKIP_CLEAR_FMASK GENMASK(1, 1) +#define IPA_CMD_DMA_SHARED_FLAGS_CLEAR_OPTIONS_FMASK GENMASK(3, 2) + +struct ipa_imm_cmd_hw_dma_shared_mem { + u16 sw_reserved; + u16 size; + u16 local_addr; + u16 flags; + u64 system_addr; +}; + +/* Use a DMA command to zero a block of memory */ +int ipa_cmd_smem_dma_zero(struct ipa *ipa, u32 offset, u32 size) +{ + struct ipa_imm_cmd_hw_dma_shared_mem *payload; + struct device *dev = &ipa->pdev->dev; + dma_addr_t addr; + void *virt; + u32 val; + int ret; + + /* size must be non-zero, and must fit in a 16 bit field */ + if (!size || size > U16_MAX) + return -EINVAL; + + /* offset must fit in a 16 bit local_addr field */ + if (offset > U16_MAX || ipa->shared_offset > U16_MAX - offset) + return -EINVAL; + offset += ipa->shared_offset; + + /* A zero-filled buffer of the right size is all that's required */ + virt = dma_alloc_coherent(dev, size, &addr, GFP_KERNEL); + if (!virt) + return -ENOMEM; + + payload = kzalloc(sizeof(*payload), GFP_KERNEL); + if (!payload) { + ret = -ENOMEM; + goto out_dma_free; + } + + payload->size = size; + payload->local_addr = offset; + /* direction: 0 = write to IPA; skip clear: 0 = don't wait */ + val = u16_encode_bits(IPAHAL_HPS_CLEAR, + IPA_CMD_DMA_SHARED_FLAGS_CLEAR_OPTIONS_FMASK); + payload->flags = val; + payload->system_addr = addr; + + ret = ipa_cmd(ipa, IPA_CMD_DMA_SHARED_MEM, payload, sizeof(*payload)); + + kfree(payload); +out_dma_free: + dma_free_coherent(dev, size, virt, addr); + + return ret; +} + +/* Field masks for ipa_imm_cmd_hw_ip_fltrt_init structure fields */ +#define IPA_CMD_IP_FLTRT_FLAGS_HASH_SIZE_FMASK GENMASK_ULL(11, 0) +#define IPA_CMD_IP_FLTRT_FLAGS_HASH_ADDR_FMASK GENMASK_ULL(27, 12) +#define IPA_CMD_IP_FLTRT_FLAGS_NHASH_SIZE_FMASK GENMASK_ULL(39, 28) +#define IPA_CMD_IP_FLTRT_FLAGS_NHASH_ADDR_FMASK GENMASK_ULL(55, 40) + +struct ipa_imm_cmd_hw_ip_fltrt_init { + u64 hash_rules_addr; + u64 flags; + u64 nhash_rules_addr; +}; + +/* Configure a routing or filter table, for IPv4 or IPv6 */ +static int ipa_cmd_table_config(struct ipa *ipa, enum ipa_cmd_opcode opcode, + dma_addr_t addr, size_t size, u32 hash_offset, + u32 nhash_offset) +{ + struct ipa_imm_cmd_hw_ip_fltrt_init *payload; + u64 val; + u32 max; + int ret; + + if (size > field_max(IPA_CMD_IP_FLTRT_FLAGS_HASH_SIZE_FMASK)) + return -EINVAL; + if (size > field_max(IPA_CMD_IP_FLTRT_FLAGS_NHASH_SIZE_FMASK)) + return -EINVAL; + + max = field_max(IPA_CMD_IP_FLTRT_FLAGS_HASH_ADDR_FMASK); + if (hash_offset > max || ipa->shared_offset > max - hash_offset) + return -EINVAL; + hash_offset += ipa->shared_offset; + + max = field_max(IPA_CMD_IP_FLTRT_FLAGS_NHASH_ADDR_FMASK); + if (nhash_offset > max || ipa->shared_offset > max - nhash_offset) + return -EINVAL; + nhash_offset += ipa->shared_offset; + + payload = kzalloc(sizeof(*payload), GFP_KERNEL); + if (!payload) + return -ENOMEM; + + payload->hash_rules_addr = addr; + val = u64_encode_bits(size, IPA_CMD_IP_FLTRT_FLAGS_HASH_SIZE_FMASK); + val |= u64_encode_bits(hash_offset, + IPA_CMD_IP_FLTRT_FLAGS_HASH_ADDR_FMASK); + val |= u64_encode_bits(size, IPA_CMD_IP_FLTRT_FLAGS_NHASH_SIZE_FMASK); + val |= u64_encode_bits(nhash_offset, + IPA_CMD_IP_FLTRT_FLAGS_NHASH_ADDR_FMASK); + payload->flags = val; + payload->nhash_rules_addr = addr; + + ret = ipa_cmd(ipa, opcode, payload, sizeof(*payload)); + + kfree(payload); + + return ret; +} + +/* Configure IPv4 routing table */ +int ipa_cmd_route_config_ipv4(struct ipa *ipa, size_t size) +{ + enum ipa_cmd_opcode opcode = IPA_CMD_IP_V4_ROUTING_INIT; + u32 nhash_offset = IPA_SMEM_V4_RT_NHASH_OFFSET; + u32 hash_offset = IPA_SMEM_V4_RT_HASH_OFFSET; + dma_addr_t addr = ipa->route_addr; + + return ipa_cmd_table_config(ipa, opcode, addr, size, hash_offset, + nhash_offset); +} + +/* Configure IPv6 routing table */ +int ipa_cmd_route_config_ipv6(struct ipa *ipa, size_t size) +{ + enum ipa_cmd_opcode opcode = IPA_CMD_IP_V6_ROUTING_INIT; + u32 nhash_offset = IPA_SMEM_V6_RT_NHASH_OFFSET; + u32 hash_offset = IPA_SMEM_V6_RT_HASH_OFFSET; + dma_addr_t addr = ipa->route_addr; + + return ipa_cmd_table_config(ipa, opcode, addr, size, hash_offset, + nhash_offset); +} + +/* Configure IPv4 filter table */ +int ipa_cmd_filter_config_ipv4(struct ipa *ipa, size_t size) +{ + enum ipa_cmd_opcode opcode = IPA_CMD_IP_V4_FILTER_INIT; + u32 nhash_offset = IPA_SMEM_V4_FLT_NHASH_OFFSET; + u32 hash_offset = IPA_SMEM_V4_FLT_HASH_OFFSET; + dma_addr_t addr = ipa->filter_addr; + + return ipa_cmd_table_config(ipa, opcode, addr, size, hash_offset, + nhash_offset); +} + +/* Configure IPv6 filter table */ +int ipa_cmd_filter_config_ipv6(struct ipa *ipa, size_t size) +{ + enum ipa_cmd_opcode opcode = IPA_CMD_IP_V6_FILTER_INIT; + u32 nhash_offset = IPA_SMEM_V6_FLT_NHASH_OFFSET; + u32 hash_offset = IPA_SMEM_V6_FLT_HASH_OFFSET; + dma_addr_t addr = ipa->filter_addr; + + return ipa_cmd_table_config(ipa, opcode, addr, size, hash_offset, + nhash_offset); +} + +/* Field masks for ipa_imm_cmd_hw_dma_task_32b_addr structure fields */ +#define IPA_CMD_DMA32_TASK_SW_RSVD_FMASK GENMASK(10, 0) +#define IPA_CMD_DMA32_TASK_CMPLT_FMASK GENMASK(11, 11) +#define IPA_CMD_DMA32_TASK_EOF_FMASK GENMASK(12, 12) +#define IPA_CMD_DMA32_TASK_FLSH_FMASK GENMASK(13, 13) +#define IPA_CMD_DMA32_TASK_LOCK_FMASK GENMASK(14, 14) +#define IPA_CMD_DMA32_TASK_UNLOCK_FMASK GENMASK(15, 15) +#define IPA_CMD_DMA32_SIZE1_FMASK GENMASK(31, 16) +#define IPA_CMD_DMA32_PACKET_SIZE_FMASK GENMASK(15, 0) + +struct ipa_imm_cmd_hw_dma_task_32b_addr { + u32 size1_flags; + u32 addr1; + u32 packet_size; + u32 reserved; +}; + +/* Use a 32-bit DMA command to zero a block of memory */ +int ipa_cmd_dma_task_32(struct ipa *ipa, size_t size, dma_addr_t addr) +{ + struct ipa_imm_cmd_hw_dma_task_32b_addr *payload; + u32 size1_flags; + int ret; + + if (size > field_max(IPA_CMD_DMA32_SIZE1_FMASK)) + return -EINVAL; + if (size > field_max(IPA_CMD_DMA32_PACKET_SIZE_FMASK)) + return -EINVAL; + + payload = kzalloc(sizeof(*payload), GFP_KERNEL); + if (!payload) + return -ENOMEM; + + /* complete: 0 = don't interrupt; eof: 0 = don't assert eot */ + size1_flags = IPA_CMD_DMA32_TASK_FLSH_FMASK; + /* lock: 0 = don't lock endpoint; unlock: 0 = don't unlock */ + size1_flags |= u32_encode_bits(size, IPA_CMD_DMA32_SIZE1_FMASK); + + payload->size1_flags = size1_flags; + payload->addr1 = addr; + payload->packet_size = + u32_encode_bits(size, IPA_CMD_DMA32_PACKET_SIZE_FMASK); + + ret = ipa_cmd_timeout(ipa, IPA_CMD_DMA_TASK_32B_ADDR, payload, + sizeof(payload)); + + kfree(payload); + + return ret; +} diff --git a/drivers/net/ipa/ipa_cmd.h b/drivers/net/ipa/ipa_cmd.h new file mode 100644 index 000000000000..f69d2eaddd53 --- /dev/null +++ b/drivers/net/ipa/ipa_cmd.h @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 Linaro Ltd. + */ +#ifndef _IPA_CMD_H_ +#define _IPA_CMD_H_ + +#include + +struct sk_buff; + +struct ipa; + +/** + * enum ipa_cmd_opcode: IPA immediate commands + * + * All immediate commands are issued using the AP command TX endpoint. + * The numeric values here are the opcodes for IPA v3.5.1 hardware. + * + * IPA_CMD_NONE is a special (invalid) value that's used to indicate + * a request is *not* an immediate command. + */ +enum ipa_cmd_opcode { + IPA_CMD_NONE = 0, + IPA_CMD_IP_V4_FILTER_INIT = 3, + IPA_CMD_IP_V6_FILTER_INIT = 4, + IPA_CMD_IP_V4_ROUTING_INIT = 7, + IPA_CMD_IP_V6_ROUTING_INIT = 8, + IPA_CMD_HDR_INIT_LOCAL = 9, + IPA_CMD_DMA_TASK_32B_ADDR = 17, + IPA_CMD_DMA_SHARED_MEM = 19, +}; + +/** + * ipa_cmd_hdr_init_local() - Initialize header space in IPA-local memory + * @ipa: IPA structure + * @offset: Offset of memory to be initialized + * @size: Size of memory to be initialized + * + * @Return: 0 if successful, or a negative error code + * + * Defines the location of a block of local memory to use for + * headers and fills it with zeroes. + */ +int ipa_cmd_hdr_init_local(struct ipa *ipa, u32 offset, u32 size); + +/** + * ipa_cmd_smem_dma_zero() - Use a DMA command to zero a block of memory + * @ipa: IPA structure + * @offset: Offset of memory to be zeroed + * @size: Size in bytes of memory to be zeroed + * + * @Return: 0 if successful, or a negative error code + */ +int ipa_cmd_smem_dma_zero(struct ipa *ipa, u32 offset, u32 size); + +/** + * ipa_cmd_route_config_ipv4() - Configure IPv4 routing table + * @ipa: IPA structure + * @size: Size in bytes of table + * + * @Return: 0 if successful, or a negative error code + * + * Defines the location and size of the IPv4 routing table and + * zeroes its content. + */ +int ipa_cmd_route_config_ipv4(struct ipa *ipa, size_t size); + +/** + * ipa_cmd_route_config_ipv6() - Configure IPv6 routing table + * @ipa: IPA structure + * @size: Size in bytes of table + * + * @Return: 0 if successful, or a negative error code + * + * Defines the location and size of the IPv6 routing table and + * zeroes its content. + */ +int ipa_cmd_route_config_ipv6(struct ipa *ipa, size_t size); + +/** + * ipa_cmd_filter_config_ipv4() - Configure IPv4 filter table + * @ipa: IPA structure + * @size: Size in bytes of table + * + * @Return: 0 if successful, or a negative error code + * + * Defines the location and size of the IPv4 filter table and + * zeroes its content. + */ +int ipa_cmd_filter_config_ipv4(struct ipa *ipa, size_t size); + +/** + * ipa_cmd_filter_config_ipv6() - Configure IPv6 filter table + * @ipa: IPA structure + * @size: Size in bytes of table + * + * @Return: 0 if successful, or a negative error code + * + * Defines the location and size of the IPv6 filter table and + * zeroes its content. + */ +int ipa_cmd_filter_config_ipv6(struct ipa *ipa, size_t size); + +/** + * ipa_cmd_dma_task_32() - Use a 32-bit DMA command to zero a block of memory + * @ipa: IPA structure + * @size: Size of memory to be zeroed + * @addr: DMA address defining start of range to be zeroed + * + * @Return: 0 if successful, or a negative error code + */ +int ipa_cmd_dma_task_32(struct ipa *ipa, size_t size, dma_addr_t addr); + +#endif /* _IPA_CMD_H_ */ From patchwork Fri May 31 03:53:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 165498 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp186339ili; Thu, 30 May 2019 20:54:36 -0700 (PDT) X-Google-Smtp-Source: APXvYqyjSTCtvKq7xO4QSv3j66deKpmrlR8URnMb0Y+/Tgq1uyT0KgwxxJWi5ZjBIfjrXQMsWxm4 X-Received: by 2002:a65:5684:: with SMTP id v4mr6928525pgs.160.1559274876704; Thu, 30 May 2019 20:54:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559274876; cv=none; d=google.com; s=arc-20160816; b=pWU3untWAISCBzo4cTZwGdcNwbO2eC0bQ/a8mqdIBeexXZsplqvbay6kLWOUFR7hhk wlCAFonOvNBnublKVZbYXIFko/9u+2yedT5bXD5XDSovWGdwK7K+zV9Ao0mZ5aVAHRLD a7D/o4TGJv22h1kuxZoTu2RiYfF1kt0DBLXkRmhdxxoXElUkjCComWLuPFFHdSaqwP5t cG5hAwsyT9I9GvnGU3JN5Vtz1ZhsMIOGGh6UEl5hoDftCqxPJgCuBaMVQenvXiTW2Iip bZhT3LnO98OiJh0o2fup60PqmJb6Zjuua3xwKlHaJ8D8RXch8FjvlWZw8c/xrpbaJ0D3 tPpA== ARC-Message-Signature: i=1; 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[71.195.29.92]) by smtp.gmail.com with ESMTPSA id q15sm1626947ioi.15.2019.05.30.20.54.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 20:54:15 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, arnd@arndb.de, bjorn.andersson@linaro.org, ilias.apalodimas@linaro.org Cc: evgreen@chromium.org, benchan@google.com, ejcaruso@google.com, cpratapa@codeaurora.org, syadagir@codeaurora.org, subashab@codeaurora.org, abhishek.esse@gmail.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 15/17] MAINTAINERS: add entry for the Qualcomm IPA driver Date: Thu, 30 May 2019 22:53:46 -0500 Message-Id: <20190531035348.7194-16-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190531035348.7194-1-elder@linaro.org> References: <20190531035348.7194-1-elder@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add an entry in the MAINTAINERS file for the Qualcomm IPA driver Signed-off-by: Alex Elder --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.20.1 diff --git a/MAINTAINERS b/MAINTAINERS index 429c6c624861..a2dece647641 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12872,6 +12872,12 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers) S: Supported F: sound/soc/qcom/ +QCOM IPA DRIVER +M: Alex Elder +L: netdev@vger.kernel.org +S: Supported +F: drivers/net/ipa/ + QEMU MACHINE EMULATOR AND VIRTUALIZER SUPPORT M: Gabriel Somlo M: "Michael S. Tsirkin"