From patchwork Fri May 31 06:38:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 165511 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp318375ili; Thu, 30 May 2019 23:39:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqzRUjy3iY0S16fXuWkOcQhUuRm/GDraesK8FDrPA3bL7a8h8WziJJE2CY/Se6U5ohbn0uGI X-Received: by 2002:a63:ec42:: with SMTP id r2mr7518011pgj.262.1559284771955; Thu, 30 May 2019 23:39:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559284771; cv=none; d=google.com; s=arc-20160816; b=C9VL0C8nnpmXhNrjjDbMTdNVkKynXxYeknUs+dHh/+z+6lHE6aigdwWDuQ9mCMOHQz 39P9vijMCkJgVq5aDcZCrWy9eH3Tmh4wYuxFfxJUHEHzgzeaD+RkhrRRI4jmzJQ9Qc3K pwD/ZVDJEjBuU4XWdfv4yBJ3WpKYAWckfPXgqLbpYR0M6sYeStoRuMQUrUNuajrZdnqi iwVuKQ3oWmWj0Z4BaE0lW7pyCafrrroYQC6ILeIK7KLrriQ5ojDk0Eq66EsXQxmavcbi 21vFU1IU/DO3FZnrT3EHwgWh5rpjeJaZkXR5W2Gdd5JrV+NcK26KSqDruwCbmurX6PR+ zPEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ICFTAiKSf2WEzyVIUIY8aH5uQWN1lQV5+leEube4wOk=; b=M8SZLttQdAp5jvPzUGoe351CNvsVj/wdNSQzs0MTgJsHO8tedFk9raGaDYOgZDfBYw ZJZu4SD7vOLqa//gCTFQcqvdO5yF2SY42u4pNRwNSTOv3sfxurxOw6x/QTBY9X3DBrGE y8ouT+LxGe/JRh/xSocQ7hao3krquFDv0RU4K0Q9kddOlhFZKrJvkbpSk/qJuBZGEdZK /h0ln88s4YdINN+8i8d2wSlCVSPMQLEA289eo4UCNyugygkKWC370m+anDhvK+Rqk9aL PvwTAailz+pctKNTqWtlK95xjWhmWxIGuZx2O+7SPV2NHdBxM75pADg4Jhgpqt1rRydv uyIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yINLZjD+; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p66si5538866pfb.34.2019.05.30.23.39.31; Thu, 30 May 2019 23:39:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yINLZjD+; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726908AbfEaGjb (ORCPT + 7 others); Fri, 31 May 2019 02:39:31 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:34253 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726892AbfEaGjb (ORCPT ); Fri, 31 May 2019 02:39:31 -0400 Received: by mail-pf1-f195.google.com with SMTP id c14so3157391pfi.1 for ; Thu, 30 May 2019 23:39:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ICFTAiKSf2WEzyVIUIY8aH5uQWN1lQV5+leEube4wOk=; b=yINLZjD+HVEFLHnmBFCdaPByQVMX2rctt7beGazUFTz8SHp0i6GnldmLXvhO0SP1Mz 7fX8RkgnOgIIb2Yw3l4Y21M7JGbNFv+YLDPL4/l3XsYsQVW6gGUyANu0YsgWNQx5IlxX f8QIY1qI8vwu0jLKn8vFzYaePqLd2NGNmIQb162ZDMIqMlOf6tQ6II45zLwA26CK+O7n dPe+qTtVVsiNhNaoSnBeLdaoeawx1YDrAajs+58G5KKSDFRSeaBUkt09kb13GOd2gdBQ YMgtz5njgfXJCFAJkcKQM4lP6OFfh6dx1xvguxX/bK2i0l/RfWExcQGo9P//Xyf2munI VRhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ICFTAiKSf2WEzyVIUIY8aH5uQWN1lQV5+leEube4wOk=; b=gRGPUd5JUcnSEJUXe0Ju2jG86XLeskJRUqN5UnYJKDIGg0Tu/NO7Vx96tDV5gQnPez 5wz5+c+md5Mzt1hOfX76NPUhvTD3pC3ARDByVprISoEivxQ3N0vYRflPEcf0w6Bt4DK9 FxUyaTvU2+RvTrTlMIKm3zuBsMOrcyluQY5pg2TtEsG4PGcTKFqmrTK0ZXl4Q6d3Fcot klVOhOAYZ4VUBZc03vJvtbxW+jO8O00U29ITlVRrHMvB2wQMAvO51JoDVpZF0sJVDZTU j7O8d/9aeY7KB2/f3RoI5paea4V0lQEwF1v9BT6WHUAeo1fBMoIl2atLZaTkgaNdPpWn IU7A== X-Gm-Message-State: APjAAAXh/5TmUQwC0sSLTtLnZPdwS34L/VPlGA5bJQk1JggenIxjpA0B v2eknW8GPaHPqEOzOy6R76sL X-Received: by 2002:a17:90a:d3d7:: with SMTP id d23mr6850098pjw.26.1559284770391; Thu, 30 May 2019 23:39:30 -0700 (PDT) Received: from localhost.localdomain ([2405:204:72cb:ebf2:a51d:3877:feab:5634]) by smtp.gmail.com with ESMTPSA id y12sm4644158pgp.63.2019.05.30.23.39.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 23:39:29 -0700 (PDT) From: Manivannan Sadhasivam To: mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, robh+dt@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, loic.pallardy@st.com, Manivannan Sadhasivam Subject: [PATCH v3 3/4] dt-bindings: arm: stm32: Document Avenger96 devicetree binding Date: Fri, 31 May 2019 12:08:48 +0530 Message-Id: <20190531063849.26142-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531063849.26142-1-manivannan.sadhasivam@linaro.org> References: <20190531063849.26142-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This commit documents Avenger96 devicetree binding based on STM32MP157 SoC. Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index f53dc0f2d7b3..4d194f1eb03a 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -25,5 +25,7 @@ properties: - const: st,stm32h743 - items: + - enum: + - arrow,stm32mp157a-avenger96 # Avenger96 - const: st,stm32mp157 ... From patchwork Fri May 31 06:38:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 165512 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp318472ili; Thu, 30 May 2019 23:39:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqzIrtH/cy6/MUdeRC8LjwG/qOlGZbeM/+eUwgMuICRDt5JTqvE/l/QfmwNqmb/kU+v9MU3d X-Received: by 2002:a17:90a:fa08:: with SMTP id cm8mr7325029pjb.115.1559284779785; Thu, 30 May 2019 23:39:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559284779; cv=none; d=google.com; s=arc-20160816; b=tTuReIGv4JRrkoRIeRnd52XkdJtg9M2x45d3/7t0nzbZenL8nc6lHvozAXrZwBAFHq 1yCKY2J+7Ph9kiwnQsKjNLbtR2xAhRm7yIYkjQEHApgytWmcMIKCXym8r5HxHB1CzfW7 yQ/XGNalFh1aylUiEEIcKCINd4LuAvCFKL9nkwMwNwRR9vyWPNwaQaT89/FpnDWkPQ91 jmOsFRv4EhdLRid454Y1ag9qDiqJW4lC4pCPn+rXcGxZgf2KTaX8fjzD8G3HPu38fJBC Ki13ElDeSDW+jdCuL+84a9W56se9tUPrHfMTUPWBBzv5bbUF2eJ5GH05rx5B8vt5HlSG Fafg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dX8ayxbG6dv3ymS6EHBWk6+IbbfEAXYHv1SHsYeWqgY=; b=MgFKedxC7+K2KJzK/Y0A9RYJZob4uTG1xIUma0iTZvyeiva+AGqZe+1tyZzHW300nT XHuDe44wEX/qeBjupfGTv6oY8w9K1LhFzG1B1xwi8c6ikEeH9hKVhWnJmi2JQSRB7GJ2 8xGCBRlJFJsS0WbfWQExPRtd/eWBc8KC0I2sAHxnCJ9vJPW3VQv8TutmCR8haTWqXesh b/PdiKGQrrfn2rcsA4hT8bh5Fq0jWO+BmGxwBHEHz7DK2y5LqF8HqDxABKKCRhGsdp3k H0N7UEMWFsGw9sutBNqkfaFK2vHQmOhMshQGcGu4xqQ21YC6RWtVTCOPmp5cB8Wl4vcc VUaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=afSfjsmd; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n129si5653400pfn.106.2019.05.30.23.39.39; Thu, 30 May 2019 23:39:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=afSfjsmd; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726330AbfEaGjj (ORCPT + 7 others); Fri, 31 May 2019 02:39:39 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:39785 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726845AbfEaGji (ORCPT ); Fri, 31 May 2019 02:39:38 -0400 Received: by mail-pf1-f193.google.com with SMTP id j2so5564577pfe.6 for ; Thu, 30 May 2019 23:39:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dX8ayxbG6dv3ymS6EHBWk6+IbbfEAXYHv1SHsYeWqgY=; b=afSfjsmdZ/Ci/hZg5PTBrAS8rstadHeFAWlvjzoEpHA/2D+abqz4c1SpZO0Sn8REwU dC07f0Vt1Ln46sCvI4zu79M7vjFLtpoD3VPvCGpNnPKnYPqro3bXsL9I17LKZeEoEN6A kwahNt3djyKMHwrniAALIeocL0/Dit9yspc0Sz/YGqvCIED6K7ijECBTFNQbtBca+Ray fj7htJTtv061O9Pw8Xu5iAvLL5BMdik/GPY9kMMaPicopr7SRMWM97x8pTUL4vL62xu3 ZBrXHN+oz95MPVWdJdYSoBjBOjcYGI+NMfkpbjenfPPyBo3uQe4Q8M4mDN7ek2hupGKr XPLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dX8ayxbG6dv3ymS6EHBWk6+IbbfEAXYHv1SHsYeWqgY=; b=IaE9Ad467x3a3UCweVIXfgvCWigyNcGRYAcTBnbNMNr7NeF7VT9NDlUkQW1OPThGt5 RucFENJYI7BEY2DF+MVIlaeTZEqTWTRZs51aTpQ6fMgN4+Ypt+mapZoMB27q45caSOQl 3odij124+AW52e8QxBh2ljRZ2If4K1AOoo8wL6aVkQIMJbddpsmAjqDiqMC/+cjmanQr EWMKWLvQ6jD1k0khfZCzudkEIws+kPjNQ38uv6xHXLRA+bdSxKc9VyYV0WssL0dMqq2o r6gSF1KzTscn1FNkt4suX+I/u8//9bRWx8o17HwuEK8UfqFJoHBrS8AwzvGdF+GbNXpu cT4w== X-Gm-Message-State: APjAAAUsexTMGKqdbblG3nCWrw8tAERNqzS94Y9kC8Ns3YJ+zqtwgRIg DoRr599PRq68WhNbUFoOFtL3 X-Received: by 2002:a17:90a:4fa6:: with SMTP id q35mr7576807pjh.74.1559284777644; Thu, 30 May 2019 23:39:37 -0700 (PDT) Received: from localhost.localdomain ([2405:204:72cb:ebf2:a51d:3877:feab:5634]) by smtp.gmail.com with ESMTPSA id y12sm4644158pgp.63.2019.05.30.23.39.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 30 May 2019 23:39:37 -0700 (PDT) From: Manivannan Sadhasivam To: mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, robh+dt@kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, loic.pallardy@st.com, Manivannan Sadhasivam Subject: [PATCH v3 4/4] ARM: dts: Add Avenger96 devicetree support based on STM32MP157A Date: Fri, 31 May 2019 12:08:49 +0530 Message-Id: <20190531063849.26142-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531063849.26142-1-manivannan.sadhasivam@linaro.org> References: <20190531063849.26142-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add devicetree support for Avenger96 board based on STM32MP157A MPU from ST Micro. This board is one of the 96Boards Consumer Edition board from Arrow Electronics and has the following features: SoC: STM32MP157AAC PMIC: STPMIC1A RAM: 1024 Mbyte @ 533MHz Storage: eMMC v4.51: 8 Gbyte microSD Socket: UHS-1 v3.01 Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac Bluetooth®v4.2 (BR/EDR/BLE) USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4 LED: 4x User LED, 1x WiFi LED, 1x BT LED More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/stm32mp157a-avenger96.dts | 321 ++++++++++++++++++++ 2 files changed, 322 insertions(+) create mode 100644 arch/arm/boot/dts/stm32mp157a-avenger96.dts -- 2.17.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index dab2914fa293..918c85c227b5 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -975,6 +975,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32746g-eval.dtb \ stm32h743i-eval.dtb \ stm32h743i-disco.dtb \ + stm32mp157a-avenger96.dtb \ stm32mp157a-dk1.dtb \ stm32mp157c-dk2.dtb \ stm32mp157c-ed1.dtb \ diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts new file mode 100644 index 000000000000..9d00be78010f --- /dev/null +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved + * Author: Manivannan Sadhasivam + */ + +/dts-v1/; + +#include "stm32mp157c.dtsi" +#include "stm32mp157-pinctrl.dtsi" +#include +#include + +/ { + model = "Arrow Electronics STM32MP157A Avenger96 board"; + compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157"; + + aliases { + ethernet0 = ðernet0; + mmc0 = &sdmmc1; + serial0 = &uart4; + serial1 = &uart7; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x40000000>; + }; + + led { + compatible = "gpio-leds"; + led1 { + label = "green:user1"; + gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + led2 { + label = "green:user2"; + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + + led3 { + label = "green:user3"; + gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc1"; + default-state = "off"; + }; + + led4 { + label = "green:user3"; + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "none"; + default-state = "off"; + panic-indicator; + }; + + led5 { + label = "yellow:wifi"; + gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + led6 { + label = "blue:bt"; + gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "bluetooth-power"; + default-state = "off"; + }; + }; +}; + +ðernet0 { + status = "okay"; + pinctrl-0 = <ðernet0_rgmii_pins_a>; + pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>; + pinctrl-names = "default", "sleep"; + phy-mode = "rgmii"; + max-speed = <1000>; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@7 { + reg = <7>; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_b>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_b1 &i2c2_pins_b2>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins_a>; + i2c-scl-rising-time-ns = <185>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; + + pmic: stpmic@33 { + compatible = "st,stpmic1"; + reg = <0x33>; + interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + status = "okay"; + + st,main-control-register = <0x04>; + st,vin-control-register = <0xc0>; + st,usb-control-register = <0x30>; + + regulators { + compatible = "st,stpmic1-regulators"; + + ldo1-supply = <&v3v3>; + ldo2-supply = <&v3v3>; + ldo3-supply = <&vdd_ddr>; + ldo5-supply = <&v3v3>; + ldo6-supply = <&v3v3>; + pwr_sw1-supply = <&bst_out>; + pwr_sw2-supply = <&bst_out>; + + vddcore: buck1 { + regulator-name = "vddcore"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd_ddr: buck2 { + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd: buck3 { + regulator-name = "vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + st,mask_reset; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + v3v3: buck4 { + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-over-current-protection; + regulator-initial-mode = <0>; + }; + + vdda: ldo1 { + regulator-name = "vdda"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + v2v8: ldo2 { + regulator-name = "v2v8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + vtt_ddr: ldo3 { + regulator-name = "vtt_ddr"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + regulator-over-current-protection; + }; + + vdd_usb: ldo4 { + regulator-name = "vdd_usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + vdd_sd: ldo5 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-boot-on; + }; + + v1v8: ldo6 { + regulator-name = "v1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-enable-ramp-delay = <300000>; + }; + + vref_ddr: vref_ddr { + regulator-name = "vref_ddr"; + regulator-always-on; + regulator-over-current-protection; + }; + + bst_out: boost { + regulator-name = "bst_out"; + interrupts = ; + interrupt-parent = <&pmic>; + }; + + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-active-discharge; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; + interrupt-parent = <&pmic>; + regulator-active-discharge; + }; + }; + + onkey { + compatible = "st,stpmic1-onkey"; + interrupts = , ; + interrupt-names = "onkey-falling", "onkey-rising"; + status = "okay"; + }; + + watchdog { + compatible = "st,stpmic1-wdt"; + status = "disabled"; + }; + }; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&rng1 { + status = "okay"; +}; + +&rtc { + status = "okay"; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + broken-cd; + st,sig-dir; + st,neg-edge; + st,use-ckin; + bus-width = <4>; + vmmc-supply = <&vdd_sd>; + status = "okay"; +}; + +&uart4 { + /* On Low speed expansion header */ + label = "LS-UART1"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_b>; + status = "okay"; +}; + +&uart7 { + /* On Low speed expansion header */ + label = "LS-UART0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart7_pins_a>; + status = "okay"; +};