From patchwork Fri May 31 14:33:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 165544 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp836728ili; Fri, 31 May 2019 07:33:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqy3fOY0vIfD2XBMLDZYcrhNNQnW181SWyz+cy7NDgtR96P1QUc9vMm5rN+7CG85AuqWGlbq X-Received: by 2002:a63:31d8:: with SMTP id x207mr9072512pgx.403.1559313224425; Fri, 31 May 2019 07:33:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559313224; cv=none; d=google.com; s=arc-20160816; b=kn28iH91WPKUM1ux/VAI70eCVXaSX/xi4w0FuI+dqrx0o1rDJ/fgVSp63A65A8Y3o7 R3fH0ok8cLjHVwTv5esvdNlE945m2HTuOpaemcqg5i6FtcnrSSs+p5KLfxCnA/CMmcmd RdQNxeWu5tWt04lm0WUK7L8bZiNOIsS/rrVP5fAbpwOSP3wzAtkzEmyCdDdb38wUd0KA J+grWP51YKGearraOXhh3iuiv7JFExwTyxXAvTDyw7yYSQLZe6UjsS9UQXkqlJ//Qvks e/5Cl2428wAyY6VjUl2MOzYw331lzHAY59qkQWIpCJS9XfxZbDwFcuzf4M9lBP6H9093 9atg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=58WiEnLmdXrjQcHuG9QYSOwxMr5Fr2ftUTgNZ2DlAEI=; b=m/o0WoL0hpYp7X4Lx8KUwgRkAnJ/lQzsZGGLzhApXNwF1TJErN2pUZmcU2acpKGqOs paJxXhsy9FCovdnJl51B9Sy30H48Hw1FOtJmS21tfr60sDuARmmMWbCDjoiFEhoFKb6I Afk48ckdT8Xrw96sI/9SCJdWqURu1NK917C7kREWVwOdDF+iDPi8qMwZwQ/Fh3Bku5KV ur4+TlfdOkpFR3gpHcOYA+xDWcxRUHC9aXQSsIjmc1mSQb1e8l4lICTJFD9r2WsYTelS vlg0mPzNt9Ltw031DlyE6PMsCktpze4fKbzTgMrvcO911ps+ZdZSSWDmGR0CmvXkGmrU TIrQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f9si6057694pgv.5.2019.05.31.07.33.42; Fri, 31 May 2019 07:33:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726806AbfEaOdk (ORCPT + 30 others); Fri, 31 May 2019 10:33:40 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:52430 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726722AbfEaOdi (ORCPT ); Fri, 31 May 2019 10:33:38 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4C90415AD; Fri, 31 May 2019 07:33:38 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9FEBE3F5AF; Fri, 31 May 2019 07:33:36 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jassi Brar , Arnd Bergmann Cc: Sudeep Holla , Bjorn Andersson , Rob Herring , Mark Brown , Cristian Marussi Subject: [PATCH 1/6] mailbox: add support for doorbell/signal mode controllers Date: Fri, 31 May 2019 15:33:15 +0100 Message-Id: <20190531143320.8895-2-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531143320.8895-1-sudeep.holla@arm.com> References: <20190531143320.8895-1-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some mailbox controllers are lack FIFOs or memory to transmit data. They typically contains single doorbell registers to just signal the remote. The actually data is transmitted/shared using some shared memory which is not part of the mailbox. Such controllers don't need to transmit any data, they just transmit the signal. In such controllers the data pointer passed to mbox_send_message is passed to client via it's tx_prepare callback. Controller doesn't need any data to be passed from the client. This patch introduce the new API send_signal to support such doorbell/ signal mode in mailbox controllers. This is useful to avoid another layer of abstraction as typically multiple channels can be multiplexied into single register. Cc: Jassi Brar Cc: Arnd Bergmann Cc: Bjorn Andersson Signed-off-by: Sudeep Holla --- drivers/mailbox/mailbox.c | 11 ++++++++++- include/linux/mailbox_controller.h | 11 +++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/mailbox/mailbox.c b/drivers/mailbox/mailbox.c index 38d9df3fb199..e26a079f8223 100644 --- a/drivers/mailbox/mailbox.c +++ b/drivers/mailbox/mailbox.c @@ -77,7 +77,10 @@ static void msg_submit(struct mbox_chan *chan) if (chan->cl->tx_prepare) chan->cl->tx_prepare(chan->cl, data); /* Try to submit a message to the MBOX controller */ - err = chan->mbox->ops->send_data(chan, data); + if (chan->mbox->ops->send_data) + err = chan->mbox->ops->send_data(chan, data); + else + err = chan->mbox->ops->send_signal(chan); if (!err) { chan->active_req = data; chan->msg_count--; @@ -481,6 +484,12 @@ int mbox_controller_register(struct mbox_controller *mbox) /* Sanity check */ if (!mbox || !mbox->dev || !mbox->ops || !mbox->num_chans) return -EINVAL; + /* + * A controller can support either doorbell mode or normal message + * transmission mode but not both + */ + if (mbox->ops->send_data && mbox->ops->send_signal) + return -EINVAL; if (mbox->txdone_irq) txdone = TXDONE_BY_IRQ; diff --git a/include/linux/mailbox_controller.h b/include/linux/mailbox_controller.h index 4994a438444c..b3f547ad782a 100644 --- a/include/linux/mailbox_controller.h +++ b/include/linux/mailbox_controller.h @@ -24,6 +24,16 @@ struct mbox_chan; * transmission of data is reported by the controller via * mbox_chan_txdone (if it has some TX ACK irq). It must not * sleep. + * @send_signal: The API asks the MBOX controller driver, in atomic + * context try to transmit a signal on the bus. Returns 0 if + * data is accepted for transmission, -EBUSY while rejecting + * if the remote hasn't yet absorbed the last signal sent. Actual + * transmission of data must be handled by the client and is + * reported by the controller via mbox_chan_txdone (if it has + * some TX ACK irq). It must not sleep. Unlike send_data, + * send_signal doesn't handle any messages/data. It just sends + * notification signal(doorbell) and client needs to prepare all + * the data. * @flush: Called when a client requests transmissions to be blocking but * the context doesn't allow sleeping. Typically the controller * will implement a busy loop waiting for the data to flush out. @@ -49,6 +59,7 @@ struct mbox_chan; */ struct mbox_chan_ops { int (*send_data)(struct mbox_chan *chan, void *data); + int (*send_signal)(struct mbox_chan *chan); int (*flush)(struct mbox_chan *chan, unsigned long timeout); int (*startup)(struct mbox_chan *chan); void (*shutdown)(struct mbox_chan *chan); From patchwork Fri May 31 14:33:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 165549 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp837190ili; Fri, 31 May 2019 07:34:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqyB9p6Z9tnXOuMlpLU6qfWneIN5nqMJKObm0PxPxwgz+3uPKXx4fxJX4VfCG6BGtRcGEv0V X-Received: by 2002:a17:902:758b:: with SMTP id j11mr9821280pll.191.1559313246329; Fri, 31 May 2019 07:34:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559313246; cv=none; d=google.com; s=arc-20160816; b=xxm6HH+fFPI1P02YqJiSbG8wJ6IPnBUnCDnGrUeAriJHTis9b7XxmkwDqZvZK9dKcG iAmnzG4FJOTSTnuP3pEz5kdIQTnGbAHtGwtuF0ojYAs/B3G+hszE5vYTPaU+YWhy0viL 7B15NH9d8nbFhcmgdCTMg7ZbQkCddAsZj1nggtRSuLfnDI6kERIEdX+pujtCig9o/ggM TbQ0kMv7mQ4lEI/JrL5h8H0c5MVJrYFeyXQJpnPm911iP3jSzpz3IujoGniRZRRV8DUO MdNxN/mb5krKmVxDYt5GaNSHY8rVy8bLk/WE6bDedB2SgECbHq/nJ6dayyWxQQtjcll6 kbGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=nz5ySrJ+5PyJDDhBM6yg4fImDp4jw1NZ0YG3T5P1T54=; b=R1cVvqssZk5sZpZTarRtE7H4IAco6d8XUCiI5GZI2uIfnZk0+5Z4cbNFXouQqn8jL2 2BEopVputrxq5o7jbj4Ru1DuG5EZXZKMtgDkRy1cqo0pJxT6SxWcLfnkO3KA0SdKD0Zs G3frFWQowI098hmnYrLGaUxYxyiFSJ22cozVVHbg2VDq+vy5SkhCGlY78my0iUf8lpVp j2HTMfviE2rHqDQatxzISRANpbPic9b5brHYEm7ALnn49Qz7poxOosX/avTdt/DrSaXr +pa/hqIwBoKLLsnPHcjXCMyRdsWM06Wrli+IGuHrjSSFnLmVyVzJWAXMwrKCgX/vtSgb SZww== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t9si4943607pjw.35.2019.05.31.07.34.04; Fri, 31 May 2019 07:34:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726829AbfEaOdn (ORCPT + 30 others); Fri, 31 May 2019 10:33:43 -0400 Received: from foss.arm.com ([217.140.101.70]:52452 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726808AbfEaOdk (ORCPT ); Fri, 31 May 2019 10:33:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 61CED165C; Fri, 31 May 2019 07:33:40 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8AFE53F5AF; Fri, 31 May 2019 07:33:38 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jassi Brar , Arnd Bergmann Cc: Sudeep Holla , Bjorn Andersson , Rob Herring , Mark Brown , Cristian Marussi , Jassi Brar Subject: [PATCH 2/6] mailbox: arm_mhu: reorder header inclusion and drop unneeded ones Date: Fri, 31 May 2019 15:33:16 +0100 Message-Id: <20190531143320.8895-3-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531143320.8895-1-sudeep.holla@arm.com> References: <20190531143320.8895-1-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch just re-orders some of the headers includes and also drop the ones that are unnecessary. Cc: Jassi Brar Signed-off-by: Sudeep Holla --- drivers/mailbox/arm_mhu.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) -- 2.17.1 diff --git a/drivers/mailbox/arm_mhu.c b/drivers/mailbox/arm_mhu.c index 64d85c6a2bdf..747cab1090ff 100644 --- a/drivers/mailbox/arm_mhu.c +++ b/drivers/mailbox/arm_mhu.c @@ -13,16 +13,13 @@ * GNU General Public License for more details. */ -#include -#include -#include -#include -#include +#include +#include #include +#include #include -#include -#include #include +#include #define INTR_STAT_OFS 0x0 #define INTR_SET_OFS 0x8 From patchwork Fri May 31 14:33:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 165545 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp836802ili; Fri, 31 May 2019 07:33:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqx+N7NptkBWkljFseUevNbdh9ztsU/uBJpoJZMSWFbsAeCavrdDXTwv316z1r2m8b6gXz5C X-Received: by 2002:a17:902:b089:: with SMTP id p9mr10179658plr.38.1559313227908; Fri, 31 May 2019 07:33:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559313227; cv=none; d=google.com; s=arc-20160816; b=N3wq6+7gh62SExLC65kN8LpHE2h5rlBm41Q3IPkOk4D1tUZJ19jybjmMD7wIjSFB4D 42GRi0uqqCeO8aogqb8JuKtTqvnU+2S8hfCA0RBS3ktyizdHUX5QgSiMrBce0J/aC8cx 2MLtZNM8ylRri30OZsq0vCvyRVinCm7hdCsdhAIWhIAwUtXTwSqVCNwXzQYAAr/RyZZa W4rTJvaOE00B1USdLo4ZiBwshyQY+DI/frezet+8vfkfRSfDetsoMCFGTGhyJdovWawC nhevVlXaCOAHuumBhV/CGRAAJl4xM/uX2dUfROWGPELRQ3kKdxWV4CHMKV9sWePDJFz4 fnTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=9dUqXJPjhR62u0bbJ96kJMGG9uiX/WHXNWJr7JLytE0=; b=fTthbJF37F5HpqgvSZhv2VgFWTT/vgmtlAcpd1n6MzaBdRIQl6IScTHFq2phtc5XT6 EahQH1ocVwx+/7egly/iPrQKvI68hItIp/9hfj84FHezBlHXuWb6rSue3Ce4wHHoEa6P 3ZDY3TEGe5BlFzoYrGRQLDHeX3QkW5I9pPVHTaddW5Zmtv7/xuXpg0yA6M7yAhW+nbQH 2nB2IvSW6vpw35f5XS85KYKdFj2XeQ4gil6P6cU+cX8OXwmnIXWnGfiPLRc0vcZZTVNs NvnoK75ahNHyLMy5KqxPdv0hYlE1OMHYj5+pr+nOwDsh6jwf0Ghj+wHOCydoVQktiiRu tx7Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m1si6508622pld.236.2019.05.31.07.33.45; Fri, 31 May 2019 07:33:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726849AbfEaOdo (ORCPT + 30 others); Fri, 31 May 2019 10:33:44 -0400 Received: from foss.arm.com ([217.140.101.70]:52470 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726823AbfEaOdm (ORCPT ); Fri, 31 May 2019 10:33:42 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8FD911684; Fri, 31 May 2019 07:33:42 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9FB433F5AF; Fri, 31 May 2019 07:33:40 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jassi Brar , Arnd Bergmann Cc: Sudeep Holla , Bjorn Andersson , Rob Herring , Mark Brown , Cristian Marussi , Jassi Brar , devicetree@vger.kernel.org Subject: [PATCH 3/6] dt-bindings: mailbox: add bindings to support ARM MHU doorbells Date: Fri, 31 May 2019 15:33:17 +0100 Message-Id: <20190531143320.8895-4-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531143320.8895-1-sudeep.holla@arm.com> References: <20190531143320.8895-1-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ARM MHU has mechanism to assert interrupt signals to facilitate inter-processor message based communication. It drives the signal using a 32-bit register, with all 32-bits logically ORed together. It also enables software to set, clear and check the status of each of the bits of this register independently. Each bit of the register can be associated with a type of event that can contribute to raising the interrupt thereby allowing it to be used as independent doorbells. Since the first version of this binding can't support doorbells, this patch extends the existing binding to support them by allowing "#mbox-cells" to be 2. Cc: Jassi Brar Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Sudeep Holla --- .../devicetree/bindings/mailbox/arm-mhu.txt | 39 ++++++++++++++++++- 1 file changed, 37 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt index 4971f03f0b33..ba659bcc7109 100644 --- a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt +++ b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt @@ -10,6 +10,15 @@ STAT register and the remote clears it after having read the data. The last channel is specified to be a 'Secure' resource, hence can't be used by Linux running NS. +The MHU drives the interrupt signal using a 32-bit register, with all +32-bits logically ORed together. It provides a set of registers to +enable software to set, clear and check the status of each of the bits +of this register independently. The use of 32 bits per interrupt line +enables software to provide more information about the source of the +interrupt. For example, each bit of the register can be associated with +a type of event that can contribute to raising the interrupt. Each of +the 32-bits can be used as "doorbell" to alert the remote processor. + Mailbox Device Node: ==================== @@ -18,13 +27,21 @@ used by Linux running NS. - compatible: Shall be "arm,mhu" & "arm,primecell" - reg: Contains the mailbox register address range (base address and length) -- #mbox-cells Shall be 1 - the index of the channel needed. +- #mbox-cells Shall be 1 - the index of the channel needed when + not used as set of doorbell bits. + Shall be 2 - the index of the channel needed, and + the index of the doorbell bit within the channel + when used in doorbell mode. - interrupts: Contains the interrupt information corresponding to - each of the 3 links of MHU. + each of the 3 physical channels of MHU namely low + priority non-secure, high priority non-secure and + secure channels. Example: -------- +1. Controller which doesn't support doorbells + mhu: mailbox@2b1f0000 { #mbox-cells = <1>; compatible = "arm,mhu", "arm,primecell"; @@ -41,3 +58,21 @@ used by Linux running NS. reg = <0 0x2e000000 0x4000>; mboxes = <&mhu 1>; /* HP-NonSecure */ }; + +2. Controller which supports doorbells + + mhu: mailbox@2b1f0000 { + #mbox-cells = <2>; + compatible = "arm,mhu", "arm,primecell"; + reg = <0 0x2b1f0000 0x1000>; + interrupts = <0 36 4>, /* LP-NonSecure */ + <0 35 4>; /* HP-NonSecure */ + clocks = <&clock 0 2 1>; + clock-names = "apb_pclk"; + }; + + mhu_client: scb@2e000000 { + compatible = "arm,scpi"; + reg = <0 0x2e000000 0x200>; + mboxes = <&mhu 1 4>; /* HP-NonSecure 5th doorbell bit */ + }; From patchwork Fri May 31 14:33:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 165546 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp836863ili; Fri, 31 May 2019 07:33:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqybIQSeLwG7R4mGmcAkmLQywXgTP5+cJ8rOVgtr8Gm2SF3GrZssh6eg89Epj2Lvx8bemQMr X-Received: by 2002:a17:90a:808a:: with SMTP id c10mr9522515pjn.67.1559313230644; Fri, 31 May 2019 07:33:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559313230; cv=none; d=google.com; s=arc-20160816; b=t7Vd3eO4CNSZbAFnKaCPWL4db2SntJCSwifS8AofSBN8pW31Or62ugz6R/Q5GqlbPF cBmuCTfXST1jnYuakeo0FAk8lrrDCnHjrEXd2EzT81k7ND1XL/teP1gbqMlkQCYX6kST 8TOERal+XLugQAhGRrlOToxKC5ze8E5sQF9ILzjJw4OljM4FmFPnV2LieNXmmHA64adn EUjyWxJnHSMLljiMH2vPXO5UhZkOnC8ZrgvSARlrUj9waDonTS4fROvp0nj73ThGaAP9 8FqJnlKk6BEh9oSgKjrCJucU4AqzpRvsT+HBcLUEKHiBkkrCvDN6bDbEceSiya5sAaRj bMFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=wLVwOfX6MkL3qpvTbtWHf0oV4SAFGmNdb3XO/qmDxqA=; b=eSEjxzxv2R4q2WRjw5yxpbycI+erociRquxJVNBanYwRD1sa5rOI3g7BDyN+Y9nvU4 QZJjBbuJGrJjNKXBCxsvHOWqSDuTwFPL9Ron+vFQqkwHgy+gCUdbPoygkhNeyau0Rj5h F+nYKO+5bdDT99ctETRY5ANtQHmjmHRhg9ai+hBUeLWiZw1uGvXc8lIDr8PHDmU8YnRK R5PDJ/R6h5MrRBKchfYs/eOpFGqK6Mi+nvkDwPrlchqd8I1rSBrKLEMXLNeJAQ068pTN 7uzn5RgVCbNPvVsPgymml7hPrAF+s0OYKAOQRbHaYIvTRvjufximIJfIDsxYGhwMoaMw +TrQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m1si6508622pld.236.2019.05.31.07.33.48; Fri, 31 May 2019 07:33:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726874AbfEaOdq (ORCPT + 30 others); Fri, 31 May 2019 10:33:46 -0400 Received: from foss.arm.com ([217.140.101.70]:52484 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726823AbfEaOdo (ORCPT ); Fri, 31 May 2019 10:33:44 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9AE08341; Fri, 31 May 2019 07:33:44 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CE21A3F5AF; Fri, 31 May 2019 07:33:42 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jassi Brar , Arnd Bergmann Cc: Sudeep Holla , Bjorn Andersson , Rob Herring , Mark Brown , Cristian Marussi , Jassi Brar Subject: [PATCH 4/6] mailbox: arm_mhu: migrate to threaded irq handler Date: Fri, 31 May 2019 15:33:18 +0100 Message-Id: <20190531143320.8895-5-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531143320.8895-1-sudeep.holla@arm.com> References: <20190531143320.8895-1-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In preparation to introduce support for doorbells which require the interrupt handlers to be threaded, this patch moves the existing interrupt handler to threaded handler. Also it moves out the registering and freeing of the handlers from the mailbox startup and shutdown methods. This also is required to support doorbells. Cc: Jassi Brar Signed-off-by: Sudeep Holla --- drivers/mailbox/arm_mhu.c | 46 +++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 24 deletions(-) -- 2.17.1 diff --git a/drivers/mailbox/arm_mhu.c b/drivers/mailbox/arm_mhu.c index 747cab1090ff..98838d5ae108 100644 --- a/drivers/mailbox/arm_mhu.c +++ b/drivers/mailbox/arm_mhu.c @@ -84,33 +84,16 @@ static int mhu_startup(struct mbox_chan *chan) { struct mhu_link *mlink = chan->con_priv; u32 val; - int ret; val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS); - ret = request_irq(mlink->irq, mhu_rx_interrupt, - IRQF_SHARED, "mhu_link", chan); - if (ret) { - dev_err(chan->mbox->dev, - "Unable to acquire IRQ %d\n", mlink->irq); - return ret; - } - return 0; } -static void mhu_shutdown(struct mbox_chan *chan) -{ - struct mhu_link *mlink = chan->con_priv; - - free_irq(mlink->irq, chan); -} - static const struct mbox_chan_ops mhu_ops = { .send_data = mhu_send_data, .startup = mhu_startup, - .shutdown = mhu_shutdown, .last_tx_done = mhu_last_tx_done, }; @@ -132,13 +115,6 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) return PTR_ERR(mhu->base); } - for (i = 0; i < MHU_CHANS; i++) { - mhu->chan[i].con_priv = &mhu->mlink[i]; - mhu->mlink[i].irq = adev->irq[i]; - mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i]; - mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; - } - mhu->mbox.dev = dev; mhu->mbox.chans = &mhu->chan[0]; mhu->mbox.num_chans = MHU_CHANS; @@ -155,6 +131,28 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) return err; } + for (i = 0; i < MHU_CHANS; i++) { + int irq = mhu->mlink[i].irq = adev->irq[i]; + + if (irq <= 0) { + dev_dbg(dev, "No IRQ found for Channel %d\n", i); + continue; + } + + mhu->chan[i].con_priv = &mhu->mlink[i]; + mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i]; + mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; + + err = devm_request_threaded_irq(dev, irq, NULL, + mhu_rx_interrupt, IRQF_ONESHOT, + "mhu_link", &mhu->chan[i]); + if (err) { + dev_err(dev, "Can't claim IRQ %d\n", irq); + mbox_controller_unregister(&mhu->mbox); + return err; + } + } + dev_info(dev, "ARM MHU Mailbox registered\n"); return 0; } From patchwork Fri May 31 14:33:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 165547 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp836919ili; Fri, 31 May 2019 07:33:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqxpsHtBlcRP3fr+bEI4zKE4smgp0qHTGDPuRX42I4Y1LjGwaeAX3bWuE9suPM7w6ockFsZj X-Received: by 2002:a17:90a:bb8d:: with SMTP id v13mr9547222pjr.79.1559313233704; Fri, 31 May 2019 07:33:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559313233; cv=none; d=google.com; s=arc-20160816; b=xLEFR+SWGcqnmXigVME/DjiNZfYujOTEQWAtgzXGi4d0O7NC0hXlJo0/lQ3lwGHqLQ 2qeZPGzPjk1I78rDwuZKo9/YP/9AhwOmvJPk3g8ejqQ0iX2svHya4DffFOkQjcVQsAgj cK1Vhf8qXaB0BEWwJHAdpWjl/OaptIvjkNyMWwA3aM9trhJ8gtJu4t7NW5Ajo55VFZaw XofWM5zheZyXbYSS7v1FmFi7OQ85ZhOoTOBf+z+n1HGpC6tYgvYRaqbpPdEZIqq/5MYf gc016eNzhjtdZ1LeQb4mRKN6MQGiCGQojiXrpaR+dG/7aRULpLcdXJ8fp69KZJRu5YuL uYqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=LD5E78BpsUXSY/6Okvvwo7Hoa3ibl0fPraZ/5xobvf4=; b=r5ChjhugIP6bRuASPY7P1vv7fY23Owaf3TsMh93tF+JYKfvGbruPYg1hy9FKI7Zl4O DCDbMwg68eDO/HdodH9EkuUrsIAUHvV3hrcv7+TxwJUVKCKeZMKoKwm6skRvO3B0f+UB iSf/GsYOdH6JbtJveSmBZ/YJXC3+GAJWp8ZhcJDrEkvWmn81aUqyCM2oG9Y9NKNEvs1Y 6wt6JmqHbfXEDe63xyX7NkYnfYCDcCyZ8giIuIfk7+rn/daJw4kTtCAMC5KN93zi1Cc3 fF95rl8s7wHCL0CFumViGObOYIJQNuUg7BMV2fc2X6Id7uBAF+ijCZVjWPKyqO1ycL3Q FNtQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i33si6608975pld.312.2019.05.31.07.33.51; Fri, 31 May 2019 07:33:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726894AbfEaOdt (ORCPT + 30 others); Fri, 31 May 2019 10:33:49 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:52502 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726823AbfEaOdr (ORCPT ); Fri, 31 May 2019 10:33:47 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A603215AD; Fri, 31 May 2019 07:33:46 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D92713F5AF; Fri, 31 May 2019 07:33:44 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jassi Brar , Arnd Bergmann Cc: Sudeep Holla , Bjorn Andersson , Rob Herring , Mark Brown , Cristian Marussi , Jassi Brar Subject: [PATCH 5/6] mailbox: arm_mhu: re-factor data structure to add doorbell support Date: Fri, 31 May 2019 15:33:19 +0100 Message-Id: <20190531143320.8895-6-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531143320.8895-1-sudeep.holla@arm.com> References: <20190531143320.8895-1-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In order to support doorbells, we need a bit of reword around data structures that are per-channel. Since the number of doorbells are not fixed though restricted to maximum of 20, the channel assignment and initialization is move to xlate function. This patch also adds the platform data for the existing support of one channel per physical channel. Cc: Jassi Brar Signed-off-by: Sudeep Holla --- drivers/mailbox/arm_mhu.c | 209 ++++++++++++++++++++++++++++++++++---- 1 file changed, 187 insertions(+), 22 deletions(-) -- 2.17.1 diff --git a/drivers/mailbox/arm_mhu.c b/drivers/mailbox/arm_mhu.c index 98838d5ae108..c944ca121e9e 100644 --- a/drivers/mailbox/arm_mhu.c +++ b/drivers/mailbox/arm_mhu.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include #define INTR_STAT_OFS 0x0 #define INTR_SET_OFS 0x8 @@ -30,7 +32,8 @@ #define MHU_SEC_OFFSET 0x200 #define TX_REG_OFFSET 0x100 -#define MHU_CHANS 3 +#define MHU_NUM_PCHANS 3 /* Secure, Non-Secure High and Low Priority */ +#define MHU_CHAN_MAX 20 /* Max channels to save on unused RAM */ struct mhu_link { unsigned irq; @@ -40,53 +43,175 @@ struct mhu_link { struct arm_mhu { void __iomem *base; - struct mhu_link mlink[MHU_CHANS]; - struct mbox_chan chan[MHU_CHANS]; + struct mhu_link mlink[MHU_NUM_PCHANS]; struct mbox_controller mbox; + struct device *dev; }; +/** + * ARM MHU Mailbox platform specific configuration + * + * @num_pchans: Maximum number of physical channels + * @num_doorbells: Maximum number of doorbells per physical channel + */ +struct mhu_mbox_pdata { + unsigned int num_pchans; + unsigned int num_doorbells; + bool support_doorbells; +}; + +/** + * ARM MHU Mailbox allocated channel information + * + * @mhu: Pointer to parent mailbox device + * @pchan: Physical channel within which this doorbell resides in + * @doorbell: doorbell number pertaining to this channel + */ +struct mhu_channel { + struct arm_mhu *mhu; + unsigned int pchan; + unsigned int doorbell; +}; + +static inline struct mbox_chan * +mhu_mbox_to_channel(struct mbox_controller *mbox, + unsigned int pchan, unsigned int doorbell) +{ + int i; + struct mhu_channel *chan_info; + + for (i = 0; i < mbox->num_chans; i++) { + chan_info = mbox->chans[i].con_priv; + if (chan_info && chan_info->pchan == pchan && + chan_info->doorbell == doorbell) + return &mbox->chans[i]; + } + + dev_err(mbox->dev, + "Channel not registered: physical channel: %d doorbell: %d\n", + pchan, doorbell); + + return NULL; +} + +static unsigned int mhu_mbox_irq_to_pchan_num(struct arm_mhu *mhu, int irq) +{ + unsigned int pchan; + struct mhu_mbox_pdata *pdata = dev_get_platdata(mhu->dev); + + for (pchan = 0; pchan < pdata->num_pchans; pchan++) + if (mhu->mlink[pchan].irq == irq) + break; + return pchan; +} + +static struct mbox_chan *mhu_mbox_xlate(struct mbox_controller *mbox, + const struct of_phandle_args *spec) +{ + struct arm_mhu *mhu = dev_get_drvdata(mbox->dev); + struct mhu_mbox_pdata *pdata = dev_get_platdata(mhu->dev); + struct mhu_channel *chan_info; + struct mbox_chan *chan = NULL; + unsigned int pchan = spec->args[0]; + unsigned int doorbell = pdata->support_doorbells ? spec->args[1] : 0; + int i; + + /* Bounds checking */ + if (pchan >= pdata->num_pchans || doorbell >= pdata->num_doorbells) { + dev_err(mbox->dev, + "Invalid channel requested pchan: %d doorbell: %d\n", + pchan, doorbell); + return ERR_PTR(-EINVAL); + } + + for (i = 0; i < mbox->num_chans; i++) { + chan_info = mbox->chans[i].con_priv; + + /* Is requested channel free? */ + if (chan_info && + mbox->dev == chan_info->mhu->dev && + pchan == chan_info->pchan && + doorbell == chan_info->doorbell) { + dev_err(mbox->dev, "Channel in use\n"); + return ERR_PTR(-EBUSY); + } + + /* + * Find the first free slot, then continue checking + * to see if requested channel is in use + */ + if (!chan && !chan_info) + chan = &mbox->chans[i]; + } + + if (!chan) { + dev_err(mbox->dev, "No free channels left\n"); + return ERR_PTR(-EBUSY); + } + + chan_info = devm_kzalloc(mbox->dev, sizeof(*chan_info), GFP_KERNEL); + if (!chan_info) + return ERR_PTR(-ENOMEM); + + chan_info->mhu = mhu; + chan_info->pchan = pchan; + chan_info->doorbell = doorbell; + + chan->con_priv = chan_info; + + dev_dbg(mbox->dev, "mbox: created channel phys: %d doorbell: %d\n", + pchan, doorbell); + + return chan; +} + static irqreturn_t mhu_rx_interrupt(int irq, void *p) { - struct mbox_chan *chan = p; - struct mhu_link *mlink = chan->con_priv; + struct arm_mhu *mhu = p; + unsigned int pchan = mhu_mbox_irq_to_pchan_num(mhu, irq); + struct mbox_chan *chan = mhu_mbox_to_channel(&mhu->mbox, pchan, 0); + void __iomem *base = mhu->mlink[pchan].rx_reg; u32 val; - val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS); + val = readl_relaxed(base + INTR_STAT_OFS); if (!val) return IRQ_NONE; mbox_chan_received_data(chan, (void *)&val); - writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS); + writel_relaxed(val, base + INTR_CLR_OFS); return IRQ_HANDLED; } static bool mhu_last_tx_done(struct mbox_chan *chan) { - struct mhu_link *mlink = chan->con_priv; - u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; + u32 val = readl_relaxed(base + INTR_STAT_OFS); return (val == 0); } static int mhu_send_data(struct mbox_chan *chan, void *data) { - struct mhu_link *mlink = chan->con_priv; + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; u32 *arg = data; - writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS); + writel_relaxed(*arg, base + INTR_SET_OFS); return 0; } static int mhu_startup(struct mbox_chan *chan) { - struct mhu_link *mlink = chan->con_priv; + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; u32 val; - val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); - writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS); + val = readl_relaxed(base + INTR_STAT_OFS); + writel_relaxed(val, base + INTR_CLR_OFS); return 0; } @@ -97,14 +222,47 @@ static const struct mbox_chan_ops mhu_ops = { .last_tx_done = mhu_last_tx_done, }; +static const struct mhu_mbox_pdata arm_mhu_pdata = { + .num_pchans = 3, + .num_doorbells = 1, + .support_doorbells = false, +}; + static int mhu_probe(struct amba_device *adev, const struct amba_id *id) { - int i, err; + u32 cell_count; + int i, err, max_chans; struct arm_mhu *mhu; + struct mbox_chan *chans; + struct mhu_mbox_pdata *pdata; struct device *dev = &adev->dev; - int mhu_reg[MHU_CHANS] = {MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET}; + struct device_node *np = dev->of_node; + int mhu_reg[MHU_NUM_PCHANS] = { + MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET, + }; + + err = of_property_read_u32(np, "#mbox-cells", &cell_count); + if (err) { + dev_err(dev, "failed to read #mbox-cells in %s\n", + np->full_name); + return err; + } + + if (cell_count == 1) { + max_chans = MHU_NUM_PCHANS; + pdata = (struct mhu_mbox_pdata *)&arm_mhu_pdata; + } else { + dev_err(dev, "incorrect value of #mbox-cells in %s\n", + np->full_name); + return -EINVAL; + } + + if (pdata->num_pchans > MHU_NUM_PCHANS) { + dev_err(dev, "Number of physical channel can't exceed %d\n", + MHU_NUM_PCHANS); + return -EINVAL; + } - /* Allocate memory for device */ mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL); if (!mhu) return -ENOMEM; @@ -115,14 +273,22 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) return PTR_ERR(mhu->base); } + chans = devm_kcalloc(dev, max_chans, sizeof(*chans), GFP_KERNEL); + if (!chans) + return -ENOMEM; + + dev->platform_data = pdata; + + mhu->dev = dev; mhu->mbox.dev = dev; - mhu->mbox.chans = &mhu->chan[0]; - mhu->mbox.num_chans = MHU_CHANS; + mhu->mbox.chans = chans; + mhu->mbox.num_chans = max_chans; mhu->mbox.ops = &mhu_ops; mhu->mbox.txdone_irq = false; mhu->mbox.txdone_poll = true; mhu->mbox.txpoll_period = 1; + mhu->mbox.of_xlate = mhu_mbox_xlate; amba_set_drvdata(adev, mhu); err = devm_mbox_controller_register(dev, &mhu->mbox); @@ -131,7 +297,7 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) return err; } - for (i = 0; i < MHU_CHANS; i++) { + for (i = 0; i < pdata->num_pchans; i++) { int irq = mhu->mlink[i].irq = adev->irq[i]; if (irq <= 0) { @@ -139,13 +305,12 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) continue; } - mhu->chan[i].con_priv = &mhu->mlink[i]; mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i]; mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; err = devm_request_threaded_irq(dev, irq, NULL, mhu_rx_interrupt, IRQF_ONESHOT, - "mhu_link", &mhu->chan[i]); + "mhu_link", mhu); if (err) { dev_err(dev, "Can't claim IRQ %d\n", irq); mbox_controller_unregister(&mhu->mbox); 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[209.132.180.67]) by mx.google.com with ESMTP id y22si6189623pgj.402.2019.05.31.07.33.54; Fri, 31 May 2019 07:33:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726912AbfEaOdx (ORCPT + 30 others); Fri, 31 May 2019 10:33:53 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:52514 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726884AbfEaOdt (ORCPT ); Fri, 31 May 2019 10:33:49 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B12E6341; Fri, 31 May 2019 07:33:48 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E467B3F5AF; Fri, 31 May 2019 07:33:46 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jassi Brar , Arnd Bergmann Cc: Sudeep Holla , Bjorn Andersson , Rob Herring , Mark Brown , Cristian Marussi , Jassi Brar Subject: [PATCH 6/6] mailbox: arm_mhu: add full support for the doorbells Date: Fri, 31 May 2019 15:33:20 +0100 Message-Id: <20190531143320.8895-7-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190531143320.8895-1-sudeep.holla@arm.com> References: <20190531143320.8895-1-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We now have the basic infrastructure and binding to support doorbells on ARM MHU controller. This patch adds all the necessary mailbox operations to add support for the doorbells. Maximum of 32 doorbells are supported on each physical channel, however the total number of doorbells is restricted to 20 in order to save memory. It can increased if required in future. Cc: Jassi Brar Signed-off-by: Sudeep Holla --- drivers/mailbox/arm_mhu.c | 129 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 125 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/mailbox/arm_mhu.c b/drivers/mailbox/arm_mhu.c index c944ca121e9e..ba48d2281dca 100644 --- a/drivers/mailbox/arm_mhu.c +++ b/drivers/mailbox/arm_mhu.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -94,6 +95,14 @@ mhu_mbox_to_channel(struct mbox_controller *mbox, return NULL; } +static void mhu_mbox_clear_irq(struct mbox_chan *chan) +{ + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].rx_reg; + + writel_relaxed(BIT(chan_info->doorbell), base + INTR_CLR_OFS); +} + static unsigned int mhu_mbox_irq_to_pchan_num(struct arm_mhu *mhu, int irq) { unsigned int pchan; @@ -105,6 +114,95 @@ static unsigned int mhu_mbox_irq_to_pchan_num(struct arm_mhu *mhu, int irq) return pchan; } +static struct mbox_chan *mhu_mbox_irq_to_channel(struct arm_mhu *mhu, + unsigned int pchan) +{ + unsigned long bits; + unsigned int doorbell; + struct mbox_chan *chan = NULL; + struct mbox_controller *mbox = &mhu->mbox; + void __iomem *base = mhu->mlink[pchan].rx_reg; + + bits = readl_relaxed(base + INTR_STAT_OFS); + if (!bits) + /* No IRQs fired in specified physical channel */ + return NULL; + + /* An IRQ has fired, find the associated channel */ + for (doorbell = 0; bits; doorbell++) { + if (!test_and_clear_bit(doorbell, &bits)) + continue; + + chan = mhu_mbox_to_channel(mbox, pchan, doorbell); + if (chan) + break; + } + + return chan; +} + +static irqreturn_t mhu_mbox_thread_handler(int irq, void *data) +{ + struct mbox_chan *chan; + struct arm_mhu *mhu = data; + unsigned int pchan = mhu_mbox_irq_to_pchan_num(mhu, irq); + + while (NULL != (chan = mhu_mbox_irq_to_channel(mhu, pchan))) { + mbox_chan_received_data(chan, NULL); + mhu_mbox_clear_irq(chan); + } + + return IRQ_HANDLED; +} + +static bool mhu_doorbell_last_tx_done(struct mbox_chan *chan) +{ + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; + + if (readl_relaxed(base + INTR_STAT_OFS) & BIT(chan_info->doorbell)) + return false; + + return true; +} + +static int mhu_doorbell_send_signal(struct mbox_chan *chan) +{ + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; + + /* Send event to co-processor */ + writel_relaxed(BIT(chan_info->doorbell), base + INTR_SET_OFS); + + return 0; +} + +static int mhu_doorbell_startup(struct mbox_chan *chan) +{ + mhu_mbox_clear_irq(chan); + return 0; +} + +static void mhu_doorbell_shutdown(struct mbox_chan *chan) +{ + struct mhu_channel *chan_info = chan->con_priv; + struct mbox_controller *mbox = &chan_info->mhu->mbox; + int i; + + for (i = 0; i < mbox->num_chans; i++) + if (chan == &mbox->chans[i]) + break; + + if (mbox->num_chans == i) { + dev_warn(mbox->dev, "Request to free non-existent channel\n"); + return; + } + + /* Reset channel */ + mhu_mbox_clear_irq(chan); + chan->con_priv = NULL; +} + static struct mbox_chan *mhu_mbox_xlate(struct mbox_controller *mbox, const struct of_phandle_args *spec) { @@ -222,16 +320,30 @@ static const struct mbox_chan_ops mhu_ops = { .last_tx_done = mhu_last_tx_done, }; +static const struct mbox_chan_ops mhu_doorbell_ops = { + .send_signal = mhu_doorbell_send_signal, + .startup = mhu_doorbell_startup, + .shutdown = mhu_doorbell_shutdown, + .last_tx_done = mhu_doorbell_last_tx_done, +}; + static const struct mhu_mbox_pdata arm_mhu_pdata = { .num_pchans = 3, .num_doorbells = 1, .support_doorbells = false, }; +static const struct mhu_mbox_pdata arm_mhu_doorbell_pdata = { + .num_pchans = 2, /* Secure can't be used */ + .num_doorbells = 32, + .support_doorbells = true, +}; + static int mhu_probe(struct amba_device *adev, const struct amba_id *id) { u32 cell_count; int i, err, max_chans; + irq_handler_t handler; struct arm_mhu *mhu; struct mbox_chan *chans; struct mhu_mbox_pdata *pdata; @@ -251,6 +363,9 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) if (cell_count == 1) { max_chans = MHU_NUM_PCHANS; pdata = (struct mhu_mbox_pdata *)&arm_mhu_pdata; + } else if (cell_count == 2) { + max_chans = MHU_CHAN_MAX; + pdata = (struct mhu_mbox_pdata *)&arm_mhu_doorbell_pdata; } else { dev_err(dev, "incorrect value of #mbox-cells in %s\n", np->full_name); @@ -283,7 +398,6 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) mhu->mbox.dev = dev; mhu->mbox.chans = chans; mhu->mbox.num_chans = max_chans; - mhu->mbox.ops = &mhu_ops; mhu->mbox.txdone_irq = false; mhu->mbox.txdone_poll = true; mhu->mbox.txpoll_period = 1; @@ -291,6 +405,14 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) mhu->mbox.of_xlate = mhu_mbox_xlate; amba_set_drvdata(adev, mhu); + if (pdata->support_doorbells) { + mhu->mbox.ops = &mhu_doorbell_ops; + handler = mhu_mbox_thread_handler; + } else { + mhu->mbox.ops = &mhu_ops; + handler = mhu_rx_interrupt; + } + err = devm_mbox_controller_register(dev, &mhu->mbox); if (err) { dev_err(dev, "Failed to register mailboxes %d\n", err); @@ -308,9 +430,8 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i]; mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; - err = devm_request_threaded_irq(dev, irq, NULL, - mhu_rx_interrupt, IRQF_ONESHOT, - "mhu_link", mhu); + err = devm_request_threaded_irq(dev, irq, NULL, handler, + IRQF_ONESHOT, "mhu_link", mhu); if (err) { dev_err(dev, "Can't claim IRQ %d\n", irq); mbox_controller_unregister(&mhu->mbox);