From patchwork Tue May 2 14:14:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hari Nagalla X-Patchwork-Id: 678957 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3507C77B73 for ; Tue, 2 May 2023 14:14:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234230AbjEBOOk (ORCPT ); Tue, 2 May 2023 10:14:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233955AbjEBOOj (ORCPT ); Tue, 2 May 2023 10:14:39 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADE1F11A; Tue, 2 May 2023 07:14:36 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 342EEHLh024070; Tue, 2 May 2023 09:14:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1683036857; bh=yPVTEblL4lhLwYEV+PX7XOBiRId0BJsSM3Y6sDHtWBU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Y43CBp7NqrDEjFG6N0QGdSdxnNHjmRF4ff5J3LiW3x5Vrs+XCDFPsWbn5TlKg8X50 D/DSsXOX9UmbU4i/IY1/y4/cGaGIPoQwKV+IqEfcPvosXPFI+FPE0suanOrZJV4sfH OFQAtbDnmD3ZmkROxRU9DEqQjx4Fn7VJBpYcRWXo= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 342EEHLA022221 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 2 May 2023 09:14:17 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 2 May 2023 09:14:17 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 2 May 2023 09:14:17 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 342EEGRv123966; Tue, 2 May 2023 09:14:17 -0500 From: Hari Nagalla To: , CC: , , , , , Subject: [PATCH 1/2] arm64: dts: ti: k3-am62a: Add remote proc nodes Date: Tue, 2 May 2023 09:14:15 -0500 Message-ID: <20230502141416.9924-2-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230502141416.9924-1-hnagalla@ti.com> References: <20230502141416.9924-1-hnagalla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org AM62A SoC devices have a C7x DSP in main voltage domain and two single core R5F processors in MCU and Wakeup domains respectively. The C7x DSP subsystem has various accelerators for Deep learning purposes. The R5F processor in wakeup domain is used as a device manager for the SoC. Signed-off-by: Jai Luthra Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 11 ++++++++++ arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 23 +++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 23 +++++++++++++++++++++ 3 files changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 393a1a40b68b..81a017b2f2b2 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -660,4 +660,15 @@ ecap2: pwm@23120000 { clock-names = "fck"; status = "disabled"; }; + + c7x_0: dsp@7e000000 { + compatible = "ti,am62a-c7xv-dsp"; + reg = <0x00 0x7e000000 0x00 0x00100000>; + reg-names = "l2sram"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <208>; + ti,sci-proc-ids = <0x04 0xff>; + resets = <&k3_reset 208 1>; + firmware-name = "am62a-c71_0-fw"; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi index 2bb813e784a2..605df62d1d28 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi @@ -87,4 +87,27 @@ mcu_gpio0: gpio@4201000 { clock-names = "gpio"; status = "disabled"; }; + + mcu_r5fss0: r5fss@79000000 { + compatible = "ti,am62-r5fss"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x79000000 0x00 0x79000000 0x8000>, + <0x79020000 0x00 0x79020000 0x8000>; + power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>; + mcu_r5fss0_core0: r5f@79000000 { + compatible = "ti,am62-r5f"; + reg = <0x79000000 0x00008000>, + <0x79020000 0x00008000>; + reg-names = "atcm", "btcm"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <9>; + ti,sci-proc-ids = <0x03 0xff>; + resets = <&k3_reset 9 1>; + firmware-name = "am62a-mcu-r5f0_0-fw"; + ti,atcm-enable = <0>; + ti,btcm-enable = <1>; + ti,loczrama = <0>; + }; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi index 81d984414fd4..c75f6e59dff3 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi @@ -51,4 +51,27 @@ wkup_rtc0: rtc@2b1f0000 { wakeup-source; status = "disabled"; }; + + wkup_r5fss0: r5fss@78000000 { + compatible = "ti,am62-r5fss"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x78000000 0x00 0x78000000 0x8000>, + <0x78100000 0x00 0x78100000 0x8000>; + power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>; + wkup_r5fss0_core0: r5f@78000000 { + compatible = "ti,am62-r5f"; + reg = <0x78000000 0x00008000>, + <0x78100000 0x00008000>; + reg-names = "atcm", "btcm"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <121>; + ti,sci-proc-ids = <0x01 0xff>; + resets = <&k3_reset 121 1>; + firmware-name = "am62-wkup-r5f0_0-fw"; + ti,atcm-enable = <1>; + ti,btcm-enable = <1>; + ti,loczrama = <1>; + }; + }; }; From patchwork Tue May 2 14:14:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hari Nagalla X-Patchwork-Id: 678480 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48C72C77B7E for ; Tue, 2 May 2023 14:14:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234301AbjEBOOk (ORCPT ); Tue, 2 May 2023 10:14:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233800AbjEBOOj (ORCPT ); Tue, 2 May 2023 10:14:39 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B19AFD; Tue, 2 May 2023 07:14:36 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 342EEHCo022585; Tue, 2 May 2023 09:14:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1683036857; bh=UTK2Od9HOOtShq03bPak6T9KZCsVQyBH0UMESsO7pqk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=t41pflFsFUIxpn3FRsZbMBZKsxsjGMFpBH9dcg4J1Kb+gTXkwcV0Qf2msWSGMQPl6 2INOHn+76SfzT44MTkU0Ht1l/TVXDhheF5xQXOiV470yRGqwnqXI4/P1B8aZ7fft+O o5tG2BV1jOI2QlNZeSdAIy+CvqH1m4TKL6Tos2+I= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 342EEHxJ022225 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 2 May 2023 09:14:17 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 2 May 2023 09:14:17 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 2 May 2023 09:14:17 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 342EEHUX102438; Tue, 2 May 2023 09:14:17 -0500 From: Hari Nagalla To: , CC: , , , , , Subject: [PATCH 2/2] arm64: dts: ti: k3-am62a7-sk: Enable remote proc nodes Date: Tue, 2 May 2023 09:14:16 -0500 Message-ID: <20230502141416.9924-3-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230502141416.9924-1-hnagalla@ti.com> References: <20230502141416.9924-1-hnagalla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Reserve memory for remote rpoc IPC and bind the mailbox assignments for each remote proc. Two memory regions are reserved for each remote processor. The first region of 1Mb of memory is used for Vring shared buffers and the second region is used as external memory to the remote processor, resource table and as tracebuffer. Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 69 +++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts index f6a67f072dca..231ff393e241 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -49,11 +49,41 @@ secure_ddr: optee@9e800000 { no-map; }; + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9c800000 0x00 0x100000>; + no-map; + }; + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { compatible = "shared-dma-pool"; reg = <0x00 0x9c900000 0x00 0x01e00000>; no-map; }; + + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b800000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9b900000 0x00 0x0f00000>; + no-map; + }; + + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x99800000 0x00 0x100000>; + no-map; + }; + + c7x_0_memory_region: c7x-memory@99900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x99900000 0x00 0x01efffff>; + no-map; + }; }; vmain_pd: regulator-0 { @@ -292,3 +322,42 @@ cpsw3g_phy0: ethernet-phy@0 { ti,min-output-impedance; }; }; + +&mailbox0_cluster0 { + mbox_r5_0: mbox-r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster1 { + mbox_c7x_0: mbox-c7x-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&mailbox0_cluster2 { + mbox_mcu_r5_0: mbox-mcu_r5-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; +}; + +&c7x_0 { + mboxes = <&mailbox0_cluster1 &mbox_c7x_0>; + memory-region = <&c7x_0_dma_memory_region>, + <&c7x_0_memory_region>; +}; + +&wkup_r5fss0_core0 { + mboxes = <&mailbox0_cluster0 &mbox_r5_0>; + memory-region = <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; +}; + +&mcu_r5fss0_core0 { + mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>; + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; +};