From patchwork Wed May 3 17:02:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7C2CC7EE2D for ; Wed, 3 May 2023 17:03:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229817AbjECRDk (ORCPT ); Wed, 3 May 2023 13:03:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229515AbjECRDj (ORCPT ); Wed, 3 May 2023 13:03:39 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 849B510F1; Wed, 3 May 2023 10:03:36 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343CtMTZ026294; Wed, 3 May 2023 17:02:59 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=CM8U+KKZDKpPpHd9sqO/MW+af/nOdotFtkjh1jMegl4=; b=W0pZwpVReBsC75vQnW0FcRKHQ2awpnq+SAPE3kT2zaCpn5EJ0g4dDXc+aNbmS79OLr+U Xabekg41rMYNyOdmKHpeVi8hGeo9FWeDQD+Hu3mnYfiFXd/0IM1CgCaUROWaTCBqAkXK P2M2IjT3pql2tss+DWARCxK+QqE64ruRql/AZarVjlFyhDdiPKEboJ3EsJzLJ29WbRDq 4ks6lwXEsOOt5S6J8i3mN2zNT0f0QoGI1Wx5cjGNb9G4kEd893jA8cs+yvf8rnvdp7tq QLsLfmTNozbmkiJnYyFrrIzJIX7C8nBWEt4cAmbKMG4v3zVixDLZsaSdFlBgfP9Um2hh Qg== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qbbsw23m6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 17:02:59 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H2v8o000360 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:02:57 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:02:52 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 01/18] remoteproc: qcom: Expand MD_* as MINIDUMP_* Date: Wed, 3 May 2023 22:32:15 +0530 Message-ID: <1683133352-10046-2-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 6Gvg2g7w937LgVUL1n3krx8sk05MBkDC X-Proofpoint-ORIG-GUID: 6Gvg2g7w937LgVUL1n3krx8sk05MBkDC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 adultscore=0 suspectscore=0 malwarescore=0 mlxlogscore=999 impostorscore=0 bulkscore=0 mlxscore=0 phishscore=0 spamscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Expand MD_* as MINIDUMP_* which makes more sense than the abbreviation. Signed-off-by: Mukesh Ojha --- drivers/remoteproc/qcom_common.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/qcom_common.c b/drivers/remoteproc/qcom_common.c index a0d4238..805e525 100644 --- a/drivers/remoteproc/qcom_common.c +++ b/drivers/remoteproc/qcom_common.c @@ -29,9 +29,9 @@ #define MAX_NUM_OF_SS 10 #define MAX_REGION_NAME_LENGTH 16 #define SBL_MINIDUMP_SMEM_ID 602 -#define MD_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) -#define MD_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) -#define MD_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) +#define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) +#define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) +#define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) /** * struct minidump_region - Minidump region @@ -125,7 +125,7 @@ static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsy for (i = 0; i < seg_cnt; i++) { memcpy_fromio(®ion, ptr + i, sizeof(region)); - if (le32_to_cpu(region.valid) == MD_REGION_VALID) { + if (le32_to_cpu(region.valid) == MINIDUMP_REGION_VALID) { name = kstrndup(region.name, MAX_REGION_NAME_LENGTH - 1, GFP_KERNEL); if (!name) { iounmap(ptr); @@ -168,8 +168,8 @@ void qcom_minidump(struct rproc *rproc, unsigned int minidump_id, */ if (subsystem->regions_baseptr == 0 || le32_to_cpu(subsystem->status) != 1 || - le32_to_cpu(subsystem->enabled) != MD_SS_ENABLED || - le32_to_cpu(subsystem->encryption_status) != MD_SS_ENCR_DONE) { + le32_to_cpu(subsystem->enabled) != MINIDUMP_SS_ENABLED || + le32_to_cpu(subsystem->encryption_status) != MINIDUMP_SS_ENCR_DONE) { dev_err(&rproc->dev, "Minidump not ready, skipping\n"); return; } From patchwork Wed May 3 17:02:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3FD3C7EE26 for ; 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Wed, 03 May 2023 17:03:04 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H33sB000711 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:03:04 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:02:58 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 02/18] remoteproc: qcom: Move minidump specific data to qcom_minidump.h Date: Wed, 3 May 2023 22:32:16 +0530 Message-ID: <1683133352-10046-3-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: viqZE4SWK6tN9X9_Q7G8DvHSsYUzEkSc X-Proofpoint-ORIG-GUID: viqZE4SWK6tN9X9_Q7G8DvHSsYUzEkSc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 mlxscore=0 adultscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Move minidump specific data types and macros to a separate internal header(qcom_minidump.h) so that it can be shared among different Qualcomm drivers. There is no change in functional behavior after this. Signed-off-by: Mukesh Ojha --- drivers/remoteproc/qcom_common.c | 56 +--------------------------------- include/soc/qcom/qcom_minidump.h | 66 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 67 insertions(+), 55 deletions(-) create mode 100644 include/soc/qcom/qcom_minidump.h diff --git a/drivers/remoteproc/qcom_common.c b/drivers/remoteproc/qcom_common.c index 805e525..88fc984 100644 --- a/drivers/remoteproc/qcom_common.c +++ b/drivers/remoteproc/qcom_common.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "remoteproc_internal.h" #include "qcom_common.h" @@ -26,61 +27,6 @@ #define to_smd_subdev(d) container_of(d, struct qcom_rproc_subdev, subdev) #define to_ssr_subdev(d) container_of(d, struct qcom_rproc_ssr, subdev) -#define MAX_NUM_OF_SS 10 -#define MAX_REGION_NAME_LENGTH 16 -#define SBL_MINIDUMP_SMEM_ID 602 -#define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) -#define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) -#define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) - -/** - * struct minidump_region - Minidump region - * @name : Name of the region to be dumped - * @seq_num: : Use to differentiate regions with same name. - * @valid : This entry to be dumped (if set to 1) - * @address : Physical address of region to be dumped - * @size : Size of the region - */ -struct minidump_region { - char name[MAX_REGION_NAME_LENGTH]; - __le32 seq_num; - __le32 valid; - __le64 address; - __le64 size; -}; - -/** - * struct minidump_subsystem - Subsystem's SMEM Table of content - * @status : Subsystem toc init status - * @enabled : if set to 1, this region would be copied during coredump - * @encryption_status: Encryption status for this subsystem - * @encryption_required : Decides to encrypt the subsystem regions or not - * @region_count : Number of regions added in this subsystem toc - * @regions_baseptr : regions base pointer of the subsystem - */ -struct minidump_subsystem { - __le32 status; - __le32 enabled; - __le32 encryption_status; - __le32 encryption_required; - __le32 region_count; - __le64 regions_baseptr; -}; - -/** - * struct minidump_global_toc - Global Table of Content - * @status : Global Minidump init status - * @md_revision : Minidump revision - * @enabled : Minidump enable status - * @subsystems : Array of subsystems toc - */ -struct minidump_global_toc { - __le32 status; - __le32 md_revision; - __le32 enabled; - struct minidump_subsystem subsystems[MAX_NUM_OF_SS]; -}; - struct qcom_ssr_subsystem { const char *name; struct srcu_notifier_head notifier_list; diff --git a/include/soc/qcom/qcom_minidump.h b/include/soc/qcom/qcom_minidump.h new file mode 100644 index 0000000..84c8605 --- /dev/null +++ b/include/soc/qcom/qcom_minidump.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Qualcomm minidump shared data structures and macros + * + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef _QCOM_MINIDUMP_H_ +#define _QCOM_MINIDUMP_H_ + +#define MAX_NUM_OF_SS 10 +#define MAX_REGION_NAME_LENGTH 16 +#define SBL_MINIDUMP_SMEM_ID 602 +#define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) +#define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) +#define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) + +/** + * struct minidump_region - Minidump region + * @name : Name of the region to be dumped + * @seq_num: : Use to differentiate regions with same name. + * @valid : This entry to be dumped (if set to 1) + * @address : Physical address of region to be dumped + * @size : Size of the region + */ +struct minidump_region { + char name[MAX_REGION_NAME_LENGTH]; + __le32 seq_num; + __le32 valid; + __le64 address; + __le64 size; +}; + +/** + * struct minidump_subsystem - Subsystem's SMEM Table of content + * @status : Subsystem toc init status + * @enabled : if set to 1, this region would be copied during coredump + * @encryption_status: Encryption status for this subsystem + * @encryption_required : Decides to encrypt the subsystem regions or not + * @region_count : Number of regions added in this subsystem toc + * @regions_baseptr : regions base pointer of the subsystem + */ +struct minidump_subsystem { + __le32 status; + __le32 enabled; + __le32 encryption_status; + __le32 encryption_required; + __le32 region_count; + __le64 regions_baseptr; +}; + +/** + * struct minidump_global_toc - Global Table of Content + * @status : Global Minidump init status + * @md_revision : Minidump revision + * @enabled : Minidump enable status + * @subsystems : Array of subsystems toc + */ +struct minidump_global_toc { + __le32 status; + __le32 md_revision; + __le32 enabled; + struct minidump_subsystem subsystems[MAX_NUM_OF_SS]; +}; + +#endif /* _QCOM_MINIDUMP_H_ */ From patchwork Wed May 3 17:02:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 265B5C7EE29 for ; Wed, 3 May 2023 17:03:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229811AbjECRDj (ORCPT ); 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Wed, 03 May 2023 17:03:11 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H3Aw7000854 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:03:10 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:04 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 03/18] docs: qcom: Add qualcomm minidump guide Date: Wed, 3 May 2023 22:32:17 +0530 Message-ID: <1683133352-10046-4-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: V6yj7ZJP8E4f1rkmRHy-wa5R9HkPvFjT X-Proofpoint-GUID: V6yj7ZJP8E4f1rkmRHy-wa5R9HkPvFjT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 impostorscore=0 adultscore=0 mlxlogscore=999 spamscore=0 phishscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the qualcomm minidump guide for the users which tries to cover the dependency and the way to test and collect minidump on Qualcomm supported platforms. Signed-off-by: Mukesh Ojha --- Documentation/admin-guide/qcom_minidump.rst | 246 ++++++++++++++++++++++++++++ 1 file changed, 246 insertions(+) create mode 100644 Documentation/admin-guide/qcom_minidump.rst diff --git a/Documentation/admin-guide/qcom_minidump.rst b/Documentation/admin-guide/qcom_minidump.rst new file mode 100644 index 0000000..062c797 --- /dev/null +++ b/Documentation/admin-guide/qcom_minidump.rst @@ -0,0 +1,246 @@ +Qualcomm Minidump Feature +========================= + +Introduction +------------ + +Minidump is a best effort mechanism to collect useful and predefined +data for first level of debugging on end user devices running on +Qualcomm SoCs. It is built on the premise that System on Chip (SoC) +or subsystem part of SoC crashes, due to a range of hardware and +software bugs. Hence, the ability to collect accurate data is only +a best-effort. The data collected could be invalid or corrupted, data +collection itself could fail, and so on. + +Qualcomm devices in engineering mode provides a mechanism for generating +full system ramdumps for post mortem debugging. But in some cases it's +however not feasible to capture the entire content of RAM. The minidump +mechanism provides the means for selecting region should be included in +the ramdump. + +:: + + +-----------------------------------------------+ + | DDR +-------------+ | + | | SS0-ToC| | + | +----------------+ +----------------+ | | + | |Shared memory | | SS1-ToC| | | + | |(SMEM) | | | | | + | | | +-->|--------+ | | | + | |G-ToC | | | SS-ToC \ | | | + | |+-------------+ | | | +-----------+ | | | + | ||-------------| | | | |-----------| | | | + | || SS0-ToC | | | +-|<|SS1 region1| | | | + | ||-------------| | | | | |-----------| | | | + | || SS1-ToC |-|>+ | | |SS1 region2| | | | + | ||-------------| | | | |-----------| | | | + | || SS2-ToC | | | | | ... | | | | + | ||-------------| | | | |-----------| | | | + | || ... | | |-|<|SS1 regionN| | | | + | ||-------------| | | | |-----------| | | | + | || SSn-ToC | | | | +-----------+ | | | + | |+-------------+ | | | | | | + | | | | |----------------| | | + | | | +>| regionN | | | + | | | | |----------------| | | + | +----------------+ | | | | | + | | |----------------| | | + | +>| region1 | | | + | |----------------| | | + | | | | | + | |----------------|-+ | + | | region5 | | + | |----------------| | + | | | | + | Region information +----------------+ | + | +---------------+ | + | |region name | | + | |---------------| | + | |region address | | + | |---------------| | + | |region size | | + | +---------------+ | + +-----------------------------------------------+ + G-ToC: Global table of content + SS-ToC: Subsystem table of content + SS0-SSn: Subsystem numbered from 0 to n + +The core of minidump feature is part of Qualcomm's boot firmware code. +It initializes shared memory(SMEM), which is a part of DDR and +allocates a small section of it to minidump table i.e also called +global table of content (G-ToC). Each subsystem (APSS, ADSP, ...) has +their own table of segments to be included in the minidump, all +references from a descriptor in SMEM (G-ToC). Each segment/region has +some details like name, physical address and it's size etc. and it +could be anywhere scattered in the DDR. + +Minidump kernel driver concept +------------------------------ + +Qualcomm minidump kernel driver adds the capability to add linux region +to be dumped as part of ram dump collection. At the moment, shared memory +driver creates plaform device for minidump driver and give a means to +APSS minidump to initialize itself on probe. + +This driver provides ``qcom_apss_minidump_region_register`` and +``qcom_apss_minidump_region_unregister`` API's to register and unregister +apss minidump region. It also gives a mechanism to update physical/virtual +address for the client whose addresses keeps on changing e.g Current stack +address of task keep on changing on context switch for each core. So these +clients can update their addresses with ``qcom_apss_minidump_update_region`` +API. + +The driver also supports registration for the clients who came before +minidump driver was initialized. It maintains pending list of clients +who came before minidump and once minidump is initialized it registers +them in one go. + +To simplify post mortem debugging, driver creates and maintain an ELF +header as first region that gets updated each time a new region gets +registered. + +The solution supports extracting the ramdump/minidump produced either +over USB or stored to an attached storage device. + +Dependency of minidump kernel driver +------------------------------------ + +It is to note that whole of minidump thing depends on Qualcomm boot +firmware whether it supports minidump or not. So, if the minidump +smem id is present in shared memory, it indicates that minidump +is supported from boot firmware and it is possible to dump linux +(APSS) region as part of minidump collection. + +How a kernel client driver can register region with minidump +------------------------------------------------------------ + +Client driver can use ``qcom_apss_minidump_region_register`` API's to +register and ``qcom_apss_minidump_region_unregister`` to unregister +their region from minidump driver. + +Client need to fill their region by filling qcom_apss_minidump_region +structure object which consist of the region name, region's +virtual and physical address and its size. + +Below is one sample client driver snippet which try to allocate +a region from kernel heap of certain size and it writes a certain +known pattern (that can help in verification after collection +that we got the exact pattern, what we wrote) and registers it with +minidump. + + .. code-block:: c + + #include + [...] + + + [... inside a function ...] + struct qcom_apss_minidump_region region; + + [...] + + client_mem_region = kzalloc(region_size, GFP_KERNEL); + if (!client_mem_region) + return -ENOMEM; + + [... Just write a pattern ...] + memset(client_mem_region, 0xAB, region_size); + + [... Fill up the region object ...] + strlcpy(region.name, "REGION_A", sizeof(region.name)); + region.virt_addr = client_mem_region; + region.phys_addr = virt_to_phys(client_mem_region); + region.size = region_size; + + ret = qcom_apss_minidump_region_register(®ion); + if (ret < 0) { + pr_err("failed to add region in minidump: err: %d\n", ret); + return ret; + } + + [...] + + +Test +---- + +Existing Qualcomm devices already supports entire ddr dump (also called +full dump) by writing appropriate value to Qualcomm's top control and +status register(tcsr) in driver/firmware/qcom_scm.c . + +SCM device Tree bindings required to support download mode +For example (sm8450) :: + + / { + + [...] + + firmware { + scm: scm { + compatible = "qcom,scm-sm8450", "qcom,scm"; + [... tcsr register ... ] + qcom,dload-mode = <&tcsr 0x13000>; + + [...] + }; + }; + + [...] + + soc: soc@0 { + + [...] + + tcsr: syscon@1fc0000 { + compatible = "qcom,sm8450-tcsr", "syscon"; + reg = <0x0 0x1fc0000 0x0 0x30000>; + }; + + [...] + }; + [...] + + }; + +User of minidump can pass qcom_scm.download_mode="mini" to kernel +commandline to set the current download mode to minidump. +Similarly, "full" is passed to set the download mode to full dump +where entire ddr dump will be collected while setting it "full,mini" +will collect minidump along with fulldump. + +Writing to sysfs node can also be used to set the mode to minidump. + +:: + echo "mini" > /sys/module/qcom_scm/parameter/download_mode + +Once the download mode is set, any kind of crash will make the device collect +respective dump as per set download mode. + +Dump collection +--------------- + +The solution supports extracting the minidump produced either over USB or +stored to an attached storage device. + +By default, dumps are downloaded via USB to the attached x86_64 machine +running PCAT (Qualcomm tool) software. Upon download, we will see +a set of binary blobs starts with name md_* in PCAT configured directory +in x86_64 machine, so for above example from the client it will be +md_REGION_A.BIN. This binary blob depends on region content to determine +whether it needs external parser support to get the content of the region, +so for simple plain ASCII text we don't need any parsing and the content +can be seen just opening the binary file. + +To collect the dump to attached storage type, one need to write appropriate +value to IMEM register, in that case dumps are collected in rawdump +partition on the target device itself. + +One need to read the entire rawdump partition and pull out content to +save it onto the attached x86_64 machine over USB. Later, this rawdump +can be pass it to another tool dexter.exe(Qualcomm tool) which converts +this into the similar binary blobs which we have got it when download type +was set to USB i.e a set of registered region as blobs and their name +starts with md_*. + +Replacing the dexter.exe with some open source tool can be added as future +scope of this document. From patchwork Wed May 3 17:02:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679136 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BE18C7EE2C for ; Wed, 3 May 2023 17:03:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229846AbjECRDp (ORCPT ); Wed, 3 May 2023 13:03:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229832AbjECRDm (ORCPT ); Wed, 3 May 2023 13:03:42 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF9F210E5; Wed, 3 May 2023 10:03:39 -0700 (PDT) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343Eff0f007138; Wed, 3 May 2023 17:03:18 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=TrjX3EFf+81suzn4FORbgmN78RdluvGQ69CJL+TwtAM=; b=Q8kjZ/J8LM01ibBGkgCa0edMwn7bmybcuC4+HVJpIMTbswzsAiDLP4eLNvfdnW+NTZIz l8l7NaCQf+qQX7+oe0S9K0rKqVOtY0H+JHuSMqFXDnBewvVUphwkfQBHQBLU9jDC19XR 2HzSQMmjcCWPke6Tw3cwQf2hqNiXScFeIvOF8pufaafCgn3CGWFGofStGWzaOqls4ng+ VvLVoeHezRrt+yLvS6+QPHJvzF6Ym/JUzirV904a9+rjFQ9+kEVCSThq9rVX98MCPE61 sbJmmPgXfx+9HbsoTfoijX5sIWMZJ36SsnixnJmzNp3xqawal8U3WVSffx9n4YkU5OGQ aQ== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qbae929g1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 17:03:17 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H3GjY002497 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:03:16 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:10 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 04/18] soc: qcom: Add Qualcomm minidump kernel driver Date: Wed, 3 May 2023 22:32:18 +0530 Message-ID: <1683133352-10046-5-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Eq_dPUIXIhWj58m75O9RqsUi_CgBLk6_ X-Proofpoint-ORIG-GUID: Eq_dPUIXIhWj58m75O9RqsUi_CgBLk6_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 priorityscore=1501 suspectscore=0 bulkscore=0 impostorscore=0 clxscore=1015 spamscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Minidump is a best effort mechanism to collect useful and predefined data for first level of debugging on end user devices running on Qualcomm SoCs. It is built on the premise that System on Chip (SoC) or subsystem part of SoC crashes, due to a range of hardware and software bugs. Hence, the ability to collect accurate data is only a best-effort. The data collected could be invalid or corrupted, data collection itself could fail, and so on. Qualcomm devices in engineering mode provides a mechanism for generating full system ramdumps for post mortem debugging. But in some cases it's however not feasible to capture the entire content of RAM. The minidump mechanism provides the means for selecting region should be included in the ramdump. The solution supports extracting the ramdump/minidump produced either over USB or stored to an attached storage device. The core of minidump feature is part of Qualcomm's boot firmware code. It initializes shared memory(SMEM), which is a part of DDR and allocates a small section of it to minidump table i.e also called global table of content (G-ToC). Each subsystem (APSS, ADSP, ...) has their own table of segments to be included in the minidump, all references from a descriptor in SMEM (G-ToC). Each segment/region has some details like name, physical address and it's size etc. and it could be anywhere scattered in the DDR. Minidump kernel driver adds the capability to add linux region to be dumped as part of ram dump collection. It provides appropriate symbol to check its enablement and register client regions. To simplify post mortem debugging, it creates and maintain an ELF header as first region that gets updated upon registration of a new region. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/Kconfig | 14 + drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/qcom_minidump.c | 581 +++++++++++++++++++++++++++++++++++++++ drivers/soc/qcom/smem.c | 8 + include/soc/qcom/qcom_minidump.h | 61 +++- 5 files changed, 663 insertions(+), 2 deletions(-) create mode 100644 drivers/soc/qcom/qcom_minidump.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index a491718..15c931e 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -279,4 +279,18 @@ config QCOM_INLINE_CRYPTO_ENGINE tristate select QCOM_SCM +config QCOM_MINIDUMP + tristate "QCOM Minidump Support" + depends on ARCH_QCOM || COMPILE_TEST + select QCOM_SMEM + help + Enablement of core minidump feature is controlled from boot firmware + side, and this config allow linux to query and manages APPS minidump + table. + + Client drivers can register their internal data structures and debug + messages as part of the minidump region and when the SoC is crashed, + these selective regions will be dumped instead of the entire DDR. + This saves significant amount of time and/or storage space. + endmenu diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 0f43a88..1ebe081 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -33,3 +33,4 @@ obj-$(CONFIG_QCOM_RPMPD) += rpmpd.o obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o obj-$(CONFIG_QCOM_INLINE_CRYPTO_ENGINE) += ice.o +obj-$(CONFIG_QCOM_MINIDUMP) += qcom_minidump.o diff --git a/drivers/soc/qcom/qcom_minidump.c b/drivers/soc/qcom/qcom_minidump.c new file mode 100644 index 0000000..d107a86 --- /dev/null +++ b/drivers/soc/qcom/qcom_minidump.c @@ -0,0 +1,581 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/** + * struct minidump_elfhdr - Minidump table elf header + * @ehdr: Elf main header + * @shdr: Section header + * @phdr: Program header + * @elf_offset: Section offset in elf + * @strtable_idx: String table current index position + */ +struct minidump_elfhdr { + struct elfhdr *ehdr; + struct elf_shdr *shdr; + struct elf_phdr *phdr; + size_t elf_offset; + size_t strtable_idx; +}; + +/** + * struct minidump - Minidump driver private data + * @md_gbl_toc : Global TOC pointer + * @md_apss_toc : Application Subsystem TOC pointer + * @md_regions : High level OS region base pointer + * @elf : Minidump elf header + * @dev : Minidump device + */ +struct minidump { + struct minidump_global_toc *md_gbl_toc; + struct minidump_subsystem *md_apss_toc; + struct minidump_region *md_regions; + struct minidump_elfhdr elf; + struct device *dev; +}; + +/* + * In some of the Old Qualcomm devices, boot firmware statically allocates 300 + * as total number of supported region (including all co-processors) in + * minidump table out of which linux was using 201. In future, this limitation + * from boot firmware might get removed by allocating the region dynamically. + * So, keep it compatible with older devices, we can keep the current limit for + * Linux to 201. + */ +#define MAX_NUM_ENTRIES 201 +#define MAX_STRTBL_SIZE (MAX_NUM_ENTRIES * MAX_REGION_NAME_LENGTH) + +static struct minidump *__md; +static DEFINE_MUTEX(minidump_lock); + +static struct elf_shdr *elf_shdr_entry_addr(struct elfhdr *ehdr, int idx) +{ + struct elf_shdr *eshdr = (struct elf_shdr *)((size_t)ehdr + ehdr->e_shoff); + + return &eshdr[idx]; +} + +static struct elf_phdr *elf_phdr_entry_addr(struct elfhdr *ehdr, int idx) +{ + struct elf_phdr *ephdr = (struct elf_phdr *)((size_t)ehdr + ehdr->e_phoff); + + return &ephdr[idx]; +} + +static char *elf_str_table_start(struct elfhdr *ehdr) +{ + struct elf_shdr *eshdr; + + if (ehdr->e_shstrndx == SHN_UNDEF) + return NULL; + + eshdr = elf_shdr_entry_addr(ehdr, ehdr->e_shstrndx); + return (char *)ehdr + eshdr->sh_offset; +} + +static char *elf_lookup_string(struct elfhdr *ehdr, int offset) +{ + char *strtab = elf_str_table_start(ehdr); + + if (!strtab || (__md->elf.strtable_idx < offset)) + return NULL; + + return strtab + offset; +} + +static unsigned int append_str_to_strtable(const char *name) +{ + char *strtab = elf_str_table_start(__md->elf.ehdr); + unsigned int old_idx = __md->elf.strtable_idx; + unsigned int ret; + + if (!strtab || !name) + return 0; + + ret = old_idx; + old_idx += strscpy((strtab + old_idx), name, MAX_REGION_NAME_LENGTH); + __md->elf.strtable_idx = old_idx + 1; + return ret; +} + +static int +get_apss_minidump_region_index(const struct qcom_apss_minidump_region *region) +{ + struct minidump_region *mdr; + unsigned int i; + unsigned int count; + + count = le32_to_cpu(__md->md_apss_toc->region_count); + for (i = 0; i < count; i++) { + mdr = &__md->md_regions[i]; + if (!strcmp(mdr->name, region->name)) + return i; + } + return -ENOENT; +} + +static void +qcom_apss_minidump_update_elf_header(const struct qcom_apss_minidump_region *region) +{ + struct elfhdr *ehdr = __md->elf.ehdr; + struct elf_shdr *shdr; + struct elf_phdr *phdr; + + shdr = elf_shdr_entry_addr(ehdr, ehdr->e_shnum++); + phdr = elf_phdr_entry_addr(ehdr, ehdr->e_phnum++); + + shdr->sh_type = SHT_PROGBITS; + shdr->sh_name = append_str_to_strtable(region->name); + shdr->sh_addr = (elf_addr_t)region->virt_addr; + shdr->sh_size = region->size; + shdr->sh_flags = SHF_WRITE; + shdr->sh_offset = __md->elf.elf_offset; + shdr->sh_entsize = 0; + + phdr->p_type = PT_LOAD; + phdr->p_offset = __md->elf.elf_offset; + phdr->p_vaddr = (elf_addr_t)region->virt_addr; + phdr->p_paddr = region->phys_addr; + phdr->p_filesz = phdr->p_memsz = region->size; + phdr->p_flags = PF_R | PF_W; + __md->elf.elf_offset += shdr->sh_size; +} + +static void +qcom_apss_minidump_add_region(const struct qcom_apss_minidump_region *region) +{ + struct minidump_region *mdr; + unsigned int region_cnt = le32_to_cpu(__md->md_apss_toc->region_count); + + mdr = &__md->md_regions[region_cnt]; + strscpy(mdr->name, region->name, sizeof(mdr->name)); + mdr->address = cpu_to_le64(region->phys_addr); + mdr->size = cpu_to_le64(region->size); + mdr->valid = cpu_to_le32(MINIDUMP_REGION_VALID); + region_cnt++; + __md->md_apss_toc->region_count = cpu_to_le32(region_cnt); +} + +static bool +qcom_apss_minidump_valid_region(const struct qcom_apss_minidump_region *region) +{ + return region && + strnlen(region->name, MAX_NAME_LENGTH) < MAX_NAME_LENGTH && + region->virt_addr && + region->size && + IS_ALIGNED(region->size, 4); +} + +static int qcom_apss_minidump_add_elf_header(void) +{ + struct qcom_apss_minidump_region elfregion; + struct elfhdr *ehdr; + struct elf_shdr *shdr; + struct elf_phdr *phdr; + unsigned int elfh_size; + unsigned int strtbl_off; + unsigned int phdr_off; + char *banner; + unsigned int banner_len; + + banner_len = strlen(linux_banner); + /* + * Header buffer contains: + * ELF header, (MAX_NUM_ENTRIES + 4) of Section and Program ELF headers, + * where, 4 additional entries, one for empty header, one for string table + * one for minidump table and one for linux banner. + * + * Linux banner is stored in minidump to aid post mortem tools to determine + * the kernel version. + */ + elfh_size = sizeof(*ehdr); + elfh_size += MAX_STRTBL_SIZE; + elfh_size += banner_len + 1; + elfh_size += ((sizeof(*shdr) + sizeof(*phdr)) * (MAX_NUM_ENTRIES + 4)); + elfh_size = ALIGN(elfh_size, 4); + + __md->elf.ehdr = kzalloc(elfh_size, GFP_KERNEL); + if (!__md->elf.ehdr) + return -ENOMEM; + + /* Register ELF header as first region */ + strscpy(elfregion.name, "KELF_HEADER", sizeof(elfregion.name)); + elfregion.virt_addr = __md->elf.ehdr; + elfregion.phys_addr = virt_to_phys(__md->elf.ehdr); + elfregion.size = elfh_size; + qcom_apss_minidump_add_region(&elfregion); + + ehdr = __md->elf.ehdr; + /* Assign Section/Program headers offset */ + __md->elf.shdr = shdr = (struct elf_shdr *)(ehdr + 1); + __md->elf.phdr = phdr = (struct elf_phdr *)(shdr + MAX_NUM_ENTRIES); + phdr_off = sizeof(*ehdr) + (sizeof(*shdr) * MAX_NUM_ENTRIES); + + memcpy(ehdr->e_ident, ELFMAG, SELFMAG); + ehdr->e_ident[EI_CLASS] = ELF_CLASS; + ehdr->e_ident[EI_DATA] = ELF_DATA; + ehdr->e_ident[EI_VERSION] = EV_CURRENT; + ehdr->e_ident[EI_OSABI] = ELF_OSABI; + ehdr->e_type = ET_CORE; + ehdr->e_machine = ELF_ARCH; + ehdr->e_version = EV_CURRENT; + ehdr->e_ehsize = sizeof(*ehdr); + ehdr->e_phoff = phdr_off; + ehdr->e_phentsize = sizeof(*phdr); + ehdr->e_shoff = sizeof(*ehdr); + ehdr->e_shentsize = sizeof(*shdr); + ehdr->e_shstrndx = 1; + + __md->elf.elf_offset = elfh_size; + + /* + * The zeroth index of the section header is reserved and is rarely used. + * Set the section header as null (SHN_UNDEF) and move to the next one. + * 2nd Section is String table. + */ + __md->elf.strtable_idx = 1; + strtbl_off = sizeof(*ehdr) + ((sizeof(*phdr) + sizeof(*shdr)) * MAX_NUM_ENTRIES); + shdr++; + shdr->sh_type = SHT_STRTAB; + shdr->sh_offset = (elf_addr_t)strtbl_off; + shdr->sh_size = MAX_STRTBL_SIZE; + shdr->sh_entsize = 0; + shdr->sh_flags = 0; + shdr->sh_name = append_str_to_strtable("STR_TBL"); + shdr++; + + /* 3rd Section is Linux banner */ + banner = (char *)ehdr + strtbl_off + MAX_STRTBL_SIZE; + memcpy(banner, linux_banner, banner_len); + + shdr->sh_type = SHT_PROGBITS; + shdr->sh_offset = (elf_addr_t)(strtbl_off + MAX_STRTBL_SIZE); + shdr->sh_size = banner_len + 1; + shdr->sh_addr = (elf_addr_t)linux_banner; + shdr->sh_entsize = 0; + shdr->sh_flags = SHF_WRITE; + shdr->sh_name = append_str_to_strtable("linux_banner"); + + phdr->p_type = PT_LOAD; + phdr->p_offset = (elf_addr_t)(strtbl_off + MAX_STRTBL_SIZE); + phdr->p_vaddr = (elf_addr_t)linux_banner; + phdr->p_paddr = virt_to_phys(linux_banner); + phdr->p_filesz = phdr->p_memsz = banner_len + 1; + phdr->p_flags = PF_R | PF_W; + + /* + * Above are some prdefined sections/program header used + * for debug, update their count here. + */ + ehdr->e_phnum = 1; + ehdr->e_shnum = 3; + + return 0; +} + +/** + * qcom_minidump_subsystem_desc() - Get minidump subsystem descriptor. + * @minidump_index: minidump index for a subsystem in minidump table + * + * Return: minidump subsystem descriptor address on success and error + * on failure + */ +struct minidump_subsystem *qcom_minidump_subsystem_desc(unsigned int minidump_index) +{ + struct minidump_subsystem *md_ss_toc; + + mutex_lock(&minidump_lock); + if (!__md) { + md_ss_toc = ERR_PTR(-EPROBE_DEFER); + goto unlock; + } + + md_ss_toc = &__md->md_gbl_toc->subsystems[minidump_index]; +unlock: + mutex_unlock(&minidump_lock); + return md_ss_toc; +} +EXPORT_SYMBOL_GPL(qcom_minidump_subsystem_desc); + +/** + * qcom_apss_minidump_region_register() - Register a region in Minidump table. + * @region: minidump region. + * + * Return: On success, it returns 0, otherwise a negative error value on failure. + */ +int qcom_apss_minidump_region_register(const struct qcom_apss_minidump_region *region) +{ + unsigned int num_region; + int ret; + + if (!__md) + return -EPROBE_DEFER; + + if (!qcom_apss_minidump_valid_region(region)) + return -EINVAL; + + mutex_lock(&minidump_lock); + ret = get_apss_minidump_region_index(region); + if (ret >= 0) { + dev_info(__md->dev, "%s region is already registered\n", region->name); + ret = -EEXIST; + goto unlock; + } + + /* Check if there is a room for a new entry */ + num_region = le32_to_cpu(__md->md_apss_toc->region_count); + if (num_region >= MAX_NUM_ENTRIES) { + dev_err(__md->dev, "maximum region limit %u reached\n", num_region); + ret = -ENOSPC; + goto unlock; + } + + qcom_apss_minidump_add_region(region); + qcom_apss_minidump_update_elf_header(region); + ret = 0; +unlock: + mutex_unlock(&minidump_lock); + return ret; +} +EXPORT_SYMBOL_GPL(qcom_apss_minidump_region_register); + +static int +qcom_apss_minidump_clear_header(const struct qcom_apss_minidump_region *region) +{ + struct elfhdr *ehdr = __md->elf.ehdr; + struct elf_shdr *shdr; + struct elf_shdr *tmp_shdr; + struct elf_phdr *phdr; + struct elf_phdr *tmp_phdr; + unsigned int phidx; + unsigned int shidx; + unsigned int len; + unsigned int i; + char *shname; + + for (i = 0; i < ehdr->e_phnum; i++) { + phdr = elf_phdr_entry_addr(ehdr, i); + if (phdr->p_paddr == region->phys_addr && + phdr->p_memsz == region->size) + break; + } + + if (i == ehdr->e_phnum) { + dev_err(__md->dev, "Cannot find program header entry in elf\n"); + return -EINVAL; + } + + phidx = i; + for (i = 0; i < ehdr->e_shnum; i++) { + shdr = elf_shdr_entry_addr(ehdr, i); + shname = elf_lookup_string(ehdr, shdr->sh_name); + if (shname && !strcmp(shname, region->name) && + shdr->sh_addr == (elf_addr_t)region->virt_addr && + shdr->sh_size == region->size) + break; + } + + if (i == ehdr->e_shnum) { + dev_err(__md->dev, "Cannot find section header entry in elf\n"); + return -EINVAL; + } + + shidx = i; + if (shdr->sh_offset != phdr->p_offset) { + dev_err(__md->dev, "Invalid entry details for region: %s\n", region->name); + return -EINVAL; + } + + /* Clear name in string table */ + len = strlen(shname) + 1; + memmove(shname, shname + len, + __md->elf.strtable_idx - shdr->sh_name - len); + __md->elf.strtable_idx -= len; + + /* Clear program header */ + tmp_phdr = elf_phdr_entry_addr(ehdr, phidx); + for (i = phidx; i < ehdr->e_phnum - 1; i++) { + tmp_phdr = elf_phdr_entry_addr(ehdr, i + 1); + phdr = elf_phdr_entry_addr(ehdr, i); + memcpy(phdr, tmp_phdr, sizeof(struct elf_phdr)); + phdr->p_offset = phdr->p_offset - region->size; + } + memset(tmp_phdr, 0, sizeof(struct elf_phdr)); + ehdr->e_phnum--; + + /* Clear section header */ + tmp_shdr = elf_shdr_entry_addr(ehdr, shidx); + for (i = shidx; i < ehdr->e_shnum - 1; i++) { + tmp_shdr = elf_shdr_entry_addr(ehdr, i + 1); + shdr = elf_shdr_entry_addr(ehdr, i); + memcpy(shdr, tmp_shdr, sizeof(struct elf_shdr)); + shdr->sh_offset -= region->size; + shdr->sh_name -= len; + } + + memset(tmp_shdr, 0, sizeof(struct elf_shdr)); + ehdr->e_shnum--; + __md->elf.elf_offset -= region->size; + + return 0; +} + +/** + * qcom_apss_minidump_region_unregister() - Unregister region from Minidump table. + * @region: minidump region. + * + * Return: On success, it returns 0 and negative error value on failure. + */ +int qcom_apss_minidump_region_unregister(const struct qcom_apss_minidump_region *region) +{ + struct minidump_region *mdr; + unsigned int num_region; + unsigned int idx; + int ret; + + if (!region) + return -EINVAL; + + mutex_lock(&minidump_lock); + if (!__md) { + ret = -EPROBE_DEFER; + goto unlock; + } + + idx = get_apss_minidump_region_index(region); + if (idx < 0) { + dev_err(__md->dev, "%s region is not present\n", region->name); + ret = idx; + goto unlock; + } + + mdr = &__md->md_regions[0]; + num_region = le32_to_cpu(__md->md_apss_toc->region_count); + /* + * Left shift all the regions exist after this removed region + * index by 1 to fill the gap and zero out the last region + * present at the end. + */ + memmove(&mdr[idx], &mdr[idx + 1], + (num_region - idx - 1) * sizeof(struct minidump_region)); + memset(&mdr[num_region - 1], 0, sizeof(struct minidump_region)); + ret = qcom_apss_minidump_clear_header(region); + if (ret) { + dev_err(__md->dev, "Failed to remove region: %s\n", region->name); + goto unlock; + } + + num_region--; + __md->md_apss_toc->region_count = cpu_to_le32(num_region); +unlock: + mutex_unlock(&minidump_lock); + return ret; +} +EXPORT_SYMBOL_GPL(qcom_apss_minidump_region_unregister); + +static int qcom_minidump_init_apss_subsystem(struct minidump *md) +{ + struct minidump_subsystem *apsstoc; + + apsstoc = &md->md_gbl_toc->subsystems[MINIDUMP_APSS_DESC]; + md->md_regions = devm_kcalloc(md->dev, MAX_NUM_ENTRIES, + sizeof(struct minidump_region), GFP_KERNEL); + if (!md->md_regions) + return -ENOMEM; + + md->md_apss_toc = apsstoc; + apsstoc->regions_baseptr = cpu_to_le64(virt_to_phys(md->md_regions)); + apsstoc->enabled = cpu_to_le32(MINIDUMP_SS_ENABLED); + apsstoc->status = cpu_to_le32(1); + apsstoc->region_count = cpu_to_le32(0); + + /* Tell bootloader not to encrypt the regions of this subsystem */ + apsstoc->encryption_status = cpu_to_le32(MINIDUMP_SS_ENCR_DONE); + apsstoc->encryption_required = cpu_to_le32(MINIDUMP_SS_ENCR_NOTREQ); + + return 0; +} + +static int qcom_minidump_probe(struct platform_device *pdev) +{ + struct minidump_global_toc *mdgtoc; + struct minidump *md; + size_t size; + int ret; + + md = devm_kzalloc(&pdev->dev, sizeof(*md), GFP_KERNEL); + if (!md) + return -ENOMEM; + + mdgtoc = qcom_smem_get(QCOM_SMEM_HOST_ANY, SBL_MINIDUMP_SMEM_ID, &size); + if (IS_ERR(mdgtoc)) { + ret = PTR_ERR(mdgtoc); + dev_err(&pdev->dev, "Couldn't find minidump smem item: %d\n", ret); + return ret; + } + + if (size < sizeof(*mdgtoc) || !mdgtoc->status) { + ret = -EINVAL; + dev_err(&pdev->dev, "minidump table is not initialized: %d\n", ret); + return ret; + } + + mutex_lock(&minidump_lock); + md->dev = &pdev->dev; + md->md_gbl_toc = mdgtoc; + ret = qcom_minidump_init_apss_subsystem(md); + if (ret) { + dev_err(&pdev->dev, "apss minidump initialization failed: %d\n", ret); + goto unlock; + } + + __md = md; + /* First entry would be ELF header */ + ret = qcom_apss_minidump_add_elf_header(); + if (ret) { + dev_err(&pdev->dev, "Failed to add elf header: %d\n", ret); + memset(md->md_apss_toc, 0, sizeof(struct minidump_subsystem)); + __md = NULL; + } + +unlock: + mutex_unlock(&minidump_lock); + return ret; +} + +static int qcom_minidump_remove(struct platform_device *pdev) +{ + memset(__md->md_apss_toc, 0, sizeof(struct minidump_subsystem)); + __md = NULL; + + return 0; +} + +static struct platform_driver qcom_minidump_driver = { + .probe = qcom_minidump_probe, + .remove = qcom_minidump_remove, + .driver = { + .name = "qcom-minidump", + }, +}; + +module_platform_driver(qcom_minidump_driver); + +MODULE_DESCRIPTION("Qualcomm APSS minidump driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:qcom-minidump"); diff --git a/drivers/soc/qcom/smem.c b/drivers/soc/qcom/smem.c index 6be7ea9..d459656 100644 --- a/drivers/soc/qcom/smem.c +++ b/drivers/soc/qcom/smem.c @@ -279,6 +279,7 @@ struct qcom_smem { u32 item_count; struct platform_device *socinfo; + struct platform_device *minidump; struct smem_ptable *ptable; struct smem_partition global_partition; struct smem_partition partitions[SMEM_HOST_COUNT]; @@ -1151,12 +1152,19 @@ static int qcom_smem_probe(struct platform_device *pdev) if (IS_ERR(smem->socinfo)) dev_dbg(&pdev->dev, "failed to register socinfo device\n"); + smem->minidump = platform_device_register_data(&pdev->dev, "qcom-minidump", + PLATFORM_DEVID_NONE, NULL, + 0); + if (IS_ERR(smem->minidump)) + dev_dbg(&pdev->dev, "failed to register minidump device\n"); + return 0; } static int qcom_smem_remove(struct platform_device *pdev) { platform_device_unregister(__smem->socinfo); + platform_device_unregister(__smem->minidump); hwspin_lock_free(__smem->hwlock); __smem = NULL; diff --git a/include/soc/qcom/qcom_minidump.h b/include/soc/qcom/qcom_minidump.h index 84c8605..1872668 100644 --- a/include/soc/qcom/qcom_minidump.h +++ b/include/soc/qcom/qcom_minidump.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * Qualcomm minidump shared data structures and macros + * This file contain Qualcomm minidump data structures and macros shared with + * boot firmware and also apss minidump client's data structure * * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ @@ -9,12 +10,27 @@ #define _QCOM_MINIDUMP_H_ #define MAX_NUM_OF_SS 10 +#define MAX_NAME_LENGTH 12 #define MAX_REGION_NAME_LENGTH 16 + +#define MINIDUMP_REVISION 1 #define SBL_MINIDUMP_SMEM_ID 602 + +/* Application processor minidump descriptor */ +#define MINIDUMP_APSS_DESC 0 +#define SMEM_ENTRY_SIZE 40 + #define MINIDUMP_REGION_VALID ('V' << 24 | 'A' << 16 | 'L' << 8 | 'I' << 0) +#define MINIDUMP_REGION_INVALID ('I' << 24 | 'N' << 16 | 'V' << 8 | 'A' << 0) +#define MINIDUMP_REGION_INIT ('I' << 24 | 'N' << 16 | 'I' << 8 | 'T' << 0) +#define MINIDUMP_REGION_NOINIT 0 + +#define MINIDUMP_SS_ENCR_REQ (0 << 24 | 'Y' << 16 | 'E' << 8 | 'S' << 0) +#define MINIDUMP_SS_ENCR_NOTREQ (0 << 24 | 0 << 16 | 'N' << 8 | 'R' << 0) +#define MINIDUMP_SS_ENCR_NONE ('N' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) #define MINIDUMP_SS_ENCR_DONE ('D' << 24 | 'O' << 16 | 'N' << 8 | 'E' << 0) +#define MINIDUMP_SS_ENCR_START ('S' << 24 | 'T' << 16 | 'R' << 8 | 'T' << 0) #define MINIDUMP_SS_ENABLED ('E' << 24 | 'N' << 16 | 'B' << 8 | 'L' << 0) - /** * struct minidump_region - Minidump region * @name : Name of the region to be dumped @@ -63,4 +79,45 @@ struct minidump_global_toc { struct minidump_subsystem subsystems[MAX_NUM_OF_SS]; }; +/** + * struct qcom_apss_minidump_region - APSS Minidump region information + * + * @name: Entry name, Minidump will dump binary with this name. + * @virt_addr: Virtual address of the entry. + * @phys_addr: Physical address of the entry to dump. + * @size: Number of byte to dump from @address location, + * and it should be 4 byte aligned. + */ +struct qcom_apss_minidump_region { + char name[MAX_NAME_LENGTH]; + void *virt_addr; + phys_addr_t phys_addr; + size_t size; +}; + +#if IS_ENABLED(CONFIG_QCOM_MINIDUMP) +extern struct minidump_subsystem * +qcom_minidump_subsystem_desc(unsigned int minidump_index); +extern int +qcom_apss_minidump_region_register(const struct qcom_apss_minidump_region *region); +extern int +qcom_apss_minidump_region_unregister(const struct qcom_apss_minidump_region *region); +#else +static inline +struct minidump_subsystem *qcom_minidump_subsystem_desc(unsigned int minidump_index) +{ + return NULL; +} +static inline int +qcom_apss_minidump_region_register(const struct qcom_apss_minidump_region *region) +{ + /* Return quietly, if minidump is not enabled */ + return 0; +} +static inline int +qcom_apss_minidump_region_unregister(const struct qcom_apss_minidump_region *region) +{ + return 0; +} +#endif #endif /* _QCOM_MINIDUMP_H_ */ From patchwork Wed May 3 17:02:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED344C77B75 for ; Wed, 3 May 2023 17:05:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229610AbjECRFI (ORCPT ); Wed, 3 May 2023 13:05:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43146 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229497AbjECRFD (ORCPT ); Wed, 3 May 2023 13:05:03 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF04D72BE; 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Wed, 03 May 2023 17:03:23 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H3MmI002780 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:03:22 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:16 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 05/18] soc: qcom: minidump: Add pending region registration support Date: Wed, 3 May 2023 22:32:19 +0530 Message-ID: <1683133352-10046-6-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Bvl1Frxt2Tf3ja90bvBzY24ChEsPq1DX X-Proofpoint-ORIG-GUID: Bvl1Frxt2Tf3ja90bvBzY24ChEsPq1DX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 spamscore=0 phishscore=0 mlxlogscore=999 mlxscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 clxscore=1015 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Pending regions are those apss minidump regions which came for registration before minidump was initialized or ready to do register the region. We can add regions to pending region list and register them from apss minidump driver probe in one go. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/qcom_minidump.c | 114 ++++++++++++++++++++++++++++++++++----- 1 file changed, 100 insertions(+), 14 deletions(-) diff --git a/drivers/soc/qcom/qcom_minidump.c b/drivers/soc/qcom/qcom_minidump.c index d107a86..6d29371 100644 --- a/drivers/soc/qcom/qcom_minidump.c +++ b/drivers/soc/qcom/qcom_minidump.c @@ -49,6 +49,25 @@ struct minidump { struct device *dev; }; +/** + * struct minidump_pending_region - Minidump pending region + * @list : Pending region list pointer + * @region : APSS minidump client region + */ +struct minidump_pending_region { + struct list_head list; + struct qcom_apss_minidump_region region; +}; + +/** + * struct minidump_pending_region_list - Minidump pending region list + * @pregion_list : List of pending region to be registered + * @pregion_cnt : Count of the pending region to be registered + */ +struct minidump_pending_region_list { + struct list_head pregion_list; + int pregion_cnt; +}; /* * In some of the Old Qualcomm devices, boot firmware statically allocates 300 * as total number of supported region (including all co-processors) in @@ -62,6 +81,10 @@ struct minidump { static struct minidump *__md; static DEFINE_MUTEX(minidump_lock); +static struct minidump_pending_region_list md_pregion_list = { + .pregion_list = LIST_HEAD_INIT(md_pregion_list.pregion_list), + .pregion_cnt = 0, +}; static struct elf_shdr *elf_shdr_entry_addr(struct elfhdr *ehdr, int idx) { @@ -312,6 +335,26 @@ struct minidump_subsystem *qcom_minidump_subsystem_desc(unsigned int minidump_in } EXPORT_SYMBOL_GPL(qcom_minidump_subsystem_desc); +static struct minidump_pending_region * +get_qcom_apss_pending_region(const struct qcom_apss_minidump_region *region) +{ + struct minidump_pending_region *md_pregion; + struct minidump_pending_region *tmp; + bool found = false; + + list_for_each_entry_safe(md_pregion, tmp, &md_pregion_list.pregion_list, list) { + struct qcom_apss_minidump_region *md_region; + + md_region = &md_pregion->region; + if (!strcmp(md_region->name, region->name)) { + found = true; + break; + } + } + + return found ? md_pregion : NULL; +} + /** * qcom_apss_minidump_region_register() - Register a region in Minidump table. * @region: minidump region. @@ -320,34 +363,58 @@ EXPORT_SYMBOL_GPL(qcom_minidump_subsystem_desc); */ int qcom_apss_minidump_region_register(const struct qcom_apss_minidump_region *region) { + struct minidump_pending_region *md_pregion; unsigned int num_region; - int ret; - - if (!__md) - return -EPROBE_DEFER; + int ret = 0; if (!qcom_apss_minidump_valid_region(region)) return -EINVAL; mutex_lock(&minidump_lock); - ret = get_apss_minidump_region_index(region); - if (ret >= 0) { - dev_info(__md->dev, "%s region is already registered\n", region->name); + if (!__md) { + md_pregion = get_qcom_apss_pending_region(region); + if (md_pregion) { + pr_info("%s region is already registered\n", region->name); + ret = -EEXIST; + goto unlock; + } + /* + * Maintain a list of client regions which came before + * minidump driver was ready and once it is ready, + * register them in one go from minidump probe function. + */ + md_pregion = kzalloc(sizeof(*md_pregion), GFP_KERNEL); + if (!md_pregion) { + ret = -ENOMEM; + goto unlock; + } + md_pregion->region = *region; + list_add_tail(&md_pregion->list, &md_pregion_list.pregion_list); + md_pregion_list.pregion_cnt++; + goto unlock; + } + + if (get_apss_minidump_region_index(region) >= 0) { + pr_info("%s region is already registered\n", region->name); ret = -EEXIST; goto unlock; } - /* Check if there is a room for a new entry */ + /* + * Check if there is a room for a new region. + * Also, here the check for pregion_cnt is against one less + * than MAX_NUM_ENTRIES as we need one entry for ELF header. + */ num_region = le32_to_cpu(__md->md_apss_toc->region_count); - if (num_region >= MAX_NUM_ENTRIES) { - dev_err(__md->dev, "maximum region limit %u reached\n", num_region); + if (md_pregion_list.pregion_cnt >= (MAX_NUM_ENTRIES - 1) || + num_region >= MAX_NUM_ENTRIES) { + pr_err("maximum region limit %u reached\n", num_region); ret = -ENOSPC; goto unlock; } qcom_apss_minidump_add_region(region); qcom_apss_minidump_update_elf_header(region); - ret = 0; unlock: mutex_unlock(&minidump_lock); return ret; @@ -443,17 +510,23 @@ qcom_apss_minidump_clear_header(const struct qcom_apss_minidump_region *region) */ int qcom_apss_minidump_region_unregister(const struct qcom_apss_minidump_region *region) { + struct minidump_pending_region *md_pregion; struct minidump_region *mdr; unsigned int num_region; unsigned int idx; - int ret; + int ret = 0; - if (!region) + if (!qcom_apss_minidump_valid_region(region)) return -EINVAL; mutex_lock(&minidump_lock); if (!__md) { - ret = -EPROBE_DEFER; + md_pregion = get_qcom_apss_pending_region(region); + if (!md_pregion) + goto unlock; + list_del(&md_pregion->list); + kfree(md_pregion); + md_pregion_list.pregion_cnt--; goto unlock; } @@ -513,6 +586,8 @@ static int qcom_minidump_init_apss_subsystem(struct minidump *md) static int qcom_minidump_probe(struct platform_device *pdev) { + struct minidump_pending_region *md_pregion; + struct minidump_pending_region *tmp; struct minidump_global_toc *mdgtoc; struct minidump *md; size_t size; @@ -551,8 +626,19 @@ static int qcom_minidump_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Failed to add elf header: %d\n", ret); memset(md->md_apss_toc, 0, sizeof(struct minidump_subsystem)); __md = NULL; + goto unlock; } + list_for_each_entry_safe(md_pregion, tmp, &md_pregion_list.pregion_list, list) { + struct qcom_apss_minidump_region *region; + + region = &md_pregion->region; + qcom_apss_minidump_add_region(region); + qcom_apss_minidump_update_elf_header(region); + list_del(&md_pregion->list); + kfree(md_pregion); + md_pregion_list.pregion_cnt--; + } unlock: mutex_unlock(&minidump_lock); return ret; From patchwork Wed May 3 17:02:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B112BC7EE29 for ; Wed, 3 May 2023 17:04:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229879AbjECREX (ORCPT ); Wed, 3 May 2023 13:04:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229643AbjECREV (ORCPT ); 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Wed, 03 May 2023 17:03:29 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H3SPV003327 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:03:28 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:22 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 06/18] soc: qcom: minidump: Add update region support Date: Wed, 3 May 2023 22:32:20 +0530 Message-ID: <1683133352-10046-7-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 8JZvSezMEangHpzKlFUdM0TSLv8Feffo X-Proofpoint-ORIG-GUID: 8JZvSezMEangHpzKlFUdM0TSLv8Feffo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 impostorscore=0 phishscore=0 suspectscore=0 spamscore=0 mlxlogscore=999 mlxscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support to update client's region physical/virtual addresses, which is useful for dynamic loadable modules, dynamic address changing clients like if we want to collect current stack information for each core and the current stack is changing on each sched_switch event, So here virtual/physical address of the current stack is changing. So, to cover such use cases add the update region support in minidump driver. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/qcom_minidump.c | 57 ++++++++++++++++++++++++++++++++++++++++ include/soc/qcom/qcom_minidump.h | 7 +++++ 2 files changed, 64 insertions(+) diff --git a/drivers/soc/qcom/qcom_minidump.c b/drivers/soc/qcom/qcom_minidump.c index 6d29371..853bdda 100644 --- a/drivers/soc/qcom/qcom_minidump.c +++ b/drivers/soc/qcom/qcom_minidump.c @@ -561,6 +561,63 @@ int qcom_apss_minidump_region_unregister(const struct qcom_apss_minidump_region } EXPORT_SYMBOL_GPL(qcom_apss_minidump_region_unregister); +/** + * qcom_apss_minidump_update_region() - Update region in APSS minidump table. + * @region: minidump region. + * + * Return: On success, it returns 0 and negative error value on failure. + */ +int qcom_apss_minidump_update_region(const struct qcom_apss_minidump_region *region) +{ + struct minidump_pending_region *md_pregion; + struct qcom_apss_minidump_region *tmp; + struct minidump_region *mdr; + struct elfhdr *ehdr; + struct elf_shdr *shdr; + struct elf_phdr *phdr; + int idx; + int ret = 0; + + if (!qcom_apss_minidump_valid_region(region)) + return -EINVAL; + + mutex_lock(&minidump_lock); + if (!__md) { + md_pregion = get_qcom_apss_pending_region(region); + if (!md_pregion) { + ret = -ENOENT; + goto unlock; + } + tmp = &md_pregion->region; + tmp->phys_addr = region->phys_addr; + tmp->virt_addr = region->virt_addr; + goto unlock; + } + + idx = get_apss_minidump_region_index(region); + if (idx < 0) { + pr_err("%s region is not present\n", region->name); + ret = idx; + goto unlock; + } + + mdr = &__md->md_regions[idx]; + mdr->address = cpu_to_le64(region->phys_addr); + + /* Skip predefined shdr/phdr header entry at the start */ + ehdr = __md->elf.ehdr; + shdr = elf_shdr_entry_addr(ehdr, idx + 4); + phdr = elf_phdr_entry_addr(ehdr, idx + 1); + + shdr->sh_addr = (elf_addr_t)region->virt_addr; + phdr->p_vaddr = (elf_addr_t)region->virt_addr; + phdr->p_paddr = region->phys_addr; +unlock: + mutex_unlock(&minidump_lock); + return ret; +} +EXPORT_SYMBOL_GPL(qcom_apss_minidump_update_region); + static int qcom_minidump_init_apss_subsystem(struct minidump *md) { struct minidump_subsystem *apsstoc; diff --git a/include/soc/qcom/qcom_minidump.h b/include/soc/qcom/qcom_minidump.h index 1872668..0c8cc2d 100644 --- a/include/soc/qcom/qcom_minidump.h +++ b/include/soc/qcom/qcom_minidump.h @@ -102,6 +102,8 @@ extern int qcom_apss_minidump_region_register(const struct qcom_apss_minidump_region *region); extern int qcom_apss_minidump_region_unregister(const struct qcom_apss_minidump_region *region); +extern int +qcom_apss_minidump_update_region(const struct qcom_apss_minidump_region *region); #else static inline struct minidump_subsystem *qcom_minidump_subsystem_desc(unsigned int minidump_index) @@ -119,5 +121,10 @@ qcom_apss_minidump_region_unregister(const struct qcom_apss_minidump_region *reg { return 0; } +statuc inline int +int qcom_apss_minidump_update_region(const struct qcom_apss_minidump_region *region) +{ + return 0; +} #endif #endif /* _QCOM_MINIDUMP_H_ */ From patchwork Wed May 3 17:02:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 695C4C77B75 for ; Wed, 3 May 2023 17:04:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229898AbjECREl (ORCPT ); Wed, 3 May 2023 13:04:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229893AbjECREk (ORCPT ); Wed, 3 May 2023 13:04:40 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8314376A8; Wed, 3 May 2023 10:04:03 -0700 (PDT) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343Gcb9t012207; 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Wed, 3 May 2023 17:03:34 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:28 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 07/18] arm64: defconfig: Enable Qualcomm minidump driver Date: Wed, 3 May 2023 22:32:21 +0530 Message-ID: <1683133352-10046-8-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: co3E59sLw9GlpKiJt9PbT74rQrJwoHUn X-Proofpoint-ORIG-GUID: co3E59sLw9GlpKiJt9PbT74rQrJwoHUn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 phishscore=0 suspectscore=0 adultscore=0 mlxlogscore=695 lowpriorityscore=0 priorityscore=1501 clxscore=1015 mlxscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Previous patches add the Qualcomm minidump driver support, so lets enable minidump config so that it can be used by kernel clients. Signed-off-by: Mukesh Ojha --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index a24609e..831c942 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1250,6 +1250,7 @@ CONFIG_QCOM_STATS=m CONFIG_QCOM_WCNSS_CTRL=m CONFIG_QCOM_APR=m CONFIG_QCOM_ICC_BWMON=m +CONFIG_QCOM_MINIDUMP=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77951=y From patchwork Wed May 3 17:02:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D70D0C7EE32 for ; Wed, 3 May 2023 17:06:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229945AbjECRGP (ORCPT ); Wed, 3 May 2023 13:06:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229913AbjECRGN (ORCPT ); Wed, 3 May 2023 13:06:13 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51E0259FC; Wed, 3 May 2023 10:05:41 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343GmrN4002039; Wed, 3 May 2023 17:04:10 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=8nYnzsuGMPsj8JOqe13LRPBczbL/fuoMs9/mE/rmmaE=; b=O8I42Xh/OTKcrSYBuQQqIMwaLeekgkwrVdCkcAYjWc2ApMwzbNGNLL7wwEe/PB6h7ASX mAQeKyuNozfA2vcoJDavQBKyd52xjPZuhNxeX3xdDYvztX9bxoM0yYIrtYHbCkSlbV3y MntE5Bs3cVcoLihEVbWU55XmBtCxGgLXSQH27lN0ubfdPcmuMrzDt0rBhRHgEJeWzc69 82kZ1ZnH2PxZ8PZ2fFTn/dPphRom/AJSK4A45pr8Psv1DpwB72G7QI/l6Nw1hF+NLp2Y rnhhgk+HsQZD0y8AGJGfEhU4oxy75+dZYNK2kpTD6an+vqaWf2+NreJe2dUJQEeEp2m8 nQ== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qbeb2sx60-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 17:04:10 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H3exR003561 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:03:40 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:34 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 08/18] remoterproc: qcom: refactor to leverage exported minidump symbol Date: Wed, 3 May 2023 22:32:22 +0530 Message-ID: <1683133352-10046-9-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 2FY1pXa6SwJ3AJP0-tSHYGW0NzkSHCrx X-Proofpoint-GUID: 2FY1pXa6SwJ3AJP0-tSHYGW0NzkSHCrx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 spamscore=0 bulkscore=0 mlxscore=0 phishscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=999 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qcom_minidump driver provides qcom_minidump_subsystem_desc() exported API which other driver can use it query subsystem descriptor. Refactor qcom_minidump() to use this symbol. Signed-off-by: Mukesh Ojha --- drivers/remoteproc/qcom_common.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/remoteproc/qcom_common.c b/drivers/remoteproc/qcom_common.c index 88fc984..240e9f7 100644 --- a/drivers/remoteproc/qcom_common.c +++ b/drivers/remoteproc/qcom_common.c @@ -94,19 +94,10 @@ void qcom_minidump(struct rproc *rproc, unsigned int minidump_id, { int ret; struct minidump_subsystem *subsystem; - struct minidump_global_toc *toc; - /* Get Global minidump ToC*/ - toc = qcom_smem_get(QCOM_SMEM_HOST_ANY, SBL_MINIDUMP_SMEM_ID, NULL); - - /* check if global table pointer exists and init is set */ - if (IS_ERR(toc) || !toc->status) { - dev_err(&rproc->dev, "Minidump TOC not found in SMEM\n"); + subsystem = qcom_minidump_subsystem_desc(minidump_id); + if (IS_ERR(subsystem)) return; - } - - /* Get subsystem table of contents using the minidump id */ - subsystem = &toc->subsystems[minidump_id]; /** * Collect minidump if SS ToC is valid and segment table From patchwork Wed May 3 17:02:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8322C7EE26 for ; Wed, 3 May 2023 17:06:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229974AbjECRGU (ORCPT ); Wed, 3 May 2023 13:06:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229924AbjECRGN (ORCPT ); Wed, 3 May 2023 13:06:13 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4952C5FF0; Wed, 3 May 2023 10:05:41 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343Bgvip022774; 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Wed, 3 May 2023 17:03:46 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:40 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 09/18] soc: qcom: Add qcom's pstore minidump driver support Date: Wed, 3 May 2023 22:32:23 +0530 Message-ID: <1683133352-10046-10-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: VODEKwVhn-KW2YEDAvkXgoxUSIZ4ma8n X-Proofpoint-GUID: VODEKwVhn-KW2YEDAvkXgoxUSIZ4ma8n X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 spamscore=0 mlxlogscore=999 phishscore=0 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This driver was inspired from the fact pstore ram region should be fixed and boot firmware need to have awarness about this region, so that it will be persistent across boot. But, there are many QCOM SoC which does not support warm boot from hardware but they have minidump support from the software, and for them, there is no need of this pstore ram region to be fixed, but at the same time have interest in the pstore frontends. So, this driver get the dynamic reserved region from the ram and register the ramoops platform device. +---------+ +---------+ +--------+ +---------+ | console | | pmsg | | ftrace | | dmesg | +---------+ +---------+ +--------+ +---------+ | | | | | | | | +------------------------------------------+ | \ / +----------------+ (1) |pstore frontends| +----------------+ | \ / +------------------- + (2) | pstore backend(ram)| +--------------------+ | \ / +--------------------+ (3) |qcom_pstore_minidump| +--------------------+ | \ / +---------------+ (4) | qcom_minidump | +---------------+ This driver will route all the pstore front data to the stored in qcom pstore reserved region and the reason of showing an arrow from (3) to (4) as qcom_pstore_minidump driver will register all the available frontends region with qcom minidump driver in upcoming patch. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/Kconfig | 11 +++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/qcom_pstore_minidump.c | 116 ++++++++++++++++++++++++++++++++ 3 files changed, 128 insertions(+) create mode 100644 drivers/soc/qcom/qcom_pstore_minidump.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 15c931e..afdc634 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -293,4 +293,15 @@ config QCOM_MINIDUMP these selective regions will be dumped instead of the entire DDR. This saves significant amount of time and/or storage space. +config QCOM_PSTORE_MINIDUMP + tristate "Pstore support for QCOM Minidump" + depends on ARCH_QCOM + depends on PSTORE_RAM + depends on QCOM_MINIDUMP + help + Enablement of this driver ensures that ramoops region can be anywhere + reserved in ram instead of being fixed address which needs boot firmware + awareness. So, this driver creates plaform device and registers available + frontend region with the Qualcomm's minidump driver. + endmenu diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 1ebe081..02d30d7 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -34,3 +34,4 @@ obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) += kryo-l2-accessors.o obj-$(CONFIG_QCOM_ICC_BWMON) += icc-bwmon.o obj-$(CONFIG_QCOM_INLINE_CRYPTO_ENGINE) += ice.o obj-$(CONFIG_QCOM_MINIDUMP) += qcom_minidump.o +obj-$(CONFIG_QCOM_PSTORE_MINIDUMP) += qcom_pstore_minidump.o diff --git a/drivers/soc/qcom/qcom_pstore_minidump.c b/drivers/soc/qcom/qcom_pstore_minidump.c new file mode 100644 index 0000000..8d58500 --- /dev/null +++ b/drivers/soc/qcom/qcom_pstore_minidump.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include + +struct qcom_ramoops_config { + unsigned long record_size; + unsigned long console_size; + unsigned long ftrace_size; + unsigned long pmsg_size; + unsigned int mem_type; + unsigned int flags; + int max_reason; +}; + +struct qcom_ramoops_dd { + struct ramoops_platform_data qcom_ramoops_pdata; + struct platform_device *ramoops_pdev; +}; + +static struct qcom_ramoops_config default_ramoops_config = { + .mem_type = 2, + .record_size = 0x0, + .console_size = 0x200000, + .ftrace_size = 0x0, + .pmsg_size = 0x0, +}; + +static struct qcom_ramoops_dd *qcom_rdd; +static int qcom_ramoops_probe(struct platform_device *pdev) +{ + struct device_node *of_node = pdev->dev.of_node; + struct device_node *node; + const struct qcom_ramoops_config *cfg; + struct ramoops_platform_data *pdata; + struct reserved_mem *rmem; + long ret; + + node = of_parse_phandle(of_node, "memory-region", 0); + if (!node) + return -ENODEV; + + rmem = of_reserved_mem_lookup(node); + of_node_put(node); + if (!rmem) { + dev_err(&pdev->dev, "failed to locate DT /reserved-memory resource\n"); + return -EINVAL; + } + + qcom_rdd = devm_kzalloc(&pdev->dev, sizeof(*qcom_rdd), GFP_KERNEL); + if (!qcom_rdd) + return -ENOMEM; + + cfg = of_device_get_match_data(&pdev->dev); + if (!cfg) { + dev_err(&pdev->dev, "failed to get supported matched data\n"); + return -ENOENT; + } + + pdata = &qcom_rdd->qcom_ramoops_pdata; + pdata->mem_size = rmem->size; + pdata->mem_address = rmem->base; + pdata->mem_type = cfg->mem_type; + pdata->record_size = cfg->record_size; + pdata->console_size = cfg->console_size; + pdata->ftrace_size = cfg->ftrace_size; + pdata->pmsg_size = cfg->pmsg_size; + pdata->max_reason = KMSG_DUMP_PANIC; + + qcom_rdd->ramoops_pdev = platform_device_register_data(NULL, "ramoops", -1, + pdata, sizeof(*pdata)); + if (IS_ERR(qcom_rdd->ramoops_pdev)) { + ret = PTR_ERR(qcom_rdd->ramoops_pdev); + dev_err(&pdev->dev, "could not create platform device: %ld\n", ret); + qcom_rdd->ramoops_pdev = NULL; + } + + return ret; +} + +static int qcom_ramoops_remove(struct platform_device *pdev) +{ + platform_device_unregister(qcom_rdd->ramoops_pdev); + qcom_rdd->ramoops_pdev = NULL; + + return 0; +} + +static const struct of_device_id qcom_ramoops_of_match[] = { + { .compatible = "qcom,sm8450-ramoops-minidump", .data = &default_ramoops_config }, + { .compatible = "qcom,ramoops-minidump", .data = &default_ramoops_config }, + {} +}; + +MODULE_DEVICE_TABLE(of, qcom_ramoops_of_match); +static struct platform_driver qcom_ramoops_drv = { + .driver = { + .name = "qcom,ramoops-minidump", + .of_match_table = qcom_ramoops_of_match, + }, + .probe = qcom_ramoops_probe, + .remove = qcom_ramoops_remove, +}; + +module_platform_driver(qcom_ramoops_drv); + +MODULE_DESCRIPTION("Qualcomm minidump pstore driver"); +MODULE_LICENSE("GPL"); From patchwork Wed May 3 17:02:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93CCEC7EE31 for ; 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Wed, 03 May 2023 17:04:10 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H3qj6003817 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:03:52 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:46 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 10/18] dt-bindings: reserved-memory: Add qcom,ramoops-minidump binding Date: Wed, 3 May 2023 22:32:24 +0530 Message-ID: <1683133352-10046-11-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: kqFYsdQB7Sa79CFON0MZqZxU1GuulYhW X-Proofpoint-ORIG-GUID: kqFYsdQB7Sa79CFON0MZqZxU1GuulYhW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 mlxscore=0 adultscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm ramoops minidump logger provide a means of storing the ramoops data to some dynamically reserved memory instead of traditionally implemented ramoops where the region should be statically fixed ram region. Add qcom,ramoops-minidump binding under "/reserved-memory", and is named "qcom,ramoops-minidump" and the reason of naming like this is because as it is going to contain ramoops frontend data and this content will be collected via Qualcomm minidump infrastructure provided from the boot firmware. Signed-off-by: Mukesh Ojha --- .../reserved-memory/qcom,ramoops-minidump.yaml | 69 ++++++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/reserved-memory/qcom,ramoops-minidump.yaml diff --git a/Documentation/devicetree/bindings/reserved-memory/qcom,ramoops-minidump.yaml b/Documentation/devicetree/bindings/reserved-memory/qcom,ramoops-minidump.yaml new file mode 100644 index 0000000..a308db0 --- /dev/null +++ b/Documentation/devicetree/bindings/reserved-memory/qcom,ramoops-minidump.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reserved-memory/qcom,ramoops-minidump.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm Ramoops minidump logger + +description: | + Qualcomm ramoops minidump logger provide a means of storing the ramoops data + to some dynamically reserved memory instead of traditionally implemented + ramoops where the region should be statically fixed ram region. + + This is a child-node of "/reserved-memory", and is named "qcom_ramoops_md_region" + and the reason of naming like this is because as it is going to contain ramoops + frontend data and this content will be collected via Qualcomm minidump + infrastructure provided from the boot firmware. + +maintainers: + - Mukesh Ojha + +allOf: + - $ref: "reserved-memory.yaml" + +properties: + compatible: + items: + - enum: + - qcom,sm8450-ramoops-minidump + - const: qcom,ramoops-minidump + + memory-region: + maxItems: 1 + items: + - description: handle to memory reservation for qcom,ramoops-minidump region. + + no-map: true + +unevaluatedProperties: false + +required: + - compatible + - memory-region + +examples: + - | + / { + compatible = "foo"; + model = "foo"; + #address-cells = <2>; + #size-cells = <2>; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + qcom_ramoops_md_region@qcom_ramoops_md { + alloc-ranges = <0x0 0x00000000 0xffffffff 0xffffffff>; + size = <0x0 0x200000>; + no-map + }; + }; + + qcom_ramoops_md { + compatible = "qcom,sm8450-ramoops-minidump", "qcom,ramoops-minidump"; + memory-region = <&qcom_ramoops_md_region>; + }; + }; From patchwork Wed May 3 17:02:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05C50C77B78 for ; Wed, 3 May 2023 17:06:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229903AbjECRGM (ORCPT ); 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Wed, 03 May 2023 17:04:03 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H3wR5003853 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:03:58 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:52 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 11/18] arm64: dts: qcom: sm8450: Add Qualcomm ramoops minidump node Date: Wed, 3 May 2023 22:32:25 +0530 Message-ID: <1683133352-10046-12-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Cfl-5WOcbwYZpvDBbsnEXcoeROMMQzBn X-Proofpoint-ORIG-GUID: Cfl-5WOcbwYZpvDBbsnEXcoeROMMQzBn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 phishscore=0 suspectscore=0 adultscore=0 mlxlogscore=911 lowpriorityscore=0 priorityscore=1501 clxscore=1015 mlxscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This enable dynamic reserve memory for Qualcomm ramoops device, Which will used to save ramoops frontend data and this region gets dumped on crash via Qualcomm's minidump infrastructure. qcom_pstore_minidump is the associated driver for this node. Signed-off-by: Mukesh Ojha --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 595533a..92d023f 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -614,6 +614,17 @@ reg = <0x0 0xed900000 0x0 0x3b00000>; no-map; }; + + qcom_ramoops_md_region:qcom_ramoops_md { + alloc-ranges = <0x0 0x00000000 0xffffffff 0xffffffff>; + size = <0x0 0x200000>; + no-map; + }; + }; + + qcom_ramoops_md { + compatible = "qcom,sm8450-ramoops-minidump", "qcom,ramoops-minidump"; + memory-region = <&qcom_ramoops_md_region>; }; smp2p-adsp { From patchwork Wed May 3 17:02:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0E6FC7EE26 for ; Wed, 3 May 2023 17:22:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229767AbjECRWl (ORCPT ); Wed, 3 May 2023 13:22:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229620AbjECRWk (ORCPT ); Wed, 3 May 2023 13:22:40 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F93210F1; Wed, 3 May 2023 10:22:39 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343GmLI0019257; Wed, 3 May 2023 17:04:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=3j6qKMufK1xOS3WjPDSg9QQXFKVRPXyyQTDI+AWUpgI=; b=ihSW94Fxv8BF+qz/loxVJczsOPRnVmMCC/uRdbKBcYgyV3HijWNH6rDBVBqdOtMw+JHG ue1qFjbgzzCCJI3lhRgCUgErKK1M1ZtSDbjRZbYH/vaWO9mxOsRb8zKWWRxIpj74KkSy AHm+hzzXFrwSiDcLHrqGD6hqunm3P3jeYq/mnI8abpk2Z3y1WMhk3LS8vEkIk1xYU18C QJsWvZYoqx6gdzztSvWaLJvi9oIc4I0j1PAKldLqzu/Bq5c6tgOdW8wliPQxRxNE7/sj XebdbZF4OoONDKuHcFKq4S2X5LGJ+p4m7vXd+NjJyOLenEROege+bpxQn+2iOS93QHhb pg== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qbk7sh7qy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 17:04:12 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H44fs005070 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:04 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:03:58 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 12/18] soc: qcom: Register pstore frontend region with minidump Date: Wed, 3 May 2023 22:32:26 +0530 Message-ID: <1683133352-10046-13-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: KciCwc0YGPllTPgHlxaAHCpumGHprIXZ X-Proofpoint-GUID: KciCwc0YGPllTPgHlxaAHCpumGHprIXZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 spamscore=0 mlxlogscore=999 phishscore=0 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Since qcom_pstore_minidump driver creates platform device for qualcomm devices, so it knows the physical addresses of the frontend region now. Let's register the regions with qcom_minidump driver. Signed-off-by: Mukesh Ojha --- drivers/soc/qcom/qcom_pstore_minidump.c | 80 ++++++++++++++++++++++++++++++++- 1 file changed, 79 insertions(+), 1 deletion(-) diff --git a/drivers/soc/qcom/qcom_pstore_minidump.c b/drivers/soc/qcom/qcom_pstore_minidump.c index 8d58500..c2bba4e 100644 --- a/drivers/soc/qcom/qcom_pstore_minidump.c +++ b/drivers/soc/qcom/qcom_pstore_minidump.c @@ -11,6 +11,8 @@ #include #include +#define QCOM_PSTORE_TYPE_MAX 4 + struct qcom_ramoops_config { unsigned long record_size; unsigned long console_size; @@ -24,6 +26,11 @@ struct qcom_ramoops_config { struct qcom_ramoops_dd { struct ramoops_platform_data qcom_ramoops_pdata; struct platform_device *ramoops_pdev; + struct device *dev; + struct qcom_apss_minidump_region *record_region; + struct qcom_apss_minidump_region *console_region; + struct qcom_apss_minidump_region *pmsg_region; + struct qcom_apss_minidump_region *ftrace_region; }; static struct qcom_ramoops_config default_ramoops_config = { @@ -35,6 +42,64 @@ static struct qcom_ramoops_config default_ramoops_config = { }; static struct qcom_ramoops_dd *qcom_rdd; + +static int +__qcom_ramoops_minidump_region_register(struct qcom_apss_minidump_region *md_region, + const char *name, phys_addr_t phys_addr, + unsigned long size) +{ + int ret; + + if (!size) + return 0; + + md_region = devm_kzalloc(qcom_rdd->dev, sizeof(*md_region), GFP_KERNEL); + if (!md_region) + return -ENOMEM; + + strlcpy(md_region->name, name, sizeof(md_region->name)); + md_region->phys_addr = phys_addr; + md_region->virt_addr = phys_to_virt(phys_addr); + md_region->size = size; + ret = qcom_apss_minidump_region_register(md_region); + if (ret) + dev_err(qcom_rdd->dev, + "failed to add %s in minidump: err: %d\n", name, ret); + + return ret; +} + +static int +qcom_ramoops_minidump_region_register(struct ramoops_platform_data *qcom_ramoops_data) +{ + phys_addr_t phys_addr; + int ret = 0; + + phys_addr = qcom_ramoops_data->mem_address; + ret = __qcom_ramoops_minidump_region_register(qcom_rdd->record_region, + "KDMESG", phys_addr, qcom_ramoops_data->record_size); + if (ret) + return ret; + + phys_addr += qcom_ramoops_data->record_size; + ret = __qcom_ramoops_minidump_region_register(qcom_rdd->console_region, + "KCONSOLE", phys_addr, qcom_ramoops_data->console_size); + if (ret) + return ret; + + phys_addr += qcom_ramoops_data->console_size; + ret = __qcom_ramoops_minidump_region_register(qcom_rdd->pmsg_region, + "KPMSG", phys_addr, qcom_ramoops_data->pmsg_size); + if (ret) + return ret; + + phys_addr += qcom_ramoops_data->pmsg_size; + ret = __qcom_ramoops_minidump_region_register(qcom_rdd->ftrace_region, + "KFTRACE", phys_addr, qcom_ramoops_data->ftrace_size); + + return ret; +} + static int qcom_ramoops_probe(struct platform_device *pdev) { struct device_node *of_node = pdev->dev.of_node; @@ -59,6 +124,7 @@ static int qcom_ramoops_probe(struct platform_device *pdev) if (!qcom_rdd) return -ENOMEM; + qcom_rdd->dev = &pdev->dev; cfg = of_device_get_match_data(&pdev->dev); if (!cfg) { dev_err(&pdev->dev, "failed to get supported matched data\n"); @@ -81,13 +147,25 @@ static int qcom_ramoops_probe(struct platform_device *pdev) ret = PTR_ERR(qcom_rdd->ramoops_pdev); dev_err(&pdev->dev, "could not create platform device: %ld\n", ret); qcom_rdd->ramoops_pdev = NULL; + return ret; } - return ret; + return qcom_ramoops_minidump_region_register(pdata); } static int qcom_ramoops_remove(struct platform_device *pdev) { + struct ramoops_platform_data *pdata; + + pdata = &qcom_rdd->qcom_ramoops_pdata; + if (pdata->record_size) + qcom_apss_minidump_region_unregister(qcom_rdd->record_region); + if (pdata->console_size) + qcom_apss_minidump_region_unregister(qcom_rdd->console_region); + if (pdata->pmsg_size) + qcom_apss_minidump_region_unregister(qcom_rdd->pmsg_region); + if (pdata->ftrace_size) + qcom_apss_minidump_region_unregister(qcom_rdd->ftrace_region); platform_device_unregister(qcom_rdd->ramoops_pdev); qcom_rdd->ramoops_pdev = NULL; From patchwork Wed May 3 17:02:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678863 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4BB8C7EE2A for ; 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Wed, 03 May 2023 17:04:11 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H4AYR005173 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:10 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:04:05 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 13/18] arm64: defconfig: Enable Qualcomm pstore minidump client driver Date: Wed, 3 May 2023 22:32:27 +0530 Message-ID: <1683133352-10046-14-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: buJuGJdCUAoeLGXfWZr1KZu94_Gah71P X-Proofpoint-GUID: buJuGJdCUAoeLGXfWZr1KZu94_Gah71P X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 spamscore=0 bulkscore=0 mlxscore=0 phishscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=803 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org As we have enabled qualcomm minidump driver, so lets enable one client driver which captures the already existing ramoops region like record, console, ftrace, pmsg through qualcomm minidump infrastructure. Signed-off-by: Mukesh Ojha --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 831c942..1ccae8b 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1251,6 +1251,7 @@ CONFIG_QCOM_WCNSS_CTRL=m CONFIG_QCOM_APR=m CONFIG_QCOM_ICC_BWMON=m CONFIG_QCOM_MINIDUMP=y +CONFIG_QCOM_PSTORE_MINIDUMP=y CONFIG_ARCH_R8A77995=y CONFIG_ARCH_R8A77990=y CONFIG_ARCH_R8A77951=y From patchwork Wed May 3 17:02:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CFFEC77B78 for ; Wed, 3 May 2023 17:06:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229965AbjECRGT (ORCPT ); Wed, 3 May 2023 13:06:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229914AbjECRGN (ORCPT ); Wed, 3 May 2023 13:06:13 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97BD276B7; Wed, 3 May 2023 10:05:41 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343FYptl010763; Wed, 3 May 2023 17:04:18 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=cTrb6AAL5Z/powfWWwL2O6iKbdcDlmyn8nzgAhqIzDw=; b=JkkXzoQvkg28ypNVYqpmwwpId05r/+tasVhqbg/jaJJ4/jvFDqOYsqv30BokzadsB5gs hAseGeTfvxUJNtkTH8hem2j4MSbNAx3+CPJLfZSyyOyQ2Pd1xI6s0gWNKRN1Tc2+Q+IQ i702lbrCaIedldd9S4hVBCjYriI01Ik6UG5GqKEhSvm4Dbwk9fiksHZir6YuFJf61kki Bm0oGSYwPv0QjgMSui7GxjcnS1knyHjR6JEIsCCY+pX5oQsIiPoXNHs2hQEe65vZ372l Xwk6f+pc+s8jDxvq9n71HKNiBEFVRdO/XjKa6xugqXCnQth8aJhkqXZsHCqEuOWA97zJ WQ== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qbn0a8yhk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 17:04:17 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H4GSg005221 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:16 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:04:11 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 14/18] firmware: qcom_scm: provide a read-modify-write function Date: Wed, 3 May 2023 22:32:28 +0530 Message-ID: <1683133352-10046-15-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: NT5Jp7dFkvyRw3WTO3FQ2yqq9b54g_IO X-Proofpoint-ORIG-GUID: NT5Jp7dFkvyRw3WTO3FQ2yqq9b54g_IO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 spamscore=0 phishscore=0 mlxlogscore=852 mlxscore=0 malwarescore=0 priorityscore=1501 impostorscore=0 clxscore=1015 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It was realized by Srinivas K. that there is a need of read-modify-write scm exported function so that it can be used by multiple clients. Let's introduce qcom_scm_io_update_field() which masks out the bits and write the passed value to that bit-offset. Subsequent patch will use this function. Suggested-by: Srinivas Kandagatla Signed-off-by: Mukesh Ojha --- drivers/firmware/qcom_scm.c | 15 +++++++++++++++ include/linux/firmware/qcom/qcom_scm.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index fde33acd..003cbcb 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -407,6 +407,21 @@ int qcom_scm_set_remote_state(u32 state, u32 id) } EXPORT_SYMBOL(qcom_scm_set_remote_state); +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, unsigned int val) +{ + unsigned int old, new; + int ret; + + ret = qcom_scm_io_readl(addr, &old); + if (ret) + return ret; + + new = (old & ~mask) | val << (ffs(mask) - 1); + + return qcom_scm_io_writel(addr, new); +} +EXPORT_SYMBOL(qcom_scm_io_update_field); + static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) { struct qcom_scm_desc desc = { diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h index 250ea4e..ca41e4e 100644 --- a/include/linux/firmware/qcom/qcom_scm.h +++ b/include/linux/firmware/qcom/qcom_scm.h @@ -84,6 +84,8 @@ extern bool qcom_scm_pas_supported(u32 peripheral); extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val); +extern int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, + unsigned int val); extern bool qcom_scm_restore_sec_cfg_available(void); extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare); From patchwork Wed May 3 17:02:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679132 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA27CC7EE45 for ; Wed, 3 May 2023 17:06:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229951AbjECRGP (ORCPT ); Wed, 3 May 2023 13:06:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229928AbjECRGO (ORCPT ); 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Wed, 03 May 2023 17:04:23 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H4N0N004206 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:23 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:04:17 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 15/18] pinctrl: qcom: Use qcom_scm_io_update_field() Date: Wed, 3 May 2023 22:32:29 +0530 Message-ID: <1683133352-10046-16-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 0Dk1vzNH1BoBMIVuq1Z0_xcxnx52KIEJ X-Proofpoint-GUID: 0Dk1vzNH1BoBMIVuq1Z0_xcxnx52KIEJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 spamscore=0 bulkscore=0 mlxscore=0 phishscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=881 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use qcom_scm_io_update_field() exported function introduced in last commit. Acked-by: Linus Walleij Signed-off-by: Mukesh Ojha --- drivers/pinctrl/qcom/pinctrl-msm.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 4515f37..856ebbf 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1042,6 +1042,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) unsigned long flags; bool was_enabled; u32 val; + u32 mask; if (msm_gpio_needs_dual_edge_parent_workaround(d, type)) { set_bit(d->hwirq, pctrl->dual_edge_irqs); @@ -1075,23 +1076,19 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) * With intr_target_use_scm interrupts are routed to * application cpu using scm calls. */ + mask = (7 << g->intr_target_bit); if (pctrl->intr_target_use_scm) { u32 addr = pctrl->phys_base[0] + g->intr_target_reg; int ret; - qcom_scm_io_readl(addr, &val); - - val &= ~(7 << g->intr_target_bit); - val |= g->intr_target_kpss_val << g->intr_target_bit; - - ret = qcom_scm_io_writel(addr, val); + ret = qcom_scm_io_update_field(addr, mask, g->intr_target_kpss_val); if (ret) dev_err(pctrl->dev, "Failed routing %lu interrupt to Apps proc", d->hwirq); } else { val = msm_readl_intr_target(pctrl, g); - val &= ~(7 << g->intr_target_bit); + val &= ~mask; val |= g->intr_target_kpss_val << g->intr_target_bit; msm_writel_intr_target(val, pctrl, g); } From patchwork Wed May 3 17:02:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 678860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D7D1C83003 for ; Wed, 3 May 2023 17:06:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229941AbjECRGo (ORCPT ); Wed, 3 May 2023 13:06:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229958AbjECRGS (ORCPT ); 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Wed, 03 May 2023 17:04:30 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H4Tll004433 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:29 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:04:23 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" , Poovendhan Selvaraj Subject: [PATCH v3 16/18] firmware: scm: Modify only the download bits in TCSR register Date: Wed, 3 May 2023 22:32:30 +0530 Message-ID: <1683133352-10046-17-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: QTog9BocchrWl8se06eU3kcX_W_JM-ou X-Proofpoint-GUID: QTog9BocchrWl8se06eU3kcX_W_JM-ou X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 impostorscore=0 adultscore=0 mlxlogscore=999 spamscore=0 phishscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org CrashDump collection is based on the DLOAD bit of TCSR register. To retain other bits, we read the register and modify only the DLOAD bit as the other bits have their own significance. Signed-off-by: Poovendhan Selvaraj Signed-off-by: Mukesh Ojha --- drivers/firmware/qcom_scm.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 003cbcb..775ac68 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -30,6 +30,9 @@ module_param(download_mode, bool, 0); #define SCM_HAS_IFACE_CLK BIT(1) #define SCM_HAS_BUS_CLK BIT(2) +#define QCOM_DOWNLOAD_MODE_MASK 0x30 +#define QCOM_DOWNLOAD_FULLDUMP 0x1 + struct qcom_scm { struct device *dev; struct clk *core_clk; @@ -448,8 +451,9 @@ static void qcom_scm_set_download_mode(bool enable) if (avail) { ret = __qcom_scm_set_dload_mode(__scm->dev, enable); } else if (__scm->dload_mode_addr) { - ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + ret = qcom_scm_io_update_field(__scm->dload_mode_addr, + QCOM_DOWNLOAD_MODE_MASK, + enable ? QCOM_DOWNLOAD_FULLDUMP : 0); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n"); From patchwork Wed May 3 17:02:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36C90C87FDD for ; Wed, 3 May 2023 17:06:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229996AbjECRGp (ORCPT ); Wed, 3 May 2023 13:06:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229993AbjECRGW (ORCPT ); Wed, 3 May 2023 13:06:22 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FCB67A84; Wed, 3 May 2023 10:05:48 -0700 (PDT) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343DICht030849; Wed, 3 May 2023 17:04:36 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=TcGExpkNVAKfPkIom5yVtMwcamlW4zFdCnQ1qI8g5Cg=; b=QQbDL9gqnDSzsiMazhE6SagRtHuYAMfYfI0wdli5HkaV/nG/kg2fX5EZeKTtsnE9HAAC cqvQUYYILNHgMsClh/qhygo3XNEYXILLU9vu8gURw7NLXMAT5AolCEqr9jGJ96sL73LJ 1+PFYiNoaovsEai3oqekmrSFnrlp26U6dSSpZ0cK82sE+abSFvMgtNfyPQAPdkVmFWj+ VrzlAfiYLHzC828JXhe5Fz5T83Lu8CyQGPZpob6O91qEIyDFXdNl5erWFyWY5EhIweVv LaHTJIoXd3XazGBWKpQQJoiFxrZwE6mVCvASeG3LW/L5SXlDz9uoYG6cNEFfqqWQoKsb pQ== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qbjwn9971-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 17:04:35 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H4Zlo004836 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:35 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:04:29 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 17/18] firmware: qcom_scm: Refactor code to support multiple download mode Date: Wed, 3 May 2023 22:32:31 +0530 Message-ID: <1683133352-10046-18-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ReaFtwFdu3iYyzqu5eWcJvSg8A06psLn X-Proofpoint-ORIG-GUID: ReaFtwFdu3iYyzqu5eWcJvSg8A06psLn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 phishscore=0 suspectscore=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 priorityscore=1501 clxscore=1015 mlxscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently on Qualcomm SoC, download_mode is enabled if CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is selected. Refactor the code such that it supports multiple download modes and drop CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT config instead, give interface to set the download mode from module parameter. Signed-off-by: Mukesh Ojha --- drivers/firmware/Kconfig | 11 --------- drivers/firmware/qcom_scm.c | 60 +++++++++++++++++++++++++++++++++++++++------ 2 files changed, 52 insertions(+), 19 deletions(-) diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index b59e304..ff7e9f3 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -215,17 +215,6 @@ config MTK_ADSP_IPC config QCOM_SCM tristate -config QCOM_SCM_DOWNLOAD_MODE_DEFAULT - bool "Qualcomm download mode enabled by default" - depends on QCOM_SCM - help - A device with "download mode" enabled will upon an unexpected - warm-restart enter a special debug mode that allows the user to - "download" memory content over USB for offline postmortem analysis. - The feature can be enabled/disabled on the kernel command line. - - Say Y here to enable "download mode" by default. - config SYSFB bool select BOOT_VESA_SUPPORT diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 775ac68..4e8fd4e 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -20,11 +20,11 @@ #include #include #include +#include #include "qcom_scm.h" -static bool download_mode = IS_ENABLED(CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT); -module_param(download_mode, bool, 0); +static u32 download_mode; #define SCM_HAS_CORE_CLK BIT(0) #define SCM_HAS_IFACE_CLK BIT(1) @@ -32,6 +32,7 @@ module_param(download_mode, bool, 0); #define QCOM_DOWNLOAD_MODE_MASK 0x30 #define QCOM_DOWNLOAD_FULLDUMP 0x1 +#define QCOM_DOWNLOAD_NODUMP 0x0 struct qcom_scm { struct device *dev; @@ -440,8 +441,9 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) return qcom_scm_call_atomic(__scm->dev, &desc, NULL); } -static void qcom_scm_set_download_mode(bool enable) +static void qcom_scm_set_download_mode(u32 download_mode) { + bool enable = !!download_mode; bool avail; int ret = 0; @@ -452,8 +454,7 @@ static void qcom_scm_set_download_mode(bool enable) ret = __qcom_scm_set_dload_mode(__scm->dev, enable); } else if (__scm->dload_mode_addr) { ret = qcom_scm_io_update_field(__scm->dload_mode_addr, - QCOM_DOWNLOAD_MODE_MASK, - enable ? QCOM_DOWNLOAD_FULLDUMP : 0); + QCOM_DOWNLOAD_MODE_MASK, download_mode); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n"); @@ -1421,6 +1422,49 @@ static irqreturn_t qcom_scm_irq_handler(int irq, void *data) return IRQ_HANDLED; } + +static int get_download_mode(char *buffer, const struct kernel_param *kp) +{ + int len = 0; + + if (download_mode == QCOM_DOWNLOAD_FULLDUMP) + len = sysfs_emit(buffer, "full\n"); + else if (download_mode == QCOM_DOWNLOAD_NODUMP) + len = sysfs_emit(buffer, "off\n"); + + return len; +} + +static int set_download_mode(const char *val, const struct kernel_param *kp) +{ + u32 old = download_mode; + + if (sysfs_streq(val, "full")) { + download_mode = QCOM_DOWNLOAD_FULLDUMP; + } else if (sysfs_streq(val, "off")) { + download_mode = QCOM_DOWNLOAD_NODUMP; + } else if (kstrtouint(val, 0, &download_mode) || + !(download_mode == 0 || download_mode == 1)) { + download_mode = old; + pr_err("qcom_scm: unknown download mode: %s\n", val); + return -EINVAL; + } + + if (__scm) + qcom_scm_set_download_mode(download_mode); + + return 0; +} + +static const struct kernel_param_ops download_mode_param_ops = { + .get = get_download_mode, + .set = set_download_mode, +}; + +module_param_cb(download_mode, &download_mode_param_ops, NULL, 0644); +MODULE_PARM_DESC(download_mode, + "Download mode: off/full or 0/1 for existing users"); + static int qcom_scm_probe(struct platform_device *pdev) { struct qcom_scm *scm; @@ -1514,12 +1558,12 @@ static int qcom_scm_probe(struct platform_device *pdev) __get_convention(); /* - * If requested enable "download mode", from this point on warmboot + * If "download mode" is requested, from this point on warmboot * will cause the boot stages to enter download mode, unless * disabled below by a clean shutdown/reboot. */ if (download_mode) - qcom_scm_set_download_mode(true); + qcom_scm_set_download_mode(download_mode); return 0; } @@ -1527,7 +1571,7 @@ static int qcom_scm_probe(struct platform_device *pdev) static void qcom_scm_shutdown(struct platform_device *pdev) { /* Clean shutdown, disable download mode to allow normal restart */ - qcom_scm_set_download_mode(false); + qcom_scm_set_download_mode(QCOM_DOWNLOAD_NODUMP); } static const struct of_device_id qcom_scm_dt_match[] = { From patchwork Wed May 3 17:02:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABE3CC7EE29 for ; Wed, 3 May 2023 17:21:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229574AbjECRVa (ORCPT ); Wed, 3 May 2023 13:21:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229825AbjECRV3 (ORCPT ); Wed, 3 May 2023 13:21:29 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A05452D69; 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Wed, 03 May 2023 17:04:42 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H4fEb005094 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:41 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:04:35 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 18/18] firmware: qcom_scm: Add multiple download mode support Date: Wed, 3 May 2023 22:32:32 +0530 Message-ID: <1683133352-10046-19-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: VbcRgKWOMRSE0qF1RQWPhjN5R6oFkcI2 X-Proofpoint-GUID: VbcRgKWOMRSE0qF1RQWPhjN5R6oFkcI2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 impostorscore=0 adultscore=0 mlxlogscore=999 spamscore=0 phishscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030145 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently, scm driver only supports full dump when download mode is selected. Add support to enable minidump as well as enable it along with fulldump. Signed-off-by: Mukesh Ojha --- drivers/firmware/qcom_scm.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 4e8fd4e..be7adc6 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -32,6 +32,8 @@ static u32 download_mode; #define QCOM_DOWNLOAD_MODE_MASK 0x30 #define QCOM_DOWNLOAD_FULLDUMP 0x1 +#define QCOM_DOWNLOAD_MINIDUMP 0x2 +#define QCOM_DOWNLOAD_BOTHDUMP (QCOM_DOWNLOAD_FULLDUMP | QCOM_DOWNLOAD_MINIDUMP) #define QCOM_DOWNLOAD_NODUMP 0x0 struct qcom_scm { @@ -1422,13 +1424,16 @@ static irqreturn_t qcom_scm_irq_handler(int irq, void *data) return IRQ_HANDLED; } - static int get_download_mode(char *buffer, const struct kernel_param *kp) { int len = 0; if (download_mode == QCOM_DOWNLOAD_FULLDUMP) len = sysfs_emit(buffer, "full\n"); + else if (download_mode == QCOM_DOWNLOAD_MINIDUMP) + len = sysfs_emit(buffer, "mini\n"); + else if (download_mode == QCOM_DOWNLOAD_BOTHDUMP) + len = sysfs_emit(buffer, "full,mini\n"); else if (download_mode == QCOM_DOWNLOAD_NODUMP) len = sysfs_emit(buffer, "off\n"); @@ -1439,8 +1444,12 @@ static int set_download_mode(const char *val, const struct kernel_param *kp) { u32 old = download_mode; - if (sysfs_streq(val, "full")) { + if (sysfs_streq(val, "full,mini") || sysfs_streq(val, "mini,full")) { + download_mode = QCOM_DOWNLOAD_BOTHDUMP; + } else if (sysfs_streq(val, "full")) { download_mode = QCOM_DOWNLOAD_FULLDUMP; + } else if (sysfs_streq(val, "mini")) { + download_mode = QCOM_DOWNLOAD_MINIDUMP; } else if (sysfs_streq(val, "off")) { download_mode = QCOM_DOWNLOAD_NODUMP; } else if (kstrtouint(val, 0, &download_mode) || @@ -1463,7 +1472,7 @@ static const struct kernel_param_ops download_mode_param_ops = { module_param_cb(download_mode, &download_mode_param_ops, NULL, 0644); MODULE_PARM_DESC(download_mode, - "Download mode: off/full or 0/1 for existing users"); + "download mode: off/full/mini/full,mini or mini,full and 0/1 for existing users"); static int qcom_scm_probe(struct platform_device *pdev) {