From patchwork Mon May 15 18:35:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 682105 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1127C7EE2D for ; Mon, 15 May 2023 18:35:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234009AbjEOSfp (ORCPT ); Mon, 15 May 2023 14:35:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243631AbjEOSf2 (ORCPT ); Mon, 15 May 2023 14:35:28 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05C9414E45; Mon, 15 May 2023 11:35:27 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FIZHp9081369; Mon, 15 May 2023 13:35:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684175717; bh=HI41MmN1o0il5MdqxxwNhXWMrjOyfyAcGRIkMr8+fTM=; h=From:To:CC:Subject:Date; b=ydPXDv6WXsGtiS0yMgQRWIwByQRDH7+FVP8FQDCSbOLCeAgEBOiAManj59XfsOGsK L6lV5l4ZC3V4jj7egzl4fDXBhQpyJOTQ04QF/lkoiHb8vx7jtdzjZefqgoEEsKsncd xf3Bd+QNSCklwmpdiqdLVqHUGB+A8fANiWXqG+1w= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FIZHui126954 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 13:35:17 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 13:35:16 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 13:35:16 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FIZGXN103396; Mon, 15 May 2023 13:35:16 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Santosh Shilimkar , Rob Herring , Krzysztof Kozlowski CC: , , , Andrew Davis Subject: [PATCH 1/5] ARM: keystone: Merge memory.h into the only file that uses it Date: Mon, 15 May 2023 13:35:11 -0500 Message-ID: <20230515183515.509371-1-afd@ti.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The defines in memory.h can go into the file that makes use of them. No reason to have a header here, remove. Signed-off-by: Andrew Davis --- arch/arm/mach-keystone/keystone.c | 12 ++++++++++-- arch/arm/mach-keystone/memory.h | 18 ------------------ 2 files changed, 10 insertions(+), 20 deletions(-) delete mode 100644 arch/arm/mach-keystone/memory.h diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c index aa352c2de313..fdc7d3621bd0 100644 --- a/arch/arm/mach-keystone/keystone.c +++ b/arch/arm/mach-keystone/keystone.c @@ -20,10 +20,18 @@ #include #include -#include "memory.h" - #include "keystone.h" +#define KEYSTONE_LOW_PHYS_START 0x80000000ULL +#define KEYSTONE_LOW_PHYS_SIZE 0x80000000ULL /* 2G */ +#define KEYSTONE_LOW_PHYS_END (KEYSTONE_LOW_PHYS_START + \ + KEYSTONE_LOW_PHYS_SIZE - 1) + +#define KEYSTONE_HIGH_PHYS_START 0x800000000ULL +#define KEYSTONE_HIGH_PHYS_SIZE 0x400000000ULL /* 16G */ +#define KEYSTONE_HIGH_PHYS_END (KEYSTONE_HIGH_PHYS_START + \ + KEYSTONE_HIGH_PHYS_SIZE - 1) + #ifdef CONFIG_ARM_LPAE static int keystone_platform_notifier(struct notifier_block *nb, unsigned long event, void *data) diff --git a/arch/arm/mach-keystone/memory.h b/arch/arm/mach-keystone/memory.h deleted file mode 100644 index 1b9ed1271e05..000000000000 --- a/arch/arm/mach-keystone/memory.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright 2014 Texas Instruments, Inc. - * Santosh Shilimkar - */ -#ifndef __MEMORY_H -#define __MEMORY_H - -#define KEYSTONE_LOW_PHYS_START 0x80000000ULL -#define KEYSTONE_LOW_PHYS_SIZE 0x80000000ULL /* 2G */ -#define KEYSTONE_LOW_PHYS_END (KEYSTONE_LOW_PHYS_START + \ - KEYSTONE_LOW_PHYS_SIZE - 1) - -#define KEYSTONE_HIGH_PHYS_START 0x800000000ULL -#define KEYSTONE_HIGH_PHYS_SIZE 0x400000000ULL /* 16G */ -#define KEYSTONE_HIGH_PHYS_END (KEYSTONE_HIGH_PHYS_START + \ - KEYSTONE_HIGH_PHYS_SIZE - 1) -#endif /* __MEMORY_H */ From patchwork Mon May 15 18:35:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 683719 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F186DC7EE24 for ; Mon, 15 May 2023 18:35:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243800AbjEOSfm (ORCPT ); Mon, 15 May 2023 14:35:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234009AbjEOSf0 (ORCPT ); Mon, 15 May 2023 14:35:26 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A50D14E43; Mon, 15 May 2023 11:35:25 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FIZHJj036901; Mon, 15 May 2023 13:35:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684175717; bh=xwIE6bmUKSyNu94MutgqMrmchU0RO3UTij1CjBXeXYs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VKgpyqRZ82xyycLB4kjBZAMPEt5SAbnvBYVD6gYQUGHdyZbWjBWfGGBsv5t6gQgYP e8+ozk9pzD5HDbNTInN8sO2ieBzUY0N7tXyVK1C54V08dwnpocENZbgV4PIQSPeEWX O8gafmw+RqwJqo3KGzripBiGJxgXDWT8I6rNrzIQ= Received: from DFLE101.ent.ti.com (dfle101.ent.ti.com [10.64.6.22]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FIZHIv126958 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 13:35:17 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 13:35:17 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 13:35:17 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FIZGXO103396; Mon, 15 May 2023 13:35:16 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Santosh Shilimkar , Rob Herring , Krzysztof Kozlowski CC: , , , Andrew Davis Subject: [PATCH 2/5] ARM: keystone: Merge PM function into main support file Date: Mon, 15 May 2023 13:35:12 -0500 Message-ID: <20230515183515.509371-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515183515.509371-1-afd@ti.com> References: <20230515183515.509371-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The one function left in this file does not justify a whole extra file nor the keystone.h support file used to forward declare that function. Merge this into the main keystone.c file. Signed-off-by: Andrew Davis --- arch/arm/mach-keystone/Makefile | 3 -- arch/arm/mach-keystone/keystone.c | 37 ++++++++++++++++++++-- arch/arm/mach-keystone/keystone.h | 16 ---------- arch/arm/mach-keystone/pm_domain.c | 50 ------------------------------ 4 files changed, 35 insertions(+), 71 deletions(-) delete mode 100644 arch/arm/mach-keystone/keystone.h delete mode 100644 arch/arm/mach-keystone/pm_domain.c diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile index 0c1d54aec60f..66598d29dd3c 100644 --- a/arch/arm/mach-keystone/Makefile +++ b/arch/arm/mach-keystone/Makefile @@ -1,5 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 obj-y := keystone.o - -# PM domain driver for Keystone SOCs -obj-$(CONFIG_ARCH_KEYSTONE) += pm_domain.o diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c index fdc7d3621bd0..a870b3f46f1a 100644 --- a/arch/arm/mach-keystone/keystone.c +++ b/arch/arm/mach-keystone/keystone.c @@ -6,10 +6,13 @@ * Cyril Chemparathy * Santosh Shilimkar */ + #include #include #include #include +#include +#include #include #include #include @@ -20,8 +23,6 @@ #include #include -#include "keystone.h" - #define KEYSTONE_LOW_PHYS_START 0x80000000ULL #define KEYSTONE_LOW_PHYS_SIZE 0x80000000ULL /* 2G */ #define KEYSTONE_LOW_PHYS_END (KEYSTONE_LOW_PHYS_START + \ @@ -32,6 +33,38 @@ #define KEYSTONE_HIGH_PHYS_END (KEYSTONE_HIGH_PHYS_START + \ KEYSTONE_HIGH_PHYS_SIZE - 1) +static struct dev_pm_domain keystone_pm_domain = { + .ops = { + USE_PM_CLK_RUNTIME_OPS + USE_PLATFORM_PM_SLEEP_OPS + }, +}; + +static struct pm_clk_notifier_block platform_domain_notifier = { + .pm_domain = &keystone_pm_domain, + .con_ids = { NULL }, +}; + +static const struct of_device_id of_keystone_table[] = { + {.compatible = "ti,k2hk"}, + {.compatible = "ti,k2e"}, + {.compatible = "ti,k2l"}, + { /* end of list */ }, +}; + +int __init keystone_pm_runtime_init(void) +{ + struct device_node *np; + + np = of_find_matching_node(NULL, of_keystone_table); + if (!np) + return 0; + + pm_clk_add_notifier(&platform_bus_type, &platform_domain_notifier); + + return 0; +} + #ifdef CONFIG_ARM_LPAE static int keystone_platform_notifier(struct notifier_block *nb, unsigned long event, void *data) diff --git a/arch/arm/mach-keystone/keystone.h b/arch/arm/mach-keystone/keystone.h deleted file mode 100644 index 71ff8cd2ee4a..000000000000 --- a/arch/arm/mach-keystone/keystone.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright 2013 Texas Instruments, Inc. - * Cyril Chemparathy - * Santosh Shilimkar - */ - -#ifndef __KEYSTONE_H__ -#define __KEYSTONE_H__ - -#ifndef __ASSEMBLER__ - -extern int keystone_pm_runtime_init(void); - -#endif /* __ASSEMBLER__ */ -#endif /* __KEYSTONE_H__ */ diff --git a/arch/arm/mach-keystone/pm_domain.c b/arch/arm/mach-keystone/pm_domain.c deleted file mode 100644 index 5eea01cbecf0..000000000000 --- a/arch/arm/mach-keystone/pm_domain.c +++ /dev/null @@ -1,50 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * PM domain driver for Keystone2 devices - * - * Copyright 2013 Texas Instruments, Inc. - * Santosh Shilimkar - * - * Based on Kevins work on DAVINCI SOCs - * Kevin Hilman - */ - -#include -#include -#include -#include -#include - -#include "keystone.h" - -static struct dev_pm_domain keystone_pm_domain = { - .ops = { - USE_PM_CLK_RUNTIME_OPS - USE_PLATFORM_PM_SLEEP_OPS - }, -}; - -static struct pm_clk_notifier_block platform_domain_notifier = { - .pm_domain = &keystone_pm_domain, - .con_ids = { NULL }, -}; - -static const struct of_device_id of_keystone_table[] = { - {.compatible = "ti,k2hk"}, - {.compatible = "ti,k2e"}, - {.compatible = "ti,k2l"}, - { /* end of list */ }, -}; - -int __init keystone_pm_runtime_init(void) -{ - struct device_node *np; - - np = of_find_matching_node(NULL, of_keystone_table); - if (!np) - return 0; - - pm_clk_add_notifier(&platform_bus_type, &platform_domain_notifier); - - return 0; -} From patchwork Mon May 15 18:35:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 682106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 535E8C7EE2C for ; Mon, 15 May 2023 18:35:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243936AbjEOSfo (ORCPT ); Mon, 15 May 2023 14:35:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243061AbjEOSf1 (ORCPT ); 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Mon, 15 May 2023 13:35:17 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 13:35:17 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FIZGXP103396; Mon, 15 May 2023 13:35:17 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Santosh Shilimkar , Rob Herring , Krzysztof Kozlowski CC: , , , Andrew Davis Subject: [PATCH 3/5] ARM: dts: keystone: Fix EEPROM node names Date: Mon, 15 May 2023 13:35:13 -0500 Message-ID: <20230515183515.509371-3-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515183515.509371-1-afd@ti.com> References: <20230515183515.509371-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org These should follow the standard EEPROM node naming convention. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/keystone-k2e-evm.dts | 2 +- arch/arm/boot/dts/keystone-k2hk-evm.dts | 2 +- arch/arm/boot/dts/keystone-k2l-evm.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/keystone-k2e-evm.dts b/arch/arm/boot/dts/keystone-k2e-evm.dts index abd5aef8b87d..04e0759a2527 100644 --- a/arch/arm/boot/dts/keystone-k2e-evm.dts +++ b/arch/arm/boot/dts/keystone-k2e-evm.dts @@ -78,7 +78,7 @@ &usb1 { }; &i2c0 { - dtt@50 { + eeprom@50 { compatible = "atmel,24c1024"; reg = <0x50>; }; diff --git a/arch/arm/boot/dts/keystone-k2hk-evm.dts b/arch/arm/boot/dts/keystone-k2hk-evm.dts index 1f762af6f502..206df8a8d9dd 100644 --- a/arch/arm/boot/dts/keystone-k2hk-evm.dts +++ b/arch/arm/boot/dts/keystone-k2hk-evm.dts @@ -154,7 +154,7 @@ partition@180000 { }; &i2c0 { - dtt@50 { + eeprom@50 { compatible = "atmel,24c1024"; reg = <0x50>; }; diff --git a/arch/arm/boot/dts/keystone-k2l-evm.dts b/arch/arm/boot/dts/keystone-k2l-evm.dts index 3a69f65de81e..8e15a26a3a7e 100644 --- a/arch/arm/boot/dts/keystone-k2l-evm.dts +++ b/arch/arm/boot/dts/keystone-k2l-evm.dts @@ -51,7 +51,7 @@ &usb0 { }; &i2c0 { - dtt@50 { + eeprom@50 { compatible = "atmel,24c1024"; reg = <0x50>; }; From patchwork Mon May 15 18:35:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 683718 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F12A0C7EE26 for ; Mon, 15 May 2023 18:35:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243939AbjEOSfo (ORCPT ); Mon, 15 May 2023 14:35:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243540AbjEOSf2 (ORCPT ); Mon, 15 May 2023 14:35:28 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D251B14E43; Mon, 15 May 2023 11:35:27 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 34FIZI9c081378; Mon, 15 May 2023 13:35:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1684175718; bh=JnjjWAVGwSSo+d6pUK6j7cnYzKxnARU0IZOvQu07WUE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nZQUKS1wlwWsIdVmSUfsxwZD8scBs+QtcA5OH0ZUCUe942w9paSaebfz2x35KfH5F 5YtfnEISoN+Oqb4Gi+z6tUNX+sVeacYGANP/LG/v3mk1z+aWaazKt2fdgT+yrOSPeS dgpiMdXJHOCzhZVXv6hLTNjEvOdhwCwVMCNN2HI4= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 34FIZIHM076362 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 15 May 2023 13:35:18 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 13:35:18 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 13:35:18 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FIZGXQ103396; Mon, 15 May 2023 13:35:17 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Santosh Shilimkar , Rob Herring , Krzysztof Kozlowski CC: , , , Andrew Davis Subject: [PATCH 4/5] ARM: dts: keystone: Remove ti,keystone from soc node compatible Date: Mon, 15 May 2023 13:35:14 -0500 Message-ID: <20230515183515.509371-4-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515183515.509371-1-afd@ti.com> References: <20230515183515.509371-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This is just a "simple-bus" node, there is no need for the extra compatible "ti,keystone" which is unused and undocumented. Signed-off-by: Andrew Davis --- arch/arm/boot/dts/keystone.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index 50789f9e2215..552ecd546cfd 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -69,9 +69,9 @@ psci { }; soc0: soc@0 { + compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - compatible = "ti,keystone","simple-bus"; interrupt-parent = <&gic>; ranges = <0x0 0x0 0x0 0xc0000000>; dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; From patchwork Mon May 15 18:35:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 683717 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A10BEC7EE25 for ; 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Mon, 15 May 2023 13:35:19 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 15 May 2023 13:35:19 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 15 May 2023 13:35:18 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 34FIZGXR103396; Mon, 15 May 2023 13:35:18 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Santosh Shilimkar , Rob Herring , Krzysztof Kozlowski CC: , , , Andrew Davis Subject: [PATCH 5/5] ARM: dts: keystone: Do not capitalize hex digits Date: Mon, 15 May 2023 13:35:15 -0500 Message-ID: <20230515183515.509371-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230515183515.509371-1-afd@ti.com> References: <20230515183515.509371-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Andrew Davis --- arch/arm/boot/dts/keystone-k2e-evm.dts | 2 +- arch/arm/boot/dts/keystone-k2e-netcp.dtsi | 2 +- arch/arm/boot/dts/keystone-k2g-evm.dts | 12 ++++++------ arch/arm/boot/dts/keystone-k2g-ice.dts | 14 +++++++------- arch/arm/boot/dts/keystone-k2g.dtsi | 6 +++--- arch/arm/boot/dts/keystone-k2l-evm.dts | 2 +- arch/arm/boot/dts/keystone-k2l.dtsi | 10 +++++----- arch/arm/boot/dts/keystone.dtsi | 6 +++--- 8 files changed, 27 insertions(+), 27 deletions(-) diff --git a/arch/arm/boot/dts/keystone-k2e-evm.dts b/arch/arm/boot/dts/keystone-k2e-evm.dts index 04e0759a2527..6978d6a362f3 100644 --- a/arch/arm/boot/dts/keystone-k2e-evm.dts +++ b/arch/arm/boot/dts/keystone-k2e-evm.dts @@ -130,7 +130,7 @@ partition@100000 { partition@180000 { label = "ubifs"; - reg = <0x180000 0x1FE80000>; + reg = <0x180000 0x1fe80000>; }; }; }; diff --git a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi index 42cf74db673c..bff73a0ed10b 100644 --- a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi +++ b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi @@ -167,7 +167,7 @@ cpts_refclk_mux: cpts-refclk-mux { <&tsipclka>, <&tsrefclk>, <&tsipclkb>; ti,mux-tbl = <0x0>, <0x1>, <0x2>, - <0x3>, <0x4>, <0x8>, <0xC>; + <0x3>, <0x4>, <0x8>, <0xc>; assigned-clocks = <&cpts_refclk_mux>; assigned-clock-parents = <&chipclk12>; }; diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts b/arch/arm/boot/dts/keystone-k2g-evm.dts index 3a87b7943c70..403eb1854ffe 100644 --- a/arch/arm/boot/dts/keystone-k2g-evm.dts +++ b/arch/arm/boot/dts/keystone-k2g-evm.dts @@ -218,16 +218,16 @@ K2G_CORE_IOPAD(0x1228) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE1) /* qspicsn3. emac_pins: pinmux_emac_pins { pinctrl-single,pins = < - K2G_CORE_IOPAD(0x113C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD1.RGMII_RXD1 */ + K2G_CORE_IOPAD(0x113c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD1.RGMII_RXD1 */ K2G_CORE_IOPAD(0x1138) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD2.RGMII_RXD2 */ K2G_CORE_IOPAD(0x1134) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD3.RGMII_RXD3 */ K2G_CORE_IOPAD(0x1140) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD0.RGMII_RXD0 */ K2G_CORE_IOPAD(0x1178) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD0.RGMII_TXD0 */ K2G_CORE_IOPAD(0x1174) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD1.RGMII_TXD1 */ K2G_CORE_IOPAD(0x1170) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD2.RGMII_TXD2 */ - K2G_CORE_IOPAD(0x116C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD3.RGMII_TXD3 */ + K2G_CORE_IOPAD(0x116c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD3.RGMII_TXD3 */ K2G_CORE_IOPAD(0x1154) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXCLK.RGMII_TXC */ - K2G_CORE_IOPAD(0x117C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXEN.RGMII_TXCTL */ + K2G_CORE_IOPAD(0x117c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXEN.RGMII_TXCTL */ K2G_CORE_IOPAD(0x1120) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXCLK.RGMII_RXC */ K2G_CORE_IOPAD(0x1144) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXDV.RGMII_RXCTL */ >; @@ -235,7 +235,7 @@ K2G_CORE_IOPAD(0x1144) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXDV.R mdio_pins: pinmux_mdio_pins { pinctrl-single,pins = < - K2G_CORE_IOPAD(0x118C) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_CLK.MDIO_CLK */ + K2G_CORE_IOPAD(0x118c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_CLK.MDIO_CLK */ K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_DATA.MDIO_DATA */ >; }; @@ -424,11 +424,11 @@ partition@3 { }; partition@4 { label = "QSPI.kernel"; - reg = <0x001C0000 0x0800000>; + reg = <0x001c0000 0x0800000>; }; partition@5 { label = "QSPI.file-system"; - reg = <0x009C0000 0x3640000>; + reg = <0x009c0000 0x3640000>; }; }; }; diff --git a/arch/arm/boot/dts/keystone-k2g-ice.dts b/arch/arm/boot/dts/keystone-k2g-ice.dts index bd84d7f0f2fe..b94615521172 100644 --- a/arch/arm/boot/dts/keystone-k2g-ice.dts +++ b/arch/arm/boot/dts/keystone-k2g-ice.dts @@ -239,15 +239,15 @@ K2G_CORE_IOPAD(0x121c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_csn0. mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - K2G_CORE_IOPAD(0x10FC) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ + K2G_CORE_IOPAD(0x10fc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ K2G_CORE_IOPAD(0x1100) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */ K2G_CORE_IOPAD(0x1104) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */ K2G_CORE_IOPAD(0x1108) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */ - K2G_CORE_IOPAD(0x110C) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */ + K2G_CORE_IOPAD(0x110c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_clk.mmc1_clk */ K2G_CORE_IOPAD(0x1110) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */ K2G_CORE_IOPAD(0x1114) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* mmc1_sdcd.gpio0_69 */ K2G_CORE_IOPAD(0x1118) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_sdwp.mmc1_sdwp */ - K2G_CORE_IOPAD(0x111C) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_pow.mmc1_pow */ + K2G_CORE_IOPAD(0x111c) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* mmc1_pow.mmc1_pow */ >; }; @@ -285,16 +285,16 @@ K2G_CORE_IOPAD(0x11bc) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE3) /* spi2_scsn1.g emac_pins: pinmux_emac_pins { pinctrl-single,pins = < - K2G_CORE_IOPAD(0x113C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD1.RGMII_RXD1 */ + K2G_CORE_IOPAD(0x113c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD1.RGMII_RXD1 */ K2G_CORE_IOPAD(0x1138) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD2.RGMII_RXD2 */ K2G_CORE_IOPAD(0x1134) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD3.RGMII_RXD3 */ K2G_CORE_IOPAD(0x1140) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXD0.RGMII_RXD0 */ K2G_CORE_IOPAD(0x1178) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD0.RGMII_TXD0 */ K2G_CORE_IOPAD(0x1174) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD1.RGMII_TXD1 */ K2G_CORE_IOPAD(0x1170) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD2.RGMII_TXD2 */ - K2G_CORE_IOPAD(0x116C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD3.RGMII_TXD3 */ + K2G_CORE_IOPAD(0x116c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXD3.RGMII_TXD3 */ K2G_CORE_IOPAD(0x1154) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXCLK.RGMII_TXC */ - K2G_CORE_IOPAD(0x117C) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXEN.RGMII_TXCTL */ + K2G_CORE_IOPAD(0x117c) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_TXEN.RGMII_TXCTL */ K2G_CORE_IOPAD(0x1120) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXCLK.RGMII_RXC */ K2G_CORE_IOPAD(0x1144) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXDV.RGMII_RXCTL */ >; @@ -302,7 +302,7 @@ K2G_CORE_IOPAD(0x1144) (BUFFER_CLASS_D | PULL_DISABLE | MUX_MODE1) /* MII_RXDV.R mdio_pins: pinmux_mdio_pins { pinctrl-single,pins = < - K2G_CORE_IOPAD(0x118C) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_CLK.MDIO_CLK */ + K2G_CORE_IOPAD(0x118c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_CLK.MDIO_CLK */ K2G_CORE_IOPAD(0x1188) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* MDIO_DATA.MDIO_DATA */ >; }; diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi index 380dd9d637ee..102d59694d90 100644 --- a/arch/arm/boot/dts/keystone-k2g.dtsi +++ b/arch/arm/boot/dts/keystone-k2g.dtsi @@ -177,7 +177,7 @@ uart2: serial@2531400 { dcan0: can@260b200 { compatible = "ti,am4372-d_can", "ti,am3352-d_can"; - reg = <0x0260B200 0x200>; + reg = <0x0260b200 0x200>; interrupts = ; status = "disabled"; power-domains = <&k2g_pds 0x0008>; @@ -186,7 +186,7 @@ dcan0: can@260b200 { dcan1: can@260b400 { compatible = "ti,am4372-d_can", "ti,am3352-d_can"; - reg = <0x0260B400 0x200>; + reg = <0x0260b400 0x200>; interrupts = ; status = "disabled"; power-domains = <&k2g_pds 0x0009>; @@ -593,7 +593,7 @@ spi1: spi@21805800 { spi2: spi@21805c00 { compatible = "ti,keystone-spi"; - reg = <0x21805C00 0x200>; + reg = <0x21805c00 0x200>; num-cs = <4>; ti,davinci-spi-intr-line = <0>; interrupts = ; diff --git a/arch/arm/boot/dts/keystone-k2l-evm.dts b/arch/arm/boot/dts/keystone-k2l-evm.dts index 8e15a26a3a7e..be619e39a16f 100644 --- a/arch/arm/boot/dts/keystone-k2l-evm.dts +++ b/arch/arm/boot/dts/keystone-k2l-evm.dts @@ -103,7 +103,7 @@ partition@100000 { partition@180000 { label = "ubifs"; - reg = <0x180000 0x7FE80000>; + reg = <0x180000 0x7fe80000>; }; }; }; diff --git a/arch/arm/boot/dts/keystone-k2l.dtsi b/arch/arm/boot/dts/keystone-k2l.dtsi index 421a02bbc9d3..084de2ce03e7 100644 --- a/arch/arm/boot/dts/keystone-k2l.dtsi +++ b/arch/arm/boot/dts/keystone-k2l.dtsi @@ -170,7 +170,7 @@ gpio_emu_pins: pinmux_gpio_emu_pins { * GPIO_EMU_SEL[18]: 0-GPIO18, 1-EMU20 * GPIO_EMU_SEL[17]: 0-GPIO17, 1-EMU19 */ - 0x4 0x0000 0xFFFE0000 + 0x4 0x0000 0xfffe0000 >; }; @@ -190,7 +190,7 @@ gpio_timio_pins: pinmux_gpio_timio_pins { * GPIO_TIMIO_SEL[5]: 0-GPIO5, 1-TIMI3 * GPIO_TIMIO_SEL[4]: 0-GPIO4, 1-TIMI2 */ - 0x4 0x0 0xFFF0 + 0x4 0x0 0xfff0 >; }; @@ -202,7 +202,7 @@ gpio_spi2cs_pins: pinmux_gpio_spi2cs_pins { * GPIO_SPI2CS_SEL[1]: 0-GPIO1, 1-SPI2CS2 * GPIO_SPI2CS_SEL[0]: 0-GPIO0, 1-SPI2CS1 */ - 0x4 0x0 0xF + 0x4 0x0 0xf >; }; @@ -226,7 +226,7 @@ gpio_dfeio_pins: pinmux_gpio_dfeio_pins { * GPIO_DFEIO_SEL[17]: 0-DFEIO3, 1-GPIO49 * GPIO_DFEIO_SEL[16]: 0-DFEIO2, 1-GPIO48 */ - 0x8 0x0 0xFFFF0000 + 0x8 0x0 0xffff0000 >; }; @@ -250,7 +250,7 @@ gpio_emifa_pins: pinmux_gpio_emifa_pins { * GPIO_EMIFA_SEL[1]: 0-EMIFA1, 1-GPIO33 * GPIO_EMIFA_SEL[0]: 0-EMIFA0, 1-GPIO32 */ - 0x8 0x0 0xFFFF + 0x8 0x0 0xffff >; }; }; diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index 552ecd546cfd..1fd04bb37a15 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -282,7 +282,7 @@ gpio0: gpio@260bf00 { ti,davinci-gpio-unbanked = <32>; }; - aemif: aemif@21000A00 { + aemif: aemif@21000a00 { compatible = "ti,keystone-aemif", "ti,davinci-aemif"; #address-cells = <2>; #size-cells = <1>; @@ -290,9 +290,9 @@ aemif: aemif@21000A00 { clock-names = "aemif"; clock-ranges; - reg = <0x21000A00 0x00000100>; + reg = <0x21000a00 0x00000100>; ranges = <0 0 0x30000000 0x10000000 - 1 0 0x21000A00 0x00000100>; + 1 0 0x21000a00 0x00000100>; }; pcie0: pcie@21800000 {