From patchwork Tue May 16 15:45:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 682507 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B32E9C7EE25 for ; Tue, 16 May 2023 15:46:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234169AbjEPPqX (ORCPT ); Tue, 16 May 2023 11:46:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234172AbjEPPqT (ORCPT ); Tue, 16 May 2023 11:46:19 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FE077DA2 for ; Tue, 16 May 2023 08:45:48 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-965ddb2093bso2153599566b.2 for ; Tue, 16 May 2023 08:45:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684251942; x=1686843942; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=xVvw51M3oghXEdU4QbKnqMa7gMGVZBvLOUaDcEfxIYI=; b=ytE8rV5ZI+aian4Sl6AOp0vjREMjTnZr37rOcYU3sN+b7EWSWmJeZ5/Fo8/C4tleIZ KBhEudhex1I/pmUtbrpWrYlOUzbD//JJUrUpO/duk5LKUFn33dhd7OJC6xNvsGpp7nL5 bbCndVK1npIiwHEMiMIh4OSdMjDyGoWbvf6hTbH+aM/2h7L4gg1gf33cuh96+KDd5NlZ oZATg5uyuCf0075tV72481F8wJsPOEVIVgkTs02z90DoTUlmg841IqwcBIRGSWAe6Zwn Nmg5BWdJt+3LnJImr+cpsalGx+IpeMKppjY4H7tPo30Xrl/Efk9D3Z4IbiJIp6gaN47l yWVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684251942; x=1686843942; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xVvw51M3oghXEdU4QbKnqMa7gMGVZBvLOUaDcEfxIYI=; b=Ku8ff5B48WUOpNjettU2OY3AtR1Cqu34aaj2nw82OfCYvpgSLJ64v/cXZCrp/n2b+p pBY8rMuUKzJi/lSir4EDWGF9lMbGwj2k52qlwwNlD9jQw18dhR9BfAV3HTPPSm3oIR5Q 0j9yY6MphAHykUCdByFNl/EVGH7bUnT2B7JBlNRPzMm3yzPpdLPs2uRGP3tQNHYYqT3U YBiuV1tGnJsjZM1GYU/+tIMkY2YcxijxMaEcTchR+kZZ16YC8htNvrNJhj4redA7S2gC DlIOz3ZWhv128mjVp3RxxAXSJIIlaSwEmykQgkNEMrqu1LgAnN8E2OoVr69xyw3Ykl+L ywKA== X-Gm-Message-State: AC+VfDzMKY26k4Kw4lddtcLuYlowkiGGJ8pkImYBXQk5ixGKjOJZpPXh oKyl1fsQFm8h3PceKJV6fknSyg== X-Google-Smtp-Source: ACHHUZ7DxXQjN+1+QCOknN6+ey/UP+0j03lKz8nbMqa+um3HYnxt9AF7TvKHKTfKDQJ7Wn/ZN4gVlA== X-Received: by 2002:a17:907:2d12:b0:969:98eb:3fdd with SMTP id gs18-20020a1709072d1200b0096998eb3fddmr29573166ejc.3.1684251941993; Tue, 16 May 2023 08:45:41 -0700 (PDT) Received: from krzk-bin.. ([2a02:810d:15c0:828:77d1:16a1:abe1:84fc]) by smtp.gmail.com with ESMTPSA id z25-20020a17090674d900b0096ac3e01a35sm5787587ejl.130.2023.05.16.08.45.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 May 2023 08:45:41 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 1/3] arm64: dts: qcom: sm8550: enable DISPCC by default Date: Tue, 16 May 2023 17:45:37 +0200 Message-Id: <20230516154539.238655-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable the Display Clock Controller by default in SoC DTSI so unused clocks can be turned off. It does not require any external resources, so as core SoC component should be always available to boards. Suggested-by: Konrad Dybcio Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Reviewed-by: Konrad Dybcio --- Changes in v2: 1. New patch --- arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 4 ---- arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 - 2 files changed, 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts index 785889450e8a..f27d5c657f44 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts @@ -419,10 +419,6 @@ vreg_l3g_1p2: ldo3 { }; }; -&dispcc { - status = "okay"; -}; - &mdss { status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 6e9bad8f6f33..0a3a08336b46 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2684,7 +2684,6 @@ dispcc: clock-controller@af00000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - status = "disabled"; }; usb_1_hsphy: phy@88e3000 { From patchwork Tue May 16 15:45:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 682506 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48A57C7EE2C for ; Tue, 16 May 2023 15:46:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234181AbjEPPqY (ORCPT ); Tue, 16 May 2023 11:46:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234165AbjEPPqT (ORCPT ); Tue, 16 May 2023 11:46:19 -0400 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3CA17D82 for ; Tue, 16 May 2023 08:45:50 -0700 (PDT) Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-9659c5b14d8so2404777266b.3 for ; Tue, 16 May 2023 08:45:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684251943; x=1686843943; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HQlA3yGFk+W7iwOwNJA/IHC43J6THIUeCVeGDi4cn+U=; b=VK6YP2iWRxhrKJYvG7HfcKg27w19vYmQLHqpzqx7iCe3mmZQ++716UsVI0Am7GqWL+ Mzkq4XRwVU5WBasxRCEh2Mv/SxiocZL1Kx+0ObtVX09Ioq7NjVHMRPXOGfQyZ31grP/1 CJsVBKseo3JxnvvvyGGlYnnrExdGHWcdoprywM118VvY+4Gz2JoOMrerXTEeGOciNysf nSEVLR5imfRm3+ow8gYAJYrabuQbV79SVwh7N0CZM9HuguypmIMETTnPzb9XgewlFvm6 jNl7808bOgN1Y0ztm3/Ro3FDResBHJfa2TDdrMRiNH7JXXSKw4XOUVpVdPVU+oe3IGQ+ WHqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684251943; x=1686843943; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HQlA3yGFk+W7iwOwNJA/IHC43J6THIUeCVeGDi4cn+U=; b=RCXlwunXfL7ViI3HqTnQePQvyU+G3V3hQCh7OL3zwqTbfVnVae2qUxx8ZTv1QW5IVE JnjlLQBVixs48rPtVTe1vEI8lIV38H3ty9UdGJhX1mczLID7qb9wcj4NCZXBSth9Byag 4yZkR1LjctUHTU9ysLo326YwrILqrTWklbJ9Wn1iz8V3B5a50fueAnoM9MWK29A1bbk/ Z3AvtwViwp9Tn7d+ZsS0yYz4gSUr11A1DJWhi8bW+/M1lNXfaTu7xZyhVtRK0KHyjrZ8 I4xRCTIUrjSBS3uIO3wq3Drt6bzSPT232cO62bmVk1+2MaP1O0xfMnFqYthRI8nvQnEm KeKQ== X-Gm-Message-State: AC+VfDylx0GVtSHRuNJ4SJleo6LB1oo1UbGNr3MVcfXzi4IKs9FZC1Xr isvSKtbvClZu0Wa7M485PB0Ybw== X-Google-Smtp-Source: ACHHUZ4CRZKuoHwoGmVwpJlrbkQ1LUo7Al6/SbQKg0Rx7PtzMW6yTz79nHA2GU7ki+vU9VLNEHWKtA== X-Received: by 2002:a17:907:6eaa:b0:94a:9ae2:1642 with SMTP id sh42-20020a1709076eaa00b0094a9ae21642mr38134440ejc.46.1684251943102; Tue, 16 May 2023 08:45:43 -0700 (PDT) Received: from krzk-bin.. ([2a02:810d:15c0:828:77d1:16a1:abe1:84fc]) by smtp.gmail.com with ESMTPSA id z25-20020a17090674d900b0096ac3e01a35sm5787587ejl.130.2023.05.16.08.45.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 May 2023 08:45:42 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 2/3] arm64: dts: qcom: sm8550-mtp: drop redundant MDP status Date: Tue, 16 May 2023 17:45:38 +0200 Message-Id: <20230516154539.238655-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230516154539.238655-1-krzysztof.kozlowski@linaro.org> References: <20230516154539.238655-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org MDP in sm8550.dtsi is not disabled (although its parent MDSS is), so board DTS does not have to enable it. Suggested-by: Konrad Dybcio Signed-off-by: Krzysztof Kozlowski --- Changes in v2: 1. New patch --- arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts index f27d5c657f44..579f65f52370 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts @@ -459,10 +459,6 @@ &mdss_dsi0_phy { status = "okay"; }; -&mdss_mdp { - status = "okay"; -}; - &pcie_1_phy_aux_clk { clock-frequency = <1000>; }; From patchwork Tue May 16 15:45:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 683065 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39918C7EE2D for ; Tue, 16 May 2023 15:46:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234184AbjEPPqZ (ORCPT ); Tue, 16 May 2023 11:46:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234175AbjEPPqU (ORCPT ); Tue, 16 May 2023 11:46:20 -0400 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 013F88A6A for ; Tue, 16 May 2023 08:45:53 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-9659443fb56so2243343166b.2 for ; Tue, 16 May 2023 08:45:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684251944; x=1686843944; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OAgahxZvZI+ueNx3zmY15nLRJ1KnLPgYZpaJXAq3Hfs=; b=JCKRKBqlQnkJ/a3WQyTZeB0t8+xkrK3LwhgSFztMZT3evmhNniR7h+GAhlAxVqFq7H eSQHJBXQ0M/1esGoK1lS/5UxHhJ9zU3kVw13pjs8pt5XUoYSUjJ2iDvX92ZWlYExSqYx oLmSZO8ZFi0DlpOazTm1esXKAPY12WV3JDxTAwU8GLs17G4J0aQcM0PbFGTFKqaya7fv wQ17rtxXosYv0OVc9/xf7p/MNwQwLdWVisSRboXDoGgwu7xFrFhuXLzIW6uD6fchdpzG FCWG0Yn+/LvyfKjuxGCzIPNAnUTMslKVQBSn8AAK5MXLIuac0rR539DDRwi3HfoAD72M nvLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684251944; x=1686843944; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OAgahxZvZI+ueNx3zmY15nLRJ1KnLPgYZpaJXAq3Hfs=; b=bTbSLcaU6DJ7CU2SE1zDk0Rxp2mjnlhaLPnUlUZSMQdcpjp1G68PlIgwMY0OHdIME/ B+7MWUNsyil1Oz38itNIyWjywm8dQzIeiy3JaRjnMwPbRFD1o6R62EwKfM/JEiMqOjhL 7p83PXi0qRXZnIt0+sc/FY9sAhLGZIAGpW89hbJj4A6lYzMS0VXiBeME/nINvjxx66j/ OvV6g5LoBHKrw1OwiyjIq6LeUxGdC/GC3yG+HfygrsLYOQPkE8Xo22gLayveA+6DHY6M rc7NeUl0evFiY6jaU0C53hG8PMWHs37QzFWBvzQvNTW//dL/usWaPH5VPRwTIpUVY2Zj E9jA== X-Gm-Message-State: AC+VfDycm7P+tLviwr16HROwytRgWwE55enn3XDYMNuyHjPjm1gfCT65 SMkNNujgZnQiNKcP/+9DGObbwQ== X-Google-Smtp-Source: ACHHUZ4EDVrnWEfbdkG5mU3WpO83DH+5+O2ZIP27e2NTAKGr3C1qTtqLz1sTc0wTznIjqhjQbqgxJw== X-Received: by 2002:a17:907:c1f:b0:961:ba6c:e949 with SMTP id ga31-20020a1709070c1f00b00961ba6ce949mr37299614ejc.68.1684251944289; Tue, 16 May 2023 08:45:44 -0700 (PDT) Received: from krzk-bin.. ([2a02:810d:15c0:828:77d1:16a1:abe1:84fc]) by smtp.gmail.com with ESMTPSA id z25-20020a17090674d900b0096ac3e01a35sm5787587ejl.130.2023.05.16.08.45.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 May 2023 08:45:43 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 3/3] arm64: dts: qcom: sm8550-qrd: add display and panel Date: Tue, 16 May 2023 17:45:39 +0200 Message-Id: <20230516154539.238655-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230516154539.238655-1-krzysztof.kozlowski@linaro.org> References: <20230516154539.238655-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable Display Subsystem with Visionox VTDR6130 Panel (same as on MTP8550). Signed-off-by: Krzysztof Kozlowski --- Context in the patch depends on: 1. https://lore.kernel.org/linux-arm-msm/20230516133011.108093-1-krzysztof.kozlowski@linaro.org/T/#t 2. https://lore.kernel.org/linux-arm-msm/20230512160452.206585-1-krzysztof.kozlowski@linaro.org/ Changes in v2: 1. dispcc is enabled in DTSI. 2. Re-order pinctrl and regulators. 3. Drop mdp. --- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 68 +++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts index 30b36a149125..ade6ba53ae6b 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -431,6 +431,46 @@ &gcc { <&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>; }; +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&vreg_l3e_1p2>; + status = "okay"; + + panel@0 { + compatible = "visionox,vtdr6130"; + reg = <0>; + + pinctrl-0 = <&sde_dsi_active>, <&sde_te_active>; + pinctrl-1 = <&sde_dsi_suspend>, <&sde_te_suspend>; + pinctrl-names = "default", "sleep"; + + vci-supply = <&vreg_l13b_3p0>; + vdd-supply = <&vreg_l11b_1p2>; + vddio-supply = <&vreg_l12b_1p8>; + + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; + + port { + panel0_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + remote-endpoint = <&panel0_in>; + data-lanes = <0 1 2 3>; +}; + +&mdss_dsi0_phy { + vdds-supply = <&vreg_l1e_0p88>; + status = "okay"; +}; + &pcie_1_phy_aux_clk { status = "disabled"; }; @@ -532,6 +572,34 @@ wcd_tx: codec@0,3 { &tlmm { gpio-reserved-ranges = <32 8>; + sde_dsi_active: sde-dsi-active-state { + pins = "gpio133"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + sde_dsi_suspend: sde-dsi-suspend-state { + pins = "gpio133"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + sde_te_active: sde-te-active-state { + pins = "gpio86"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; + + sde_te_suspend: sde-te-suspend-state { + pins = "gpio86"; + function = "mdp_vsync"; + drive-strength = <2>; + bias-pull-down; + }; + wcd_default: wcd-reset-n-active-state { pins = "gpio108"; function = "gpio";