From patchwork Mon Jun 10 17:10:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166336 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1271893ilk; Mon, 10 Jun 2019 10:11:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqx5GZRPv6EjhUquTEDL04U9U7FlSYICnBlcWKNeF8jGaqbAW5fR9SmN/LSMTthKNtqNbcoO X-Received: by 2002:a63:950d:: with SMTP id p13mr16535233pgd.269.1560186690966; Mon, 10 Jun 2019 10:11:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186690; cv=none; d=google.com; s=arc-20160816; b=vsDk/kewd5J5Sxg/ZNeKrF39ecw0npBIrFT/CTvF9tk9B0Ey1XSeTOEtZiz4py4NUM zWwXZQS2wLNcsWi+VV1EszfWPYI0FoBV+PiC+Fh9HaAWUe49XCPd8noeKHcabvf1RVAx iONu2I4oB7k9tjgooL/ChLeu+E+JQPbfoJz341lOPuCMfZ3tWwfKxQcD4SAlDx+U5+s9 7YDDMMjs0iCOTdXCFw/I1ItXN7n9xr/7qERAMle0tpRUneSk9MyU5GEiVwydrDF4dXA4 LJC28b+8zGG8BGDpWtYUC+5fdQx9cWfFOlegcUhi8FoyUwx3gfi3jBJqMHBUwsSvukDW NWTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=MosGYb3zQL/rr9NkvnZy2tg6gONUGVMX30Qu02oiURc=; b=Ku+RLQpCwQ6NFHcZG0bzHTt92RhFloO7seLATwEBn82Aw/sNKLlFXnoyUT3wLW2CMY Ri9ssh2DbPW3n/IjqxuL13xO+uyBxwOoBdJOf00GSuY1RjYz6Ef4UJtXkWOJRtGUUVXp CLLz8HvtOyPiDWbFawso2AsvSneiIph/NYyUHlamrLnb4XFC5dNeZWlb+lFqd3cPKTRU 2HU+rmqWev1/YDmQQUVsUpXRh20dJzJyC7+WN/82PEAeBmUaRs5OaFvks8Px5QkmpVeM 0pHjEbsi4FzFQH9cABEFwH2IJtBdm1dxeBnxW5KOGkienDYbvfC71guFnw9x9tDWy6SY 1ftQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="m1SZipH/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v9si9873284pgs.312.2019.06.10.10.11.30; Mon, 10 Jun 2019 10:11:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="m1SZipH/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387853AbfFJRL3 (ORCPT + 30 others); Mon, 10 Jun 2019 13:11:29 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:44260 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387415AbfFJRLZ (ORCPT ); Mon, 10 Jun 2019 13:11:25 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHBIuH121359; Mon, 10 Jun 2019 12:11:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186678; bh=MosGYb3zQL/rr9NkvnZy2tg6gONUGVMX30Qu02oiURc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=m1SZipH/hzkCgk/uEsK6l98o3+22bdAH272uMzCjOmp/opcTnKIE1e5NDClTD0rxx ZXyj1tg91kiMF4ZHPWPCwVNE2Jalz8Y0C+57CinT7r916c0E42TLAOyfKwYgn86gc+ qBEYBPTxETTXiLNJvMHNsK+KT8p4GwDYTJh0UfTs= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHBITi011699 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:11:18 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:11:18 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:11:18 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHBHRv066482; Mon, 10 Jun 2019 12:11:18 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 01/20] gpio: gpio-omap: ensure irq is enabled before wakeup Date: Mon, 10 Jun 2019 20:10:44 +0300 Message-ID: <20190610171103.30903-2-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Russell King Documentation states: NOTE: There must be a correlation between the wake-up enable and interrupt-enable registers. If a GPIO pin has a wake-up configured on it, it must also have the corresponding interrupt enabled (on one of the two interrupt lines). Ensure that this condition is always satisfied by enabling the detection events after enabling the interrupt, and disabling the detection before disabling the interrupt. This ensures interrupt/wakeup events can not happen until both the wakeup and interrupt enables correlate. If we do any clearing, clear between the interrupt enable/disable and trigger setting. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 16289bafa001..2c6d46396834 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -832,9 +832,9 @@ static void omap_gpio_irq_shutdown(struct irq_data *d) raw_spin_lock_irqsave(&bank->lock, flags); bank->irq_usage &= ~(BIT(offset)); - omap_set_gpio_irqenable(bank, offset, 0); - omap_clear_gpio_irqstatus(bank, offset); omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); + omap_clear_gpio_irqstatus(bank, offset); + omap_set_gpio_irqenable(bank, offset, 0); if (!LINE_USED(bank->mod_usage, offset)) omap_clear_gpio_debounce(bank, offset); omap_disable_gpio_module(bank, offset); @@ -870,8 +870,8 @@ static void omap_gpio_mask_irq(struct irq_data *d) unsigned long flags; raw_spin_lock_irqsave(&bank->lock, flags); - omap_set_gpio_irqenable(bank, offset, 0); omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); + omap_set_gpio_irqenable(bank, offset, 0); raw_spin_unlock_irqrestore(&bank->lock, flags); } @@ -883,9 +883,6 @@ static void omap_gpio_unmask_irq(struct irq_data *d) unsigned long flags; raw_spin_lock_irqsave(&bank->lock, flags); - if (trigger) - omap_set_gpio_triggering(bank, offset, trigger); - omap_set_gpio_irqenable(bank, offset, 1); /* @@ -893,9 +890,13 @@ static void omap_gpio_unmask_irq(struct irq_data *d) * is cleared, thus after the handler has run. OMAP4 needs this done * after enabing the interrupt to clear the wakeup status. */ - if (bank->level_mask & BIT(offset)) + if (bank->regs->leveldetect0 && bank->regs->wkup_en && + trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) omap_clear_gpio_irqstatus(bank, offset); + if (trigger) + omap_set_gpio_triggering(bank, offset, trigger); + raw_spin_unlock_irqrestore(&bank->lock, flags); } From patchwork Mon Jun 10 17:10:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166337 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1271961ilk; Mon, 10 Jun 2019 10:11:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqySUhgMITLTEi4TYP7FntYUFy8j0TmF8tYO9LoF0nNcRxcd0idNE+C5VxjiSiSEZI3urc0+ X-Received: by 2002:a17:902:ba88:: with SMTP id k8mr64134348pls.196.1560186695154; Mon, 10 Jun 2019 10:11:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186695; cv=none; d=google.com; s=arc-20160816; b=goVqgU1y+mVbGh3+WLcNWCQJkmVx2eOj5Pf7tdil/WefaCfgZWpkoMdanlM0zuzmvb x0ipUJI58b+hrdPQl/Mm7ynR9FoRQ/zZivebgTFPzx1vTIjhnREu6u7xZI1O0odQV5qL HM1zA3/chHa8RJ+KIYkUAzCK2zYwHwlEQSOoQY141Hdx3RPVKTuPqL4FfrH9p2DJRfI0 bWgUkPIcSESz1RS5ThxTtfBJVoc2WhmoRNCBmmw84/of2Oc22MPv6jVM4tTFgE2MFbpN hNqkLFXU6bHXZvol1YfNdDgJy98rImFb25ZdL58mX4CVG4UdpOZfVb6aOCIzadSjSE98 u+7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=D2I3+AEazuZDhIiJtTZewtdd+cu8+rlLH2evSAkj3Tw=; b=r6Rpz0fTBblbEInlW+4otyuZbrSgVSWvgdpuwaTv8eY5/F3IaqdcpBTMEWHdFEtBvV nDx7/5OClZbfSd5Mls6VORTsZR4QfhmPjp7OKRx4qJRhWQP3NTJn9sA2k1XixncloJDM g8WCO2/8cKw3OsilKbkZFY0NjvkraBOoIUhIMhlu42sSV0Jw96JPxNHGaaS+GYox3hlR 1LNl5N3nmd+KWJIQkTpfikWfNMBWcT8bqzvigN533/OzCI0uYV1uv/7XfF8CJiGkTE1B BTDVB6GDs5OELLrhCA/1mQ+irLqh5gThdhOhKhw6Ambyww2dJwOIoXsVKFDi8HwbvpFr wjUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=JWXZpp6N; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o6si10539578plh.197.2019.06.10.10.11.34; Mon, 10 Jun 2019 10:11:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=JWXZpp6N; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387943AbfFJRLe (ORCPT + 30 others); Mon, 10 Jun 2019 13:11:34 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57586 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387415AbfFJRLc (ORCPT ); Mon, 10 Jun 2019 13:11:32 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHBPLZ056820; Mon, 10 Jun 2019 12:11:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186685; bh=D2I3+AEazuZDhIiJtTZewtdd+cu8+rlLH2evSAkj3Tw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=JWXZpp6NRv6TcJ8/UZOsqrxcN9z3o32GylrygV/NicsPJDfJHRZnz0MENPuek84// B9Zj8tHn+2822bu96Limhiyg9oDC36K1zynp/Zqk2hGwW+e5dlbfdkzrbuxwJ4bmtK h2ZQO7DWm3ncxNjgzvRDx1S1HDEdLPGuzGwnbnE8= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHBPhw010006 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:11:25 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:11:25 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:11:25 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHBO7l050474; Mon, 10 Jun 2019 12:11:24 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 02/20] gpio: gpio-omap: fix lack of irqstatus_raw0 for OMAP4 Date: Mon, 10 Jun 2019 20:10:45 +0300 Message-ID: <20190610171103.30903-3-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Russell King Commit 384ebe1c2849 ("gpio/omap: Add DT support to GPIO driver") added the register definition tables to the gpio-omap driver. Subsequently to that commit, commit 4e962e8998cc ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()") added definitions for irqstatus_raw* registers to the legacy OMAP4 definitions, but missed the DT definitions. This causes an unintentional change of behaviour for the 1.101 errata workaround on OMAP4 platforms. Fix this oversight. Fixes: 4e962e8998cc ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()") Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 2c6d46396834..44b214e5cefb 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -1457,6 +1457,8 @@ static struct omap_gpio_reg_offs omap4_gpio_regs = { .clr_dataout = OMAP4_GPIO_CLEARDATAOUT, .irqstatus = OMAP4_GPIO_IRQSTATUS0, .irqstatus2 = OMAP4_GPIO_IRQSTATUS1, + .irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0, + .irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1, .irqenable = OMAP4_GPIO_IRQSTATUSSET0, .irqenable2 = OMAP4_GPIO_IRQSTATUSSET1, .set_irqenable = OMAP4_GPIO_IRQSTATUSSET0, From patchwork Mon Jun 10 17:10:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166345 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1272921ilk; Mon, 10 Jun 2019 10:12:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqwVdgDvmppSLkXVnEwFaWt3w+1VVwuLKmTdWeUL11rlhz8aXvSqdLE8/SVCFFkNJNS+UY6O X-Received: by 2002:aa7:80d9:: with SMTP id a25mr74963147pfn.50.1560186751404; Mon, 10 Jun 2019 10:12:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186751; cv=none; d=google.com; s=arc-20160816; b=USBuoMhwTQsXzOQoiIuepGyNBK4V5Mz2PnYm/5/qmCBFwE1l6q37mKxHQynXQRRe0k +77gFmomcwfIskh5JsgwZ/Hw0UzbrzWeuSkdNZg/RORlXo8dGs8bJcTzGtq7EIgu19BP E5GOwWpTFe3c5K40OuxRmTe/1Mlefvad096Us/nq50177dpKg++2HChBTVu7EPEGuYI1 tXT5Q7uvrakCqw4rkwr3pB5dUEOPZGya+ZfrZOz2K+IJ0Kghfly7Wfjzyd2sI6ZX5ChG RNvN1Y+i6+5fB+ES8uXf4TuN9OtcgWq9CFZ/ihQAMO97W38u2xQif11J+2YNbBi35HWr TIcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=mRBjHVSGVjmh06j3YRgbF6k6lDaugFDHiLDKP+4u0kM=; b=DuJD6IE8eqO4bvK2wTyVLGsXC3BZr4ikMs5t2vRlD2nSX/DSTVcQwDteA9a0q75ZC5 L0HGgHO6HDCe0CfOStinc7w3Wl0DPPMIfETu1MJRc3WTtHkKq0tRySab8+uhmHRwOAUi 6WpKL4Ag82CCc1t9OizpQod/UsqY5dVZCyzaQmxIxjxGJWYMug3Zz2myPPwKszVHKwQe ZTfaTbqmyb/kylYiUyjtEgbT89dCjyvd8w6YA/GBEe0LDjqoYgrjWgDm9SQZRq9qPfyw l/I8JCmVrnpOrpTC53k7xs1sDrCR80nzWJUMQrVP6Ti/sJ7KvpK7cU9afFyNwDYDegUB M3Qg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=mANGvUlk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a17si21913pjq.31.2019.06.10.10.12.31; Mon, 10 Jun 2019 10:12:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=mANGvUlk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388339AbfFJRM3 (ORCPT + 30 others); Mon, 10 Jun 2019 13:12:29 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:44446 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387898AbfFJRM0 (ORCPT ); Mon, 10 Jun 2019 13:12:26 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCG0p121555; Mon, 10 Jun 2019 12:12:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186736; bh=mRBjHVSGVjmh06j3YRgbF6k6lDaugFDHiLDKP+4u0kM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mANGvUlk0EVPNp5Z1gQWmbIavoQghIE9hfDvbe6QKk8UJS37FVmxLbZBaogKEF9eJ ZfZRJ9iO1WmCHcOICvLc3rw4UQnM267VHI9znNJZZUYZkARaPl4OBHVU8xckyiEdm9 vlFM1zrhv0fmwAfPxn8qYMkqu6Oc6DezuHGewRD0= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHCGXe011053 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:12:16 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:12:12 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:12:12 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCBGW051427; Mon, 10 Jun 2019 12:12:11 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 09/20] gpio: gpio-omap: simplify get_multiple() Date: Mon, 10 Jun 2019 20:10:52 +0300 Message-ID: <20190610171103.30903-10-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Russell King There is no reason to have helper functions to read the datain and dataout registers when they are only used in one location. Simplify this code to make it more readable. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 36 +++++++++++------------------------- 1 file changed, 11 insertions(+), 25 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index bf1e6f1d0de7..a26decc5c611 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -175,22 +175,6 @@ static void omap_set_gpio_dataout_mask_multiple(struct gpio_bank *bank, bank->context.dataout = l; } -static unsigned long omap_get_gpio_datain_multiple(struct gpio_bank *bank, - unsigned long *mask) -{ - void __iomem *reg = bank->base + bank->regs->datain; - - return readl_relaxed(reg) & *mask; -} - -static unsigned long omap_get_gpio_dataout_multiple(struct gpio_bank *bank, - unsigned long *mask) -{ - void __iomem *reg = bank->base + bank->regs->dataout; - - return readl_relaxed(reg) & *mask; -} - static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) { int l = readl_relaxed(base + reg); @@ -987,18 +971,20 @@ static int omap_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpio_bank *bank = gpiochip_get_data(chip); - void __iomem *reg = bank->base + bank->regs->direction; - unsigned long in = readl_relaxed(reg), l; + void __iomem *base = bank->base; + u32 direction, m, val = 0; + + direction = readl_relaxed(base + bank->regs->direction); - *bits = 0; + m = direction & *mask; + if (m) + val |= readl_relaxed(base + bank->regs->datain) & m; - l = in & *mask; - if (l) - *bits |= omap_get_gpio_datain_multiple(bank, &l); + m = ~direction & *mask; + if (m) + val |= readl_relaxed(base + bank->regs->dataout) & m; - l = ~in & *mask; - if (l) - *bits |= omap_get_gpio_dataout_multiple(bank, &l); + *bits = val; return 0; } From patchwork Mon Jun 10 17:10:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166348 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1273379ilk; Mon, 10 Jun 2019 10:12:52 -0700 (PDT) X-Google-Smtp-Source: APXvYqyOBdIrCaU1bJJ1Y+e5KHbx35dvmnDb9QCYxEDtlA5aZZx+DH35i/15/aDKryidB9ylS+LF X-Received: by 2002:a17:902:9a06:: with SMTP id v6mr54129108plp.71.1560186771872; Mon, 10 Jun 2019 10:12:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186771; cv=none; d=google.com; s=arc-20160816; b=MunyVN98oye8jr06odIza84HFyA6THBQjfnr+TAzuWbhwbPAfV6kXlM7NW9ZlyCDAc BFN2FKf1szblmAZXmX//YRQIrhW5vGnjtwfu4eLGE76+Gz9ILFWFxu55vHOedVLEkr2b 5qyoHeIDzOB/32I6rRAwapuVgHgcNfj/NhMPkmrkdv2hrKPRKCwoIU0fRC3CJrKFmL33 X6f806tGIPfjUmPzOXxa1T9vcA/GHDf4DJb2hZ8ZMJvHyn6CpjcVzBe6QvOr1sEOcyA7 6/tiM/KQHUvzRAo3vJ0AY1VPoiFibpnaMa2eZSs/5D6P6yz7X0PCc0Dx/9CPWW9EosJC gh1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=E2VsaT4+Yu4S9xAGSUBcnO1WYenuJ5B2QhgSL4vZl1M=; b=tqqIyzKOe4UQefUI/MmzN43XNacPMcqP3ET963MdtZ6JtcnHljC31BDceBpNlLtF0b 4FDWyCYnaw91iCADCK/tpDGUa0AJ0WIwfya3J7S2hpPWGHYYVvIacXuwfIRQ+oUAacDm OVhdOIIJc9nogzvXTH7gq2230ySaHvfAHsUt3tBARuU2k0Rwb0a0s7jvWEBumZw8yrCn H8jbHNTZRYXmy6axTMvkUdtflrXgd5Dp1dqEAqUs6yq/B1WfkHSOIUGgU9AD4QDy1Imb y2vubG7/rIUZPUjG3yS1RYRHyy1VK4fVbwb37P5ZXVymhnBLAuOlOTsYzMWkcdhTlTij McwA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aZVQyZpJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z34si5242842pgl.240.2019.06.10.10.12.51; Mon, 10 Jun 2019 10:12:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aZVQyZpJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388521AbfFJRMv (ORCPT + 30 others); Mon, 10 Jun 2019 13:12:51 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:47490 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388374AbfFJRMt (ORCPT ); Mon, 10 Jun 2019 13:12:49 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCd4r069377; Mon, 10 Jun 2019 12:12:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186759; bh=E2VsaT4+Yu4S9xAGSUBcnO1WYenuJ5B2QhgSL4vZl1M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aZVQyZpJnzqXNlu95UrXSUjdES47+TJg7maxYlHxoB9U4kdBeb5P8eWYC6tfhe1sc 76JE45pFEcAh1LvwKKEbVDG2gcmIEctWBkWHMEZtwUzmqG0WL3Q0NsgIcvinCpBUgf IrLoDkLM1Ec4el5kTTZDnSiSsTpS9kryNJP5FZac= Received: from DFLE111.ent.ti.com (dfle111.ent.ti.com [10.64.6.32]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHCde2080910 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:12:39 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:12:39 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:12:39 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHCcbS039651; Mon, 10 Jun 2019 12:12:38 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 13/20] gpio: gpio-omap: simplify omap_toggle_gpio_edge_triggering() Date: Mon, 10 Jun 2019 20:10:56 +0300 Message-ID: <20190610171103.30903-14-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Russell King This function open-codes an exclusive-or bitwise operation using an if() statement and explicitly setting or clearing the bit. Instead, use an exclusive-or operation instead, and simplify the function. We can combine the preprocessor conditional using IS_ENABLED() and gain some additional compilation coverage. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 22 ++++------------------ 1 file changed, 4 insertions(+), 18 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 1a0890586b45..097ed8d1a117 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -326,32 +326,18 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, } } -#ifdef CONFIG_ARCH_OMAP1 /* * This only applies to chips that can't do both rising and falling edge * detection at once. For all other chips, this function is a noop. */ static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) { - void __iomem *reg = bank->base; - u32 l = 0; - - if (!bank->regs->irqctrl) - return; - - reg += bank->regs->irqctrl; + if (IS_ENABLED(CONFIG_ARCH_OMAP1) && bank->regs->irqctrl) { + void __iomem *reg = bank->base + bank->regs->irqctrl; - l = readl_relaxed(reg); - if ((l >> gpio) & 1) - l &= ~(BIT(gpio)); - else - l |= BIT(gpio); - - writel_relaxed(l, reg); + writel_relaxed(readl_relaxed(reg) ^ BIT(gpio), reg); + } } -#else -static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {} -#endif static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, unsigned trigger) From patchwork Mon Jun 10 17:11:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166352 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1273864ilk; Mon, 10 Jun 2019 10:13:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqyOzgMY32BWJ1zjKOSaFw0omZ8Ei8BIVAqKTW6n73zrUDJz64K4n4SxiogsPA30IIH8Zn9v X-Received: by 2002:a63:5f0d:: with SMTP id t13mr10060181pgb.358.1560186795144; Mon, 10 Jun 2019 10:13:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186795; cv=none; d=google.com; s=arc-20160816; b=y4QopCl0BOrXmFUxQDq81ESvlbTmHUDmIApYZCd/Dv2rzfNetT3nA+co4gHi2XZg6j uD6riS6juyFOVNXRokCwkbQ7/oUEkZXw9QAF5Hgn/uSnRkEO/Y9l91r5VUNG3sUhLJ+b 68HIU17hbZUxPmBcMdGxcJl6erG/VeB3hcDxOq9TSu+ilfAvqN0yI7/TGLOZEL08GCOH u14VdJA7zSIZhQ0/iRWzdBKpR1Xp/CJFcdBTV3kDKukHFDiPNU8+vmVR2Va2BaqZrLSn r3FuDM+gyrx+Q0DBgPUuji8GlDEWNuoUzcVvVWtXQcd2FYpNDRaz+emSNrA9BltHJT32 IuhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=2ZgA57Gdj2rwJ+EjwsPy+BIiDag1tZJkzLFveUqMaUM=; b=HauTN17f7RoAyIqo2TPiMCnafBO25TGKi9SxXLwyEaom66nJ7VqkWSDXgM5MOmAaXT cSLzle4Cv/hfIbswlczKZvWVlXORvUMHv5jC6kjNRpSZTgGJiSPWxMmEHFf6bTIyBqpE qwH0DilBZOGRFdV5WKgNRXvQM+iGNgLEa5DAW7bq9MouZBAtphVOUCHJe8AbslxNG66R WUrXLpjcYf6u1wGd7MYSqBRKdqYLQLBWSFkvhBTUe7S5ex6ss/b6tMNQgyTbrtn0ggMr 9mvcXJyxtguFHbqG1VKGTtNYXddBrb186WBEYwOskilhcy4OGcS/qtfRkjWzDSW0V/EF EVNw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Cu5p+NWB; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Constify these tables. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 12 ++++++------ include/linux/platform_data/gpio-omap.h | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 1c5fa12bcf9f..039bbb1ae6cb 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -48,6 +48,8 @@ struct gpio_regs { struct gpio_bank { void __iomem *base; + const struct omap_gpio_reg_offs *regs; + int irq; u32 non_wakeup_gpios; u32 enabled_non_wakeup_gpios; @@ -75,8 +77,6 @@ struct gpio_bank { void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable); int (*get_context_loss_count)(struct device *dev); - - struct omap_gpio_reg_offs *regs; }; #define GPIO_MOD_CTRL_BIT BIT(0) @@ -1075,7 +1075,7 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) static void omap_gpio_init_context(struct gpio_bank *p) { - struct omap_gpio_reg_offs *regs = p->regs; + const struct omap_gpio_reg_offs *regs = p->regs; void __iomem *base = p->base; p->context.ctrl = readl_relaxed(base + regs->ctrl); @@ -1094,7 +1094,7 @@ static void omap_gpio_init_context(struct gpio_bank *p) static void omap_gpio_restore_context(struct gpio_bank *bank) { - struct omap_gpio_reg_offs *regs = bank->regs; + const struct omap_gpio_reg_offs *regs = bank->regs; void __iomem *base = bank->base; writel_relaxed(bank->context.wake_en, base + regs->wkup_en); @@ -1267,7 +1267,7 @@ static int gpio_omap_cpu_notifier(struct notifier_block *nb, return NOTIFY_OK; } -static struct omap_gpio_reg_offs omap2_gpio_regs = { +static const struct omap_gpio_reg_offs omap2_gpio_regs = { .revision = OMAP24XX_GPIO_REVISION, .direction = OMAP24XX_GPIO_OE, .datain = OMAP24XX_GPIO_DATAIN, @@ -1290,7 +1290,7 @@ static struct omap_gpio_reg_offs omap2_gpio_regs = { .fallingdetect = OMAP24XX_GPIO_FALLINGDETECT, }; -static struct omap_gpio_reg_offs omap4_gpio_regs = { +static const struct omap_gpio_reg_offs omap4_gpio_regs = { .revision = OMAP4_GPIO_REVISION, .direction = OMAP4_GPIO_OE, .datain = OMAP4_GPIO_DATAIN, diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h index 17edc43201d2..8b30b14b47d3 100644 --- a/include/linux/platform_data/gpio-omap.h +++ b/include/linux/platform_data/gpio-omap.h @@ -186,7 +186,7 @@ struct omap_gpio_platform_data { bool is_mpuio; /* whether the bank is of type MPUIO */ u32 non_wakeup_gpios; - struct omap_gpio_reg_offs *regs; + const struct omap_gpio_reg_offs *regs; /* Return context loss count due to PM states changing */ int (*get_context_loss_count)(struct device *dev); From patchwork Mon Jun 10 17:11:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166351 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1273827ilk; Mon, 10 Jun 2019 10:13:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqzIco5OvmRU8/Zvhnengm6o395wrB6oprfgKcE/nUdIEE9avylNS/ZiZ5WVyCuirMR7kkyI X-Received: by 2002:a65:56cb:: with SMTP id w11mr16507493pgs.236.1560186793204; Mon, 10 Jun 2019 10:13:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186793; cv=none; d=google.com; s=arc-20160816; b=nFY027pxkUuRr0OWk0jRaLOGPv99TE8EgV8d118cHDeCtDKbp/URyJOqrLk51Zmh3q 5EXsXKcCXWWnJ+EMw1jMydiaD+mVk7x+oEIH8yFJfM64mWNFbValZWlrBDwCzNnObrOj EYox5DCxWDvv4cVDwMU8pTR1y2NXZuT1lGnp83dlR5Yv0yJ9sYhDFaTGvj2pwQ9rEnhe eEzJIgNDwdJufbldl3QikIKowjwXGo48zd4TP2Fxsu3nr5k8SDbjFLQKbn04oWGMi+xZ ClfABCPmnkH1I55WieF9g8nxzSp6j0eD5IOYLhxPnQDDFC6056fwW0TbGAl126tUZdzS rgPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=PdG6fDwiLCyl8IHfrirYyXQkMfqtxO8fxTPg3c14VNg=; b=PkREhM5zmC6/0YXZBpU18KI8J/A8rubLsgoMrSTlG34TitWX+/5fjsfgHXY/4RrUKh D7dgdg4Xwwu0TgDFj398iSEpW9GvJ+gjkKMJPidipA8nN2JJ117EmiUpWZYLwe6aITTz NI8S62w4ml55qrG1DcQdcuJht0LAXoxpQqHVsbrvnGhqXUOpF6uGlsiMo4Pqm3Osl22P OR8m6iifIGb8m5FcNU7yk58dL7J6Drn+5qjCc+wfcuX9YHEfe5hYPMN+yg0Dnt3z9GVt /rSoRmv54eBI/XEVp0ieyOr0IKtGZvT4nCrF4SEv/c45MxRGPF3IaOgvRJrBnxGJh8aP 0UqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=bgQzh6jm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Mon, 10 Jun 2019 12:13:02 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHD1Kf052214; Mon, 10 Jun 2019 12:13:02 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 18/20] gpio: gpio-omap: clean up wakeup handling Date: Mon, 10 Jun 2019 20:11:01 +0300 Message-ID: <20190610171103.30903-19-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Russell King Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 36 +++++++++++++----------------------- 1 file changed, 13 insertions(+), 23 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 039bbb1ae6cb..61e32c7e6670 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -305,12 +305,6 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, bank->level_mask = bank->context.leveldetect0 | bank->context.leveldetect1; - if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { - omap_gpio_rmw(base + bank->regs->wkup_en, gpio_bit, trigger != 0); - bank->context.wake_en = - readl_relaxed(bank->base + bank->regs->wkup_en); - } - /* This part needs to be executed always for OMAP{34xx, 44xx} */ if (!bank->regs->irqctrl && !omap_gpio_is_off_wakeup_capable(bank, gpio)) { /* @@ -343,7 +337,6 @@ static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, unsigned trigger) { void __iomem *reg = bank->base; - void __iomem *base = bank->base; u32 l = 0; if (bank->regs->leveldetect0 && bank->regs->wkup_en) { @@ -375,11 +368,6 @@ static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, l |= 2 << (gpio << 1); if (trigger & IRQ_TYPE_EDGE_FALLING) l |= BIT(gpio << 1); - - /* Enable wake-up during idle for dynamic tick */ - omap_gpio_rmw(base + bank->regs->wkup_en, BIT(gpio), trigger); - bank->context.wake_en = - readl_relaxed(bank->base + bank->regs->wkup_en); writel_relaxed(l, reg); } return 0; @@ -408,17 +396,6 @@ static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset) static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) { - void __iomem *base = bank->base; - - if (bank->regs->wkup_en && - !LINE_USED(bank->mod_usage, offset) && - !LINE_USED(bank->irq_usage, offset)) { - /* Disable wake-up during idle for dynamic tick */ - omap_gpio_rmw(base + bank->regs->wkup_en, BIT(offset), 0); - bank->context.wake_en = - readl_relaxed(bank->base + bank->regs->wkup_en); - } - if (bank->regs->ctrl && !BANK_USED(bank)) { void __iomem *reg = bank->base + bank->regs->ctrl; u32 ctrl; @@ -549,6 +526,19 @@ static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, omap_gpio_rmw(reg + bank->regs->irqenable, gpio_mask, enable ^ bank->regs->irqenable_inv); } + + /* + * Program GPIO wakeup along with IRQ enable to satisfy OMAP4430 TRM + * note requiring correlation between the IRQ enable registers and + * the wakeup registers. In any case, we want wakeup from idle + * enabled for the GPIOs which support this feature. + */ + if (bank->regs->wkup_en && + (bank->regs->edgectrl1 || !(bank->non_wakeup_gpios & gpio_mask))) { + bank->context.wake_en = + omap_gpio_rmw(bank->base + bank->regs->wkup_en, + gpio_mask, enable); + } } /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ From patchwork Mon Jun 10 17:11:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 166355 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1274120ilk; Mon, 10 Jun 2019 10:13:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqzl5j6OMKlVlO9hNbIXvGjruwUSFBuSrUcsHc8os5dp+aissgF/76eRAs8mV8SSTg08mWhk X-Received: by 2002:a17:902:9a90:: with SMTP id w16mr69660270plp.113.1560186810888; Mon, 10 Jun 2019 10:13:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560186810; cv=none; d=google.com; s=arc-20160816; b=eGEsUta1cX3emb8lsNYu8mxOFX+fbK3reNyNWkOD7xsXCbOSvRcoMhQNmBnQtEQF+C oIu9VIPIbXJbQtVggz5dYdx4XvEPuJSU4SgI2vBWxHgRhgVdZ5yUqMhkXxo5TRwvY9UK A0RCriR8DQvYZMv2ZoQ9egcCMVCZSdC4ZKPX1pv9t3hUdoeOERnlOASuQukf+OMm18tq VcNsGm5z4mWcCGPtC8747awohE/N/3E3py9A4mfoqUD2Pgmcw8IwF2IOyaz+EnCWzQBd yWueAnJt8BxgF28Bra+4wCDhe1ECHORpSFB6YeTHJvvWB8uP6bsHyX92q7EO7tnHqtCT 9MHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=65y0Cnd2F217f0FjndQy2sPV2LzXGcSYmUp9Flgkgvs=; b=D+ou6BtnwsikOKsxOmsWq0POZfQHUl6kgc6XLTaGflCafL+nqOqFGsgzEL7WVSRDvX 0gQjO+K9+Cn75+ZV1gzL0s+w3fpmUSXzTPYMJbCwGGI4u/7MJ4bdCkMXW0FInTVoEcq2 4lrPwGK1jO2jxFeyzEoWBOuOeHLB+ZaltQEK4FMezFNtGJxa1hWlVJTGR02sIcc0Jh1R /HlStxvDjXI1PQx8iYNtOTD7GwsFeexo+oOWghI0shcPUNzD97q7fHUfSi2hRP7F0weq Zxo//gJLYZAUVUcaqjc/X+6fAy6ImX2BM0cfOsQ+6/9VDu8eBs8Cb61cWPL805GnG/J0 XOUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=GR8KXJRK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c127si3532378pfc.191.2019.06.10.10.13.30; Mon, 10 Jun 2019 10:13:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=GR8KXJRK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387903AbfFJRN3 (ORCPT + 30 others); Mon, 10 Jun 2019 13:13:29 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57916 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728556AbfFJRNU (ORCPT ); Mon, 10 Jun 2019 13:13:20 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5AHD9vn057230; Mon, 10 Jun 2019 12:13:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560186789; bh=65y0Cnd2F217f0FjndQy2sPV2LzXGcSYmUp9Flgkgvs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GR8KXJRKBvhp2lPNPS8xTmEhlBQuiy4e3Loyz7HTGdIJ7ybj46XcFQjkmQIzvyrhv nN3yjQZiPuu4UqRHuq56Gn78a6s15Iw1aOMYFwzkncexdyaLpou+3qwiV8MuZhZqmR QljzPb5a9l2WL9kTMmMz5RGMtlLhqBIGAjW5/k9s= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5AHD9bu014309 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jun 2019 12:13:09 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 10 Jun 2019 12:13:09 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 10 Jun 2019 12:13:08 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5AHD8UR052649; Mon, 10 Jun 2019 12:13:08 -0500 From: Grygorii Strashko To: Russell King , Linus Walleij , Tony Lindgren CC: Bartosz Golaszewski , , , , Santosh Shilimkar , Russell King , Grygorii Strashko Subject: [PATCH-next 19/20] gpio: gpio-omap: irq_startup() must not return error codes Date: Mon, 10 Jun 2019 20:11:02 +0300 Message-ID: <20190610171103.30903-20-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610171103.30903-1-grygorii.strashko@ti.com> References: <20190610171103.30903-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Russell King The irq_startup() method returns an unsigned int, but in __irq_startup() it is assigned to an int. However, nothing checks for errors, so any error that is returned is ignored. Remove the check for GPIO-input mode and the error return. Signed-off-by: Russell King Signed-off-by: Grygorii Strashko --- drivers/gpio/gpio-omap.c | 5 ----- 1 file changed, 5 deletions(-) -- 2.17.1 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 61e32c7e6670..94b10dfbff3f 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -635,8 +635,6 @@ static unsigned int omap_gpio_irq_startup(struct irq_data *d) if (!LINE_USED(bank->mod_usage, offset)) omap_set_gpio_direction(bank, offset, 1); - else if (!omap_gpio_is_input(bank, offset)) - goto err; omap_enable_gpio_module(bank, offset); bank->irq_usage |= BIT(offset); @@ -644,9 +642,6 @@ static unsigned int omap_gpio_irq_startup(struct irq_data *d) omap_gpio_unmask_irq(d); return 0; -err: - raw_spin_unlock_irqrestore(&bank->lock, flags); - return -EINVAL; } static void omap_gpio_irq_shutdown(struct irq_data *d)