From patchwork Tue Jun 11 12:25:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 166448 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2294141ilk; Tue, 11 Jun 2019 05:27:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqzYjCDWK/VpH2C3Ru0KDnAcdZCwrm8HS1E133HNAqanGlPq8LRVWrgvJbG1dJzUxe+GIZbk X-Received: by 2002:a17:90a:a09:: with SMTP id o9mr15021925pjo.95.1560256020278; Tue, 11 Jun 2019 05:27:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560256020; cv=none; d=google.com; s=arc-20160816; b=JlCrt+y0OTax04FPCHgLDCEkOJWoh6sby18AH61tx/UNron1rGqJg0HxpgNlKwQ93j q/knwGMuSIBxIXYCO+JhBIQNRgfq6LHKfcuYmx37B1tp4/EtHwnd3UaWkEAvM+cKRKsC MEVFf95PYmaJ4CwkKSLq//dNh/dDcza4SNjJ8ExUzGNoH8XlPM7b6dGnFgz20O9YnjsO gjKNbwQEsKdC2j3nmu79IPxqx5F49irR2fqXCenMLHJMrutWh/oA+DmyPiXlxf9gPBO5 v7l2owWkW+aHgbCg9svchL5VTlFrhwE3+ofH7DckIfOQxFf4MXDnAwfL+SKjVyRu1QRF fksQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Psif9qopZgVPe8dWo9XocFzMybtKO3gMouXdNYlMSBI=; b=UmbWNLTiLLe4anvNH3WQrB36+QLk9SRX0gzy5V9rXjnzZ7rf5vKiIJToXyQisefmE4 sCXs9v+7oKekBZDev4ml2FBry7E7jfW+Md84hsFJdO6MDugiqQLwFSnHyGwjnn8S0WY/ r6U+4CM79KMEK8IVSjLn7NzDfmM2nWXb91Xa1ssPPjZum8LBTASHIPHxE6Xb6vslc4H4 4KvadDzpqbMXm9s2lGOhpGuXxJIeJX33P5zCm2gs0OvcnTjQg3woc5cnd4uypAfOVADI ydBYZQR5tFu/il+IMQk3cLDL+zKoW9dqX/YR9e+J8vWuGI2OSOWNr4UXNMwOk2QAK2JJ 7mlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=R7bSMphe; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t5si12148820pgv.164.2019.06.11.05.27.00; Tue, 11 Jun 2019 05:27:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=R7bSMphe; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387789AbfFKM07 (ORCPT + 8 others); Tue, 11 Jun 2019 08:26:59 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:49093 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389325AbfFKM0C (ORCPT ); Tue, 11 Jun 2019 08:26:02 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5BCPmiL026689; Tue, 11 Jun 2019 14:25:48 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=Psif9qopZgVPe8dWo9XocFzMybtKO3gMouXdNYlMSBI=; b=R7bSMphe5F7ioVle8OyoWIwgQ41esdzxVd5DveQWEPH5ED5EjP5eY82uxHp7rpkOOT5l 7r5/oMMyr6Hp3c2qcGMnLqDVfjvQdWr0Uw9Lo+I2ZrFr5WCXZK7PiF5Be/QUviDSFheu 6ihYgdzSkjy8T3d3nSN7DtLIIyVvG4TM/ExUuts+ymydjdLPSXqBSyQJA8wyy6rYlB40 0rKeVifcFilL2511Ew4vBHGpdyOZ/kaadapV3DmWuD8Rk2l8ZanBlPsQx0qZKtixLZVQ d/cEnYoPk8WkD38q5ubi38cDOndZN0iyccY4EMwmxJqxANmg3QtRm/DglZleM7So7ZFe xw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2t26rm9vbv-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 11 Jun 2019 14:25:48 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 025DD3F; Tue, 11 Jun 2019 12:25:43 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BD8B92A2C; Tue, 11 Jun 2019 12:25:43 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:43 +0200 Received: from localhost (10.201.23.31) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:42 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" , Rob Herring , "Mark Rutland" CC: , , , , , Erwan Le Ray , "Fabrice Gasnier" , Bich Hemon Subject: [PATCH v2 02/10] dt-bindings: serial: add optional pinctrl states Date: Tue, 11 Jun 2019 14:25:22 +0200 Message-ID: <1560255930-22554-3-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560255930-22554-1-git-send-email-erwan.leray@st.com> References: <1560255930-22554-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-11_06:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Bich Hemon Add options for pinctrl states: - "sleep" for low power - "idle" for low power and wakeup capabilities enabled - "no_console_suspend" for enabling console messages in low power Signed-off-by: Bich Hemon Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt index 5ec80c1..64a5ea9 100644 --- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt +++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt @@ -13,7 +13,14 @@ Required properties: - clocks: The input clock of the USART instance Optional properties: -- pinctrl: The reference on the pins configuration +- pinctrl-names: Set to "default". An additional "sleep" state can be defined + to set pins in sleep state when in low power. In case the device is used as + a wakeup source, "idle" state is defined in order to keep RX pin active. + For a console device, an optional state "no_console_suspend" can be defined + to enable console messages during suspend. Typically, "no_console_suspend" and + "default" states can refer to the same pin configuration. +- pinctrl-n: Phandle(s) pointing to pin configuration nodes. + For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt - st,hw-flow-ctrl: bool flag to enable hardware flow control. - rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low, linux,rs485-enabled-at-boot-time: see rs485.txt. @@ -31,8 +38,11 @@ usart4: serial@40004c00 { reg = <0x40004c00 0x400>; interrupts = <52>; clocks = <&clk_pclk1>; - pinctrl-names = "default"; + pinctrl-names = "default", "sleep", "idle", "no_console_suspend"; pinctrl-0 = <&pinctrl_usart4>; + pinctrl-1 = <&pinctrl_usart4_sleep>; + pinctrl-2 = <&pinctrl_usart4_idle>; + pinctrl-3 = <&pinctrl_usart4>; }; usart2: serial@40004400 { From patchwork Tue Jun 11 12:25:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 166441 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2293136ilk; Tue, 11 Jun 2019 05:26:04 -0700 (PDT) X-Google-Smtp-Source: APXvYqwRrTzxxT6LBKMNNRsAqOj+xos+9ZcmdXzW0iRo/XF7QQURT5hWY9XeouyvVR8WN47BIbiF X-Received: by 2002:a17:902:42e2:: with SMTP id h89mr73347247pld.271.1560255964571; Tue, 11 Jun 2019 05:26:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560255964; cv=none; d=google.com; s=arc-20160816; b=sTX3kfdiuHaaa8PmRX9oMqBQ39/KKVq6vN2tJOQehQdY1lqyGvxMdOC/9yzS1RghXS nsLhlwW6gxFHkToI2iC44ynNPdvh8i+7sm5R8dI5qfadwLzD8dNDjyvFOlXjZramxIMW J0mQ3O+BlAvoCj9gpzOZM61eddoabiU8WIlz1Mb9gTS4Q5/zInMEDcUfnMLQCes7LFNY 46QeXHkmeeODYRZUAVjBfTt48Lqmax2r3xIFqah2PCWzUleMmNCB/ZD6fVDK4e/w1+9G gUg7mSISpdcl+Hjs8hY/jwUwXKZjOZDOmYcM881ys5PHzV5dxhIS9KXMO45TvEMeXzi4 OvSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=FmHn03A8qaUtRi1esvS9BOS3UdIXGQJPDIQQiyaLnGk=; b=Ag7/np2b6IRKGYMRXP6hIpty5Cuaq2RJ+xHQKQftQDGDJUoUzhzhw3R2VgwMBYuWKg P4wqapfiRhC+o4LmXyhgGmzng40WyMV85lfyjDy5MwO9qhusV1TWh8/tb8BsnnIeRuUF Oy/6pnlV1gIfrwr1pmc8qniA6h87ESwyfnDCuWw77u35/oUvZa0OmsBuk8DRk0Mztoq7 htIz9uElgUBoV1kal7aW/a3vA+7J7qvuhmSTdw4FyA+fx39LyRjlFZhw9bTHqNUZFVZ2 JHvdYISSPbVcdKa2H8AwE3Q4YrwJvtc2SCe43l2dpPpDZjG0965GX/6LiUdCpZXc405W Rp4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=PaeME3rA; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 3si12079382pgt.305.2019.06.11.05.26.04; Tue, 11 Jun 2019 05:26:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=PaeME3rA; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389611AbfFKM0D (ORCPT + 8 others); Tue, 11 Jun 2019 08:26:03 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:28930 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389614AbfFKM0C (ORCPT ); Tue, 11 Jun 2019 08:26:02 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5BCPncb026698; Tue, 11 Jun 2019 14:25:49 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=FmHn03A8qaUtRi1esvS9BOS3UdIXGQJPDIQQiyaLnGk=; b=PaeME3rA6uck19BkJk1JQu8fez0eIbvQApf8+T5dDiEa+lWoz6w6vhW/O2w3K4YQEyZi 7mKAYzuajTCC6amzN5Pa+E4ggDKf2BWPl7RjcmYlwXsVlJkYNnezR0K0baDYvelHs1z+ CHQpGbcvCxlJmeCz6WT8lYy7cDcIY4wBrPHKFEcebifsN19BIltCoq4FOtuMwKGfMnXS G0D54UG6OQ+2oAyV9A1oAx3gPYJi7K75okyNM5ydlal714v3gNqd9tvzBAQqJIyn/2Ye OblNUNX5MA+uc9nOkSg6iRsTwf3zc96b15Ap1x/nHw5/2jGwshatQ4tm/8L+GNUD9bPc cA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2t26rm9vc9-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 11 Jun 2019 14:25:49 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 606D038; Tue, 11 Jun 2019 12:25:48 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 445F32A29; Tue, 11 Jun 2019 12:25:48 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:48 +0200 Received: from localhost (10.201.23.31) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:47 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" , Rob Herring , "Mark Rutland" CC: , , , , , Erwan Le Ray , "Fabrice Gasnier" , Bich Hemon Subject: [PATCH v2 04/10] serial: stm32: add pm_runtime support Date: Tue, 11 Jun 2019 14:25:24 +0200 Message-ID: <1560255930-22554-5-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560255930-22554-1-git-send-email-erwan.leray@st.com> References: <1560255930-22554-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-11_06:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use pm_runtime for clock management. Signed-off-by: Bich Hemon Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c index 04eda75..60f3faf 100644 --- a/drivers/tty/serial/stm32-usart.c +++ b/drivers/tty/serial/stm32-usart.c @@ -809,13 +809,13 @@ static void stm32_pm(struct uart_port *port, unsigned int state, switch (state) { case UART_PM_STATE_ON: - clk_prepare_enable(stm32port->clk); + pm_runtime_get_sync(port->dev); break; case UART_PM_STATE_OFF: spin_lock_irqsave(&port->lock, flags); stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit)); spin_unlock_irqrestore(&port->lock, flags); - clk_disable_unprepare(stm32port->clk); + pm_runtime_put_sync(port->dev); break; } } @@ -1110,6 +1110,11 @@ static int stm32_serial_probe(struct platform_device *pdev) platform_set_drvdata(pdev, &stm32port->port); + pm_runtime_get_noresume(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + pm_runtime_put_sync(&pdev->dev); + return 0; err_wirq: @@ -1131,6 +1136,9 @@ static int stm32_serial_remove(struct platform_device *pdev) struct uart_port *port = platform_get_drvdata(pdev); struct stm32_port *stm32_port = to_stm32_port(port); struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; + int err; + + pm_runtime_get_sync(&pdev->dev); stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR); @@ -1159,7 +1167,12 @@ static int stm32_serial_remove(struct platform_device *pdev) clk_disable_unprepare(stm32_port->clk); - return uart_remove_one_port(&stm32_usart_driver, port); + err = uart_remove_one_port(&stm32_usart_driver, port); + + pm_runtime_disable(&pdev->dev); + pm_runtime_put_noidle(&pdev->dev); + + return err; } @@ -1316,7 +1329,29 @@ static int stm32_serial_resume(struct device *dev) } #endif /* CONFIG_PM_SLEEP */ +static int __maybe_unused stm32_serial_runtime_suspend(struct device *dev) +{ + struct uart_port *port = dev_get_drvdata(dev); + struct stm32_port *stm32port = container_of(port, + struct stm32_port, port); + + clk_disable_unprepare(stm32port->clk); + + return 0; +} + +static int __maybe_unused stm32_serial_runtime_resume(struct device *dev) +{ + struct uart_port *port = dev_get_drvdata(dev); + struct stm32_port *stm32port = container_of(port, + struct stm32_port, port); + + return clk_prepare_enable(stm32port->clk); +} + static const struct dev_pm_ops stm32_serial_pm_ops = { + SET_RUNTIME_PM_OPS(stm32_serial_runtime_suspend, + stm32_serial_runtime_resume, NULL) SET_SYSTEM_SLEEP_PM_OPS(stm32_serial_suspend, stm32_serial_resume) }; From patchwork Tue Jun 11 12:25:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 166442 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2293300ilk; Tue, 11 Jun 2019 05:26:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqy1G0gX45r4y2Brw3OTsd9fhVRaNcMIIDkxz3jd82ZyMsO/O+pfsj6jXZGWI1mr5uqDBCJc X-Received: by 2002:a62:ed0a:: with SMTP id u10mr47090940pfh.243.1560255972981; Tue, 11 Jun 2019 05:26:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560255972; cv=none; d=google.com; s=arc-20160816; b=ZnCIu33ewAElN30k1+Tt4G2QkG/V204noGBWI61ru+BmE3PMF8+MEg/Yo5k8f04fMd VdeQR200xWcxFcv+IBtGFAZodoCAs2bC19R8+IwbsY1CUS5NKJWNSryqWDMg1O42BLf8 wgeYnBwQdKiQyb3Z7RXQtzHj8VKv1w9FXY+6g5d8GDGIVP3yqdhVnZm0Kc8umaa57gc3 Ss6T10oic4h1PJsMy08T0ADzyWoc5P4izteis7R6RDEdhXtK5NrOskqOo0eIDhqtMh7J jDPvGlPGZ/ph1qoDNyRwwiyGemqndqBjC7sNed7/+T3XJlE/v2f8EZD+ychhpDte/Y6D 3pQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=7dQ+9lqtmTtedvp/b3rgO/AqPLUdhqousiUICsfwmlU=; b=vO4jSXtlWHbD8sURqUg/ernhiY0oGR6JEhfFB+zYgomOlHSbIzzNO2txSpNpEGT+zh me8TzlTL5lgaGcXWPeKdUzurVGZGdvNz/NjQU0XBcRN2+gFYsaDWEs7jH8DKtGTsWAkQ nXnd5c10JNkCYHFJVx6r5KgKuKXGj/xc8CFyNQyAT5IlUbV+Zzf+K1YZ6XV+O6+PeVMc 4pZMzwwZpj0OKc7b0vS/k6O3AqFrZWKf/MSJmDz3Bk8oW++JDnsaYxOSzN/nhi3vsRGV QMxiKfqagEkbVVPA83BG6OisFbWSIrdCjIJRk7UWM8rufW1HwKEjIx1A0sZN1tnfEFDK hlsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b="nJ+GFYS/"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b2si3643635pgm.445.2019.06.11.05.26.12; Tue, 11 Jun 2019 05:26:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b="nJ+GFYS/"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390279AbfFKM0M (ORCPT + 8 others); Tue, 11 Jun 2019 08:26:12 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:40632 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389619AbfFKM0L (ORCPT ); Tue, 11 Jun 2019 08:26:11 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5BCN3H3024849; Tue, 11 Jun 2019 14:25:56 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=7dQ+9lqtmTtedvp/b3rgO/AqPLUdhqousiUICsfwmlU=; b=nJ+GFYS/tRfQ4m0vYKMLBcQatrCLLr5lZIoY3NS4LgabDMlfXSaJ7GYJTwFnvJb1pOJS HyivsLdSo0ghbNsIPEBvKZ04JlHY1PzioQgieZzdSZYvdtFgF0JSZKJ0U3peXZnuPtwx eApQ4RwJvpm7TfJPyJrpjU8b4TS0Q8QALZ/woHhFiDMSvhtyIYKG1W90tiKL8JuCxKN8 893dWu8+ECXqtJid9hO/jqswmA0pGf3bEnOIaQsSe7FWz2EfsVbsMZtYPMd6oRt9V8RU Qv4Wdj6SZLaDB3F/OT0sR4Gdw7MmwL1isyPmU7+yrZW1Gq8QrSe510zMgT5YX9yUEYY2 2g== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2t26rjsvb9-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 11 Jun 2019 14:25:56 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E1F9434; Tue, 11 Jun 2019 12:25:55 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C87ED2A29; Tue, 11 Jun 2019 12:25:55 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:55 +0200 Received: from localhost (10.201.23.31) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:54 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" , Rob Herring , "Mark Rutland" CC: , , , , , Erwan Le Ray , "Fabrice Gasnier" , Bich Hemon Subject: [PATCH v2 07/10] ARM: dts: stm32: update uart4 pin configurations for low power Date: Tue, 11 Jun 2019 14:25:27 +0200 Message-ID: <1560255930-22554-8-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560255930-22554-1-git-send-email-erwan.leray@st.com> References: <1560255930-22554-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-11_06:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently, pinctrl states defines only one "sleep" configuration for pins, no matter the possible uart low power modes (Rx pin always kept active). Sleep pin configuration is refined for low power modes: - "sleep" (no wakeup & console suspend enabled): put pins in analog state to optimize power - "idle" (wakeup capability): keep Rx pin in alternate function - "default" state remains untouched, to be used while the UART is active or in case the no_console_suspend mode is enabled Signed-off-by: Bich Hemon Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi index 85c417d..2e1ab1b 100644 --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi @@ -599,6 +599,23 @@ bias-disable; }; }; + + uart4_idle_pins_a: uart4-idle-0 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_a: uart4-sleep-0 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; }; pinctrl_z: pin-controller-z@54004000 { From patchwork Tue Jun 11 12:25:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 166444 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2293340ilk; Tue, 11 Jun 2019 05:26:14 -0700 (PDT) X-Google-Smtp-Source: APXvYqzTGdn/azTX+Lbjsroz/53cY8qwL7xymPKX2PI0mmox3E91OvG3cKQ/XIPAPpcgb9Ljx4iQ X-Received: by 2002:a17:902:7894:: with SMTP id q20mr66971449pll.339.1560255974531; Tue, 11 Jun 2019 05:26:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560255974; cv=none; d=google.com; s=arc-20160816; b=rNup1hTdq0BjJntXqCHBBz5SQDbRSzEEjcyaDRioEQo4+A+OZtuEBJ+KxIHPxh2bxR ptsNWIFWtr10MGJl7kFJG0DSSTg8AEsOqjhJE7XsL1dGfCqBi/mEtapY7BfYTiFvTsow eIQwqx2j0QgUQxa67VavJFnsCvYgRJJiskxQE8oPKkS75kTadx+eOLgPgWPlFqjRi5sB dnWjjD2jX+27uTFFv1pQkjbmU/GOw9894+ppz/Nyau+/SxgLnsWYyyUfp2bv2Z0kzNHe jgi70qGWGTSWdmmueffSy3rC7BDnFyLIiEygakwlpVVDdzB9tgsx0pyQi2gmP7b/qNc9 sNPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=tCqCtJ+aEYgGguO+2MVvQssjCEBkv0n4pYDaflX/fgg=; b=LoGjVntlWavWYmgK2V9Ksgf4V1KKn6ehODP57DZcf9DwijLUItRf/OSLwuCyJQ3kDd To/IQo9d/VfLg+5DwbQCk+BTUCbmdXR2gzNsGgqbIgwi5gz/snFg88E3bGYP3wxgvvbg lRdG/JUQgN7kxWgqjje8LvexUg4AGBDmfeXY9K7ZXsR1o8poh3z2GOFycwy/8tuLlWRC nauBC6n45u1KKswocKk8ljyMxLk2qvAa64GSGGZrCuGLPLV5fsoPEW0ujGYnpILZx5Zk lxbjpheDs0x2BELdx16JYuHU56+zMxXlzeRpgkwZhM0S9gMXGJTlUlScHgFAUUfIAZQi wYdw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=TE+9P2l5; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Tue, 11 Jun 2019 12:25:57 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:57 +0200 Received: from localhost (10.201.23.31) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:57 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" , Rob Herring , "Mark Rutland" CC: , , , , , Erwan Le Ray , "Fabrice Gasnier" , Bich Hemon Subject: [PATCH v2 08/10] ARM: dts: stm32: Update pin states for uart4 on stm32mp157c-ed1 Date: Tue, 11 Jun 2019 14:25:28 +0200 Message-ID: <1560255930-22554-9-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560255930-22554-1-git-send-email-erwan.leray@st.com> References: <1560255930-22554-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-11_06:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Bich Hemon Add idle and no_console_suspend states to uart4 pin configuration Signed-off-by: Bich Hemon Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts index 62a8c78..34cc847 100644 --- a/arch/arm/boot/dts/stm32mp157c-ed1.dts +++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts @@ -251,8 +251,11 @@ }; &uart4 { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep", "idle", "no_console_suspend"; pinctrl-0 = <&uart4_pins_a>; + pinctrl-1 = <&uart4_sleep_pins_a>; + pinctrl-2 = <&uart4_idle_pins_a>; + pinctrl-3 = <&uart4_pins_a>; status = "okay"; }; From patchwork Tue Jun 11 12:25:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 166445 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp2293368ilk; Tue, 11 Jun 2019 05:26:16 -0700 (PDT) X-Google-Smtp-Source: APXvYqz9YCxZPXPwMwyQbTcVV7+39FfCBurt0Ok8AFTus1eVBLyH7mpHnlfbryzG1vBhrOOFga8D X-Received: by 2002:a17:90a:270f:: with SMTP id o15mr14499382pje.56.1560255976312; Tue, 11 Jun 2019 05:26:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560255976; cv=none; d=google.com; s=arc-20160816; b=fgr2qW/QvMEfiBt13taN0sWVNGP7kdD+5TnMVmNfeOcl+uU80bKcHk8DR9rDAkiMMD x7tTBYfITF0KBUHiCcJVDKMlURqV+MwDOQtjn5jpC4iLRfsYegDDYw5vVv/kCnvdSmsC kQbIZaKRuyEz/ZOETibjQtOKBhNRGlbxABZg3XVooM861PTEswgFz9z/A2BC3RDi+s7p UGlcOpPPXzuWVHD4tn3NdYg47V1be2rUnxx4AJdGYvDsUHf0qFsB35AMvCRdaxOcmjR0 CwL7igD9n99JUSBUMOp/KxR4V3bqRqaXNjnSTrHObTj+MqqVfLbxNm5JUp80py+x1Bns 7xxQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id j1si12592166pld.399.2019.06.11.05.26.16; Tue, 11 Jun 2019 05:26:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=v9LkH+zY; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390453AbfFKM0P (ORCPT + 8 others); Tue, 11 Jun 2019 08:26:15 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:12988 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390419AbfFKM0P (ORCPT ); Tue, 11 Jun 2019 08:26:15 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5BCN3H6024849; Tue, 11 Jun 2019 14:26:00 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=k3/ECH5XcUZOXRvixEpZeLk28W6/a2P91oQPfmM+on4=; b=v9LkH+zYWMkPwaJFwBGkWl81zJKP7U40/p7H0k7OMYGcmARrwkTe4DR0QHB56/ZaCbXO VdeUDbtEoJS+b+4iSv9fhS6Pc+u4gqrJCR4os6sWwf7Avvwve7OhJDC7o7qChLoyYHhf E18JRGnv6uArv5NTxre1jtDg9wlYyg+Vm2M7RXi+EKOHEQb3feMv9uC2xssbolBVwCEK btiwPhzRfOZobg59f2cUIeyXKWm/2+HdY+NznZW3CYtrCfSORjfUYCRxSWiyizw06/fs Gn7kaowV/AnLjzen4UUOgTXHuQOK5lBao87PiLceHRM72Q3YrMCpxXEtRO7Wc39lqEUl Jg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2t26rjsvbu-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 11 Jun 2019 14:26:00 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 40A5C31; Tue, 11 Jun 2019 12:26:00 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 24FC72A37; Tue, 11 Jun 2019 12:26:00 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:26:00 +0200 Received: from localhost (10.201.23.31) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 11 Jun 2019 14:25:58 +0200 From: Erwan Le Ray To: Greg Kroah-Hartman , Jiri Slaby , Maxime Coquelin , "Alexandre Torgue" , Rob Herring , "Mark Rutland" CC: , , , , , Erwan Le Ray , "Fabrice Gasnier" , Bich Hemon Subject: [PATCH v2 09/10] ARM: dts: stm32: Update UART4 pin states on stm32mp157a-dk1 Date: Tue, 11 Jun 2019 14:25:29 +0200 Message-ID: <1560255930-22554-10-git-send-email-erwan.leray@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1560255930-22554-1-git-send-email-erwan.leray@st.com> References: <1560255930-22554-1-git-send-email-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.31] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-11_06:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Bich Hemon Add idle and no_console_suspend states to uart4 pin configuration. Signed-off-by: Bich Hemon Signed-off-by: Erwan Le Ray -- 1.9.1 diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts index 098dbfb..b851f80 100644 --- a/arch/arm/boot/dts/stm32mp157a-dk1.dts +++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts @@ -244,7 +244,10 @@ }; &uart4 { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep", "idle", "no_console_suspend"; pinctrl-0 = <&uart4_pins_a>; + pinctrl-1 = <&uart4_sleep_pins_a>; + pinctrl-2 = <&uart4_idle_pins_a>; + pinctrl-3 = <&uart4_pins_a>; status = "okay"; };