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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:19 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:06 +0100 Message-Id: <20190613163917.28589-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH 01/12] target/arm: Move vfp_expand_imm() to translate.[ch] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We want to use vfp_expand_imm() in the AArch32 VFP decode; move it from the a64-only header/source file to the AArch32 one (which is always compiled even for AArch64). Signed-off-by: Peter Maydell --- target/arm/translate-a64.h | 1 - target/arm/translate.h | 7 +++++++ target/arm/translate-a64.c | 32 -------------------------------- target/arm/translate-vfp.inc.c | 33 +++++++++++++++++++++++++++++++++ 4 files changed, 40 insertions(+), 33 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate-a64.h b/target/arm/translate-a64.h index 9569bc5963d..9ab40872d85 100644 --- a/target/arm/translate-a64.h +++ b/target/arm/translate-a64.h @@ -39,7 +39,6 @@ void write_fp_dreg(DisasContext *s, int reg, TCGv_i64 v); TCGv_ptr get_fpstatus_ptr(bool); bool logic_imm_decode_wmask(uint64_t *result, unsigned int immn, unsigned int imms, unsigned int immr); -uint64_t vfp_expand_imm(int size, uint8_t imm8); bool sve_access_check(DisasContext *s); /* We should have at some point before trying to access an FP register diff --git a/target/arm/translate.h b/target/arm/translate.h index dc06dce7675..bc1617809da 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -237,6 +237,13 @@ static inline void gen_ss_advance(DisasContext *s) } } +/* + * Given a VFP floating point constant encoded into an 8 bit immediate in an + * instruction, expand it to the actual constant value of the specified + * size, as per the VFPExpandImm() pseudocode in the Arm ARM. + */ +uint64_t vfp_expand_imm(int size, uint8_t imm8); + /* Vector operations shared between ARM and AArch64. */ extern const GVecGen3 mla_op[4]; extern const GVecGen3 mls_op[4]; diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index ae739f65756..97f4164fbbc 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -6380,38 +6380,6 @@ static void disas_fp_3src(DisasContext *s, uint32_t insn) } } -/* The imm8 encodes the sign bit, enough bits to represent an exponent in - * the range 01....1xx to 10....0xx, and the most significant 4 bits of - * the mantissa; see VFPExpandImm() in the v8 ARM ARM. - */ -uint64_t vfp_expand_imm(int size, uint8_t imm8) -{ - uint64_t imm; - - switch (size) { - case MO_64: - imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) | - (extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) | - extract32(imm8, 0, 6); - imm <<= 48; - break; - case MO_32: - imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) | - (extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) | - (extract32(imm8, 0, 6) << 3); - imm <<= 16; - break; - case MO_16: - imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) | - (extract32(imm8, 6, 1) ? 0x3000 : 0x4000) | - (extract32(imm8, 0, 6) << 6); - break; - default: - g_assert_not_reached(); - } - return imm; -} - /* Floating point immediate * 31 30 29 28 24 23 22 21 20 13 12 10 9 5 4 0 * +---+---+---+-----------+------+---+------------+-------+------+------+ diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index 709fc65374d..a66084f6e36 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -30,6 +30,39 @@ #include "decode-vfp.inc.c" #include "decode-vfp-uncond.inc.c" +/* + * The imm8 encodes the sign bit, enough bits to represent an exponent in + * the range 01....1xx to 10....0xx, and the most significant 4 bits of + * the mantissa; see VFPExpandImm() in the v8 ARM ARM. + */ +uint64_t vfp_expand_imm(int size, uint8_t imm8) +{ + uint64_t imm; + + switch (size) { + case MO_64: + imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) | + (extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) | + extract32(imm8, 0, 6); + imm <<= 48; + break; + case MO_32: + imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) | + (extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) | + (extract32(imm8, 0, 6) << 3); + imm <<= 16; + break; + case MO_16: + imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) | + (extract32(imm8, 6, 1) ? 0x3000 : 0x4000) | + (extract32(imm8, 0, 6) << 6); + break; + default: + g_assert_not_reached(); + } + return imm; +} + /* * Return the offset of a 16-bit half of the specified VFP single-precision * register. If top is true, returns the top 16 bits; otherwise the bottom From patchwork Thu Jun 13 16:39:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166733 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1109253ilk; Thu, 13 Jun 2019 11:55:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqzz0YKmEstQusso6i5xVlLtmCXbk5azlCa7LBDaNTFmk4UKQ/AIpGcW91WQ/3nO04QfMUpK X-Received: by 2002:ac8:30a7:: with SMTP id v36mr55279190qta.119.1560452150687; Thu, 13 Jun 2019 11:55:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560452150; cv=none; d=google.com; s=arc-20160816; b=Xd7q0hi4CoPfvryyUCRs/tdJNiLCSIriN+gLmd/IItJcUVtGZP8mEN+P0ySagbUup/ bVCB/pAJmmqhO2biHn1wRQGRN2EPJQU7JcgXSziT2pdIv3F4+4BRSjkRv3axODM1jMtO Rp/kmZv8md5b4tPZAyiL+kRiwArH5E94XPHlrFxZhH4PcJeKV9epCJUb2QGrJZilcUdK CX13yUvVA9+/fx8fR1oWrEqB0HKPNaa3TdBRGYej6R+98dp6vLoUvdJLEjSTuj68e1Ow xvinHa/HwIjNi5uXuVW/NI0ejrByFAJ4LcyLqPainlMen+LEJCJPOBP03PatyPBrc4wy QxKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=Gokt4IdrDcmmQcCA2l5TV7aYVHlbnHYyswQ2I9MjocE=; b=Z3efMKYizaQxsvUziaRf+zxXh2+yrH9Ji8ykoR5Mj0LUScP+PgEZ2mNMY3oED+E7GG 9QDPs5Fmv+3w89Tgk0aHMACr3SMY4udNNUn6PzouJQ9DHiSDwXR6F7+1+8Mi6M36rAKx 7/k/udDG1wyLcNkcqTIIZA6NuYdmtKE9S+TlgY7F3ctMnp4Yk+CXCzmMtmJdoodF4+4p 2LGjHfslo+NTdkyKTpBPmDXsXakxUEk/IlpWDiTrpAnwcETfO8qA9LgqFeziAW71YLvi JsWn5VO8uaW8iBvyS9MkI8xifQaXjdHoF4CVwfLiEvE/zvvcA8ihP6VaXRsGKIJeQ/Fe RG9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=BL1q1qQe; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:21 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:07 +0100 Message-Id: <20190613163917.28589-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 Subject: [Qemu-devel] [PATCH 02/12] target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The AArch32 VMOV (immediate) instruction uses the same VFP encoded immediate format we already handle in vfp_expand_imm(). Use that function rather than hand-decoding it. Suggested-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/translate-vfp.inc.c | 28 ++++------------------------ target/arm/vfp.decode | 10 ++++++---- 2 files changed, 10 insertions(+), 28 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index a66084f6e36..8b732761f26 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -1842,7 +1842,7 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a) uint32_t delta_d = 0; int veclen = s->vec_len; TCGv_i32 fd; - uint32_t n, i, vd; + uint32_t vd; vd = a->vd; @@ -1869,17 +1869,7 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a) } } - n = (a->imm4h << 28) & 0x80000000; - i = ((a->imm4h << 4) & 0x70) | a->imm4l; - if (i & 0x40) { - i |= 0x780; - } else { - i |= 0x800; - } - n |= i << 19; - - fd = tcg_temp_new_i32(); - tcg_gen_movi_i32(fd, n); + fd = tcg_const_i32(vfp_expand_imm(MO_32, a->imm)); for (;;) { neon_store_reg32(fd, vd); @@ -1902,7 +1892,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a) uint32_t delta_d = 0; int veclen = s->vec_len; TCGv_i64 fd; - uint32_t n, i, vd; + uint32_t vd; vd = a->vd; @@ -1934,17 +1924,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a) } } - n = (a->imm4h << 28) & 0x80000000; - i = ((a->imm4h << 4) & 0x70) | a->imm4l; - if (i & 0x40) { - i |= 0x3f80; - } else { - i |= 0x4000; - } - n |= i << 16; - - fd = tcg_temp_new_i64(); - tcg_gen_movi_i64(fd, ((uint64_t)n) << 32); + fd = tcg_const_i64(vfp_expand_imm(MO_64, a->imm)); for (;;) { neon_store_reg64(fd, vd); diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index ea24365bb4c..a67b3f29ee5 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -44,6 +44,8 @@ %vmov_idx_b 21:1 5:2 %vmov_idx_h 21:1 6:1 +%vmov_imm 16:4 0:4 + # VMOV scalar to general-purpose register; note that this does # include some Neon cases. VMOV_to_gp ---- 1110 u:1 1. 1 .... rt:4 1011 ... 1 0000 \ @@ -152,10 +154,10 @@ VFM_sp ---- 1110 1.10 .... .... 1010 . o2:1 . 0 .... \ VFM_dp ---- 1110 1.10 .... .... 1011 . o2:1 . 0 .... \ vm=%vm_dp vn=%vn_dp vd=%vd_dp o1=2 -VMOV_imm_sp ---- 1110 1.11 imm4h:4 .... 1010 0000 imm4l:4 \ - vd=%vd_sp -VMOV_imm_dp ---- 1110 1.11 imm4h:4 .... 1011 0000 imm4l:4 \ - vd=%vd_dp +VMOV_imm_sp ---- 1110 1.11 .... .... 1010 0000 .... \ + vd=%vd_sp imm=%vmov_imm +VMOV_imm_dp ---- 1110 1.11 .... .... 1011 0000 .... \ + vd=%vd_dp imm=%vmov_imm VMOV_reg_sp ---- 1110 1.11 0000 .... 1010 01.0 .... \ vd=%vd_sp vm=%vm_sp From patchwork Thu Jun 13 16:39:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166723 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1091836ilk; Thu, 13 Jun 2019 11:35:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqwixEU4elJXmUpqIVUmChea/ZVHZ5zIuumav3WQkPDNT9hUvX7RhS03nUs1JZKw1sWlaa17 X-Received: by 2002:ac8:5407:: with SMTP id b7mr70192696qtq.48.1560450939823; Thu, 13 Jun 2019 11:35:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560450939; cv=none; d=google.com; s=arc-20160816; b=mDQOvL/y1UtXov4sdxsWL3e1pyysdUiH/Sgf5WvGhpcB7SnFvBG13w6ZeEhp0hGVif XCWZRucDrfUw1ot0EwwlCCU+99w8vHDUpm5kNrS+d8ePwjZu83pjWmUpT9bHtdX0cK9D C92luumEF8EUx7rQo4P4ZouegR/bgnZTnwSMI95EW3PH573KIfDqIppuHNUIgDYR0Lnp 40yVKuNW8AB3PkQ3f7fAo1VPoLd25R1hJWvZlJQZuj6DNpFZottz3eIQWHHNllslJ2AS HDh3a9chtZQ+UDH3FkuFtkOnftV8Mm2Nm+slOX5mYM4TWuZ7fo0z8ZAyQGATuZng3i8/ S7tw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=vi4fuS6trrxryGpXVQHQgicRuxlNLJ/gRR72lTmjq/A=; b=aDWzwdB5R1thl/0hRsA8RGq+M7qT+78gFGm21En9g20AkxP22Y42cnb9BDn8dd6aD6 bNjVhdv5QmyqGDJbRMcs08LElupt06Ii3RmF5/KVZCq/5RKv4hcorsPc05tkgpYYfgG3 dlZlRLRCe1JvxXUzDtNnS+LVS37b5DPCpuI1sBGm9OAubjEfwnDYdXKv8ERxth+uzWcN sPcorsnOQLjCO3VDfkqQsabl0ySMlWYTaxgcAXlSkrXEs11/DDqX9aKrUWI5pr8t1IDx 5mqC+dEFx/K/lBTkr5cqaaZLoFABqTZYfMUVe87/ee6PI6HC5w13f4EwXeu2Yk1qerwT pj9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=rScZ2W9Y; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:22 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:08 +0100 Message-Id: <20190613163917.28589-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH 03/12] target/arm: Stop using cpu_F0s for NEON_2RM_VABS_F X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Where Neon instructions are floating point operations, we mostly use the old VFP utility functions like gen_vfp_abs() which work on the TCG globals cpu_F0s and cpu_F1s. The Neon for-each-element loop conditionally loads the inputs into either a plain old TCG temporary for most operations or into cpu_F0s for float operations, and similarly stores back either cpu_F0s or the temporary. Switch NEON_2RM_VABS_F away from using cpu_F0s, and update neon_2rm_is_float_op() accordingly. Signed-off-by: Peter Maydell --- target/arm/translate.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index c274c8b4602..a10fded1f39 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1374,14 +1374,6 @@ static TCGv_ptr get_fpstatus_ptr(int neon) return statusptr; } -static inline void gen_vfp_abs(int dp) -{ - if (dp) - gen_helper_vfp_absd(cpu_F0d, cpu_F0d); - else - gen_helper_vfp_abss(cpu_F0s, cpu_F0s); -} - static inline void gen_vfp_neg(int dp) { if (dp) @@ -4191,8 +4183,13 @@ static const uint8_t neon_3r_sizes[] = { static int neon_2rm_is_float_op(int op) { - /* Return true if this neon 2reg-misc op is float-to-float */ - return (op == NEON_2RM_VABS_F || op == NEON_2RM_VNEG_F || + /* + * Return true if this neon 2reg-misc op is float-to-float. + * This is not a property of the operation but of our code -- + * what we are asking here is "does the code for this case in + * the Neon for-each-pass loop use cpu_F0s?". + */ + return (op == NEON_2RM_VNEG_F || (op >= NEON_2RM_VRINTN && op <= NEON_2RM_VRINTZ) || op == NEON_2RM_VRINTM || (op >= NEON_2RM_VRINTP && op <= NEON_2RM_VCVTMS) || @@ -6761,7 +6758,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) break; } case NEON_2RM_VABS_F: - gen_vfp_abs(0); + gen_helper_vfp_abss(tmp, tmp); break; case NEON_2RM_VNEG_F: gen_vfp_neg(0); From patchwork Thu Jun 13 16:39:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166724 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1096976ilk; Thu, 13 Jun 2019 11:41:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqySjPIzdix1+3xy/Dthed8fgtNStxNbOhs1gzkcXC/eHS9Xym8xbnzoKUo+25jgdqIzk2rX X-Received: by 2002:ac8:5458:: with SMTP id d24mr37809689qtq.329.1560451273164; Thu, 13 Jun 2019 11:41:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560451273; cv=none; d=google.com; s=arc-20160816; b=gaRrXvcYVi+Wzt7JKYLh+SvK17Iw8A6E5RwJMYBxf8Aho6dtwtopOZ+JwlEbs9+cDt rkxMTl8oIB7SHYrjo8VQ/FPiSQ1bJrpImSKA34qZoeUx5WpKhIwBaoWT+unYUoFH8X3t cXIfOSkw43AzM+k4QMZCtjQdf1oTKC1/Ogs+kX0jP18zuf5V2Sy1YXBCjfDr3VLLPAzq 0UnJElAg9qu9twtUPHJs9xNjv03882gtoQOODB6iSJxGlSmwoo7c7YldSRcL0kyqMHc/ +eVqY1MMYOUT7kChr9KqYWIDIneILhv3N+ekVSAYFk4pCJcUYaeRVSCJk3qWBAguwqJH MjDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=qQmS7fDlwcZP6vIBxbHDINfjc+89reFKqPWwOYK60Kw=; b=qwAzUCuzpjtilCVNWilvoQPSn/4i/Bh5R8+Ru2iyuKo2nIhIqAgK/I+D2Z33ieIFWp o4SA9hT6ywefq8/b/WnnIQj27lMagxJsxwYOu/cpM6Ha546rfwzH5s4N56S+qu6NKcMX TTIHNpymIqiRGCJRaB8U1Wngv0vYfSzXN9O6ucwFqmCHCC1T4NSvj9H9m7zxhTuHi/Pb V1w4bdM0oN/T3S19aZOJ4yz+OeleqYMSieFOCVGEew5d5Knwmli4A5ueD3ZssnHruwaC AVedN7o7WDT+A1OLfLwz8FCmSKXzSK+WapNUl7WKxBDantXIHNSjAh0Q+tkjPddnPluk LrBg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=QnQyS2gW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:23 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:09 +0100 Message-Id: <20190613163917.28589-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH 04/12] target/arm: Stop using cpu_F0s for NEON_2RM_VNEG_F X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Switch NEON_2RM_VABS_F away from using cpu_F0s. Signed-off-by: Peter Maydell --- target/arm/translate.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index a10fded1f39..a006ab498e7 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1374,14 +1374,6 @@ static TCGv_ptr get_fpstatus_ptr(int neon) return statusptr; } -static inline void gen_vfp_neg(int dp) -{ - if (dp) - gen_helper_vfp_negd(cpu_F0d, cpu_F0d); - else - gen_helper_vfp_negs(cpu_F0s, cpu_F0s); -} - #define VFP_GEN_ITOF(name) \ static inline void gen_vfp_##name(int dp, int neon) \ { \ @@ -4189,8 +4181,7 @@ static int neon_2rm_is_float_op(int op) * what we are asking here is "does the code for this case in * the Neon for-each-pass loop use cpu_F0s?". */ - return (op == NEON_2RM_VNEG_F || - (op >= NEON_2RM_VRINTN && op <= NEON_2RM_VRINTZ) || + return ((op >= NEON_2RM_VRINTN && op <= NEON_2RM_VRINTZ) || op == NEON_2RM_VRINTM || (op >= NEON_2RM_VRINTP && op <= NEON_2RM_VCVTMS) || op >= NEON_2RM_VRECPE_F); @@ -6761,7 +6752,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) gen_helper_vfp_abss(tmp, tmp); break; case NEON_2RM_VNEG_F: - gen_vfp_neg(0); + gen_helper_vfp_negs(tmp, tmp); break; case NEON_2RM_VSWP: tmp2 = neon_load_reg(rd, pass); From patchwork Thu Jun 13 16:39:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166726 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1101613ilk; Thu, 13 Jun 2019 11:46:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqycAXIEtS0j4t2sm4LClexRLtnOX0/Bt0Cx81hxli1YkHuqmktOfm0I3lZ3r9MTNNEnr3ZT X-Received: by 2002:ae9:f303:: with SMTP id p3mr6900056qkg.320.1560451594840; Thu, 13 Jun 2019 11:46:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560451594; cv=none; d=google.com; s=arc-20160816; b=LxmoIEbV3kxMudl6/w1ggFKGmQ8zv7EVQuAXJsrcmB4lp2vmIoTcDDCyWqUJGpdM8R DUGJioBIucdA5D7iFmlFNV6uqg1jjZdj/z9oC1CrQHccAkjvDZfQMlKgkCvj+9uHMDWN yMzTUVmRZEX0pPuVugox9ZhetWqL84oKP7GVJKeZL0VfDZG0qjOZnLP1bK1+iZGTIY31 xUrynnNXHhQfGpv50tqwM7E8Y0/ysRldQQYJn2bJPtiI5cqYUQ+lra5ZPoELFSJn8jsB JGIY9xP7r/6hzCIKnQhXu7HZ2M5HP17ZnLiE+Ngc5PQYPD9kfEyOPzbOGmWw+2OuFV9b MEWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=/Qc/nXAc+oP8/OzVscPUxXsnQcb6vVHyqhqGzT5AlQo=; b=ilsOlZni/tT5Tb487+fY+2WPJuj9M04Z2hPxr6Ifz2TxmS9Riz1HOOsPeXhXGjha3R twCDRRrVGAvA+n5ljQzyCD+XfZyO0TXiVbreagg+2vm8ID/PIbZ+EBwBAd9gLu4K5/iq m/xsz5eSzPwEzvht1dpn3k+rtmRa/PIusVFpR52naxFUN8mgoucV3YTJFw1y/thx3IQT dFzny+UrX2Xv+BfLoPzi+b13MaDLqDz4n9NbmSZPYHH+dkRt0YPd7AZ7eUneIFhV/4TL KYBE2xRQ+ja6BQnJbk5FCkpoh3YCO9cFWYR+2YuJODKibz/yBRXACvLMp8rJJjxX7w2C urqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qewI2yiu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:24 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:10 +0100 Message-Id: <20190613163917.28589-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 Subject: [Qemu-devel] [PATCH 05/12] target/arm: Stop using cpu_F0s for NEON_2RM_VRINT* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Switch NEON_2RM_VRINT* away from using cpu_F0s. Signed-off-by: Peter Maydell --- target/arm/translate.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index a006ab498e7..243dbee8357 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4181,9 +4181,7 @@ static int neon_2rm_is_float_op(int op) * what we are asking here is "does the code for this case in * the Neon for-each-pass loop use cpu_F0s?". */ - return ((op >= NEON_2RM_VRINTN && op <= NEON_2RM_VRINTZ) || - op == NEON_2RM_VRINTM || - (op >= NEON_2RM_VRINTP && op <= NEON_2RM_VCVTMS) || + return ((op >= NEON_2RM_VCVTAU && op <= NEON_2RM_VCVTMS) || op >= NEON_2RM_VRECPE_F); } @@ -6786,7 +6784,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode)); gen_helper_set_neon_rmode(tcg_rmode, tcg_rmode, cpu_env); - gen_helper_rints(cpu_F0s, cpu_F0s, fpstatus); + gen_helper_rints(tmp, tmp, fpstatus); gen_helper_set_neon_rmode(tcg_rmode, tcg_rmode, cpu_env); tcg_temp_free_ptr(fpstatus); @@ -6796,7 +6794,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) case NEON_2RM_VRINTX: { TCGv_ptr fpstatus = get_fpstatus_ptr(1); - gen_helper_rints_exact(cpu_F0s, cpu_F0s, fpstatus); + gen_helper_rints_exact(tmp, tmp, fpstatus); tcg_temp_free_ptr(fpstatus); break; } From patchwork Thu Jun 13 16:39:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166727 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1102485ilk; Thu, 13 Jun 2019 11:47:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqwjGljLPAj3v7Htn1/FN3LJHMWHsaB5jNSAo099mKSvAe+mo6PVJPtOFHgd4aZU68flcabv X-Received: by 2002:a37:a9c3:: with SMTP id s186mr20931050qke.190.1560451654038; Thu, 13 Jun 2019 11:47:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560451654; cv=none; d=google.com; s=arc-20160816; b=l00XnLyxYz2uc2hQ0aoUi0y+mKqWUnzbRAlv2RB5kWHOZ6twq4pcIK18L6TtJAtkpU zRNPTZTiUF+v4JC8kEy+/z5mY8IiAbNRNeYjuCEoOFnpBnPFtT66kUiaAE9GGtCVh8k7 YMIP5UBTVRgZAlGMdafBRRm2e0v34snzXcM4PW64t4D64ZEusW478XrZDC9WGUSsa8Ed t4UK3KoeOZfyv30ovdGqwLW2Eed9xYxuL94EKbSBOv1c75Nx1LVX+5t59O1Pw5bLAl5F FjwUjYnYKZLHLXBUIFdLcfTJipBIUWAtaGGc4nIB12s8LpuUuh1/LxfY0KhEzVdotFG9 F7+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=rimcTwT3jseYgOecETEoK3gV+MP4oaaAWnNA90CS1sc=; b=ZZRX8hnOkuEVQYSr+3chT72nPDeIQKDmXNlUB1b1u45BMk8Ngh78xDazLBTYKWSx5H ujwPZk0j/xyb0QANrqh+/DyL/fJhi+vYc2K3VQ1hR/hQDeU3M6I+8uzssJ68CgWIUOek 7AkBDJQKjO1iEb4/mP7YJtQY1J4jStVgHvAbJ1WeYTuEaeOH38tYXYRAfdHTbLiWsHxy AVIzND3B+YVUi7ui7B3cqZcZjPDG7DkN3KpvptpryRD3Xmb2JKv5ho33MgAM0vYGYKdn Y5e5qfeks4AvxQGZmcl/xqR87lQJqp0kqJILENN3SVayUk7CLxasysh9F7W5oC9i862O y8MA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="WUC/NR/r"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:25 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:11 +0100 Message-Id: <20190613163917.28589-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH 06/12] target/arm: Stop using cpu_F0s for NEON_2RM_VCVT[ANPM][US] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Stop using cpu_F0s for the NEON_2RM_VCVT[ANPM][US] ops. Signed-off-by: Peter Maydell --- target/arm/translate.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index 243dbee8357..124045a9ef6 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4181,8 +4181,7 @@ static int neon_2rm_is_float_op(int op) * what we are asking here is "does the code for this case in * the Neon for-each-pass loop use cpu_F0s?". */ - return ((op >= NEON_2RM_VCVTAU && op <= NEON_2RM_VCVTMS) || - op >= NEON_2RM_VRECPE_F); + return op >= NEON_2RM_VRECPE_F; } static bool neon_2rm_is_v8_op(int op) @@ -6818,10 +6817,10 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) cpu_env); if (is_signed) { - gen_helper_vfp_tosls(cpu_F0s, cpu_F0s, + gen_helper_vfp_tosls(tmp, tmp, tcg_shift, fpst); } else { - gen_helper_vfp_touls(cpu_F0s, cpu_F0s, + gen_helper_vfp_touls(tmp, tmp, tcg_shift, fpst); } From patchwork Thu Jun 13 16:39:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166725 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1099120ilk; Thu, 13 Jun 2019 11:43:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqzOLTR5qjz+gbRb0EQD1eCYzEofvEpti4TKGvHNacwCf151PEljkq/EAITaRle9YOs6ysmo X-Received: by 2002:ac8:2646:: with SMTP id v6mr56934050qtv.205.1560451419143; Thu, 13 Jun 2019 11:43:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560451419; cv=none; d=google.com; s=arc-20160816; b=LiqHCUvDFnEDVZ2oFvKBtDEnp3BbejgQd+6RdUmwV8zuZajfmBP0WCc0fd34e1Jmdk kONyNgv7B4oNmqJsa60GtKadtYkTWZi3DS1jXWw1hJXWC5Gsi369D1ZzlL2G0+ZHvTWu i3/gt3tBC1Von/83uy5NtJVFfQ9c0ty3/WJX2xeBWDUDg+62tEt0Ua3ltu9mvJxpk70E 4HVG8SjSvST/lXAzwyGTA7/rIRJjPkzO3it9YmOWPN2O3wr//aNk0i3rOejhzt1FZBTE EIJ1je0tQB0qtj7ALCRTxJ9YEusgL+kZ9J3b8OjrdNnUKHb5BFKG26jnTMglPYeXmslM MQrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=m4A8CkEbvWMmQVuN+nzRQmfo8pG9vjNNLIpgsnrjjCE=; b=U5M6+ilsDyFUFzhAj/nPqhwXrL5zaOZbgfCgc90r3zvCtAKmG9kXluYakXHLIsEZms tP02VLfEldWvTk+SzzBXdXL6zOZcLt5JTN/us3jVafokezdFaWsP3JWzZcVyS0oYwWGi kCr64TZ9JbzsxuODHwR4Py+mevRjIjc1gMaoU7oKDVhSpJPCv4WHU2jdxyIFX7AAXKg8 5nffcMUIjgT0zMO40tR/nEVa4TOEbImVCSSBbOcx2W6uz7NHDcbZg9xW26fW2NP1IRps tTT/CHndyYceM56Fsx8T9FrZfygoQWw00mMoAH8dpDfjZeeQMXBBPR4U4jJt/rnIznzv lPIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Rze6OFIp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:26 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:12 +0100 Message-Id: <20190613163917.28589-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH 07/12] target/arm: Stop using cpu_F0s for NEON_2RM_VRECPE_F and NEON_2RM_VRSQRTE_F X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Stop using cpu_F0s for NEON_2RM_VRECPE_F and NEON_2RM_VRSQRTE_F. Signed-off-by: Peter Maydell --- target/arm/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index 124045a9ef6..75ed7cc7cb0 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4181,7 +4181,7 @@ static int neon_2rm_is_float_op(int op) * what we are asking here is "does the code for this case in * the Neon for-each-pass loop use cpu_F0s?". */ - return op >= NEON_2RM_VRECPE_F; + return op >= NEON_2RM_VCVT_FS; } static bool neon_2rm_is_v8_op(int op) @@ -6848,14 +6848,14 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) case NEON_2RM_VRECPE_F: { TCGv_ptr fpstatus = get_fpstatus_ptr(1); - gen_helper_recpe_f32(cpu_F0s, cpu_F0s, fpstatus); + gen_helper_recpe_f32(tmp, tmp, fpstatus); tcg_temp_free_ptr(fpstatus); break; } case NEON_2RM_VRSQRTE_F: { TCGv_ptr fpstatus = get_fpstatus_ptr(1); - gen_helper_rsqrte_f32(cpu_F0s, cpu_F0s, fpstatus); + gen_helper_rsqrte_f32(tmp, tmp, fpstatus); tcg_temp_free_ptr(fpstatus); break; } From patchwork Thu Jun 13 16:39:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166719 Delivered-To: patch@linaro.org Received: by 2002:ac9:2a84:0:0:0:0:0 with SMTP id p4csp929636oca; Thu, 13 Jun 2019 10:25:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqzKq5oMeBrGPX/sT7/WPpSrmGPBvddgfd43mEMxh2embvKG8xEpN1oKosxq+t+7HS1zjM9H X-Received: by 2002:a67:c797:: with SMTP id t23mr45171056vsk.209.1560446740845; Thu, 13 Jun 2019 10:25:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560446740; cv=none; d=google.com; s=arc-20160816; b=hdGQBKllbp7G8D/L3RhqCmYWwjOvSiNcygMn3EtbIc/Y/ZM2Wk+mEHVyt1jRJDLQNh a8LbOWC//Iq3n+bD9PA/2Bcz0SEuojJyuuqIuiSF5GkCs/KNeZNHwYamnZ6P+vLXv2/K Cnwcuk+R+z3EU6gXzi7Rr/MXXRw8fvGv+w/LFh+NvpcoZFixgaeCRhja+lG/Z8ScNQB8 oi/qEVOKiRdOytq9Y6wzpmZG1YeMWPjbBUsx/Cu51iGulTPuxhRfRfREr3BUfjLlDm/c toreSJhXDRmJyV+Sf+U5FWE9gXcgG2OcpaAGcvNI0cf5mLw6nT6y1QImJwfqr0F1frsf 1RIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=xAUvL5wIPadt+AYk5xwuFzGHjAUkyNHEmTy0Nk+EXUw=; b=DC/+duhx0NBoS86hhLUoLpj3YlXmTEMKzcWrCzw28hqx/jaLB9E+6DLd9eGLXETKoa UxA0+SceRD3XD0fWYQ+Zx2QB/DA2OJYwnGJ8zdWwhuIwIyAWapfmacrIrP6xojMgRuY0 mkAgDlKUvQIBnHyR0+jdy1820xbNEZIUFmCW5M8ewoIfLHn2eVQNqcyBgee/yKLST1gM m0sV5RXoKj0uDeseQSKaGz9xwEXhbNEuKNUCSxFArJHAcumh/mNHw0qLOXB5GoN6HBDH 67bI4F9nX6ht1PuulRHIsWPwU2aVtoKdLz4CFfa0MB2wieMI1NngS4CRy1Da0TIvtcfU wOlw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ZLswgCKy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:27 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:13 +0100 Message-Id: <20190613163917.28589-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH 08/12] target/arm: Stop using cpu_F0s for Neon f32/s32 VCVT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Stop using cpu_F0s for the Neon f32/s32 VCVT operations. Since this is the last user of cpu_F0s in the Neon 2rm-op loop, we can remove the handling code for it too. Signed-off-by: Peter Maydell --- target/arm/translate.c | 82 ++++++++++++------------------------------ 1 file changed, 22 insertions(+), 60 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index 75ed7cc7cb0..0fb94b777bf 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1374,38 +1374,6 @@ static TCGv_ptr get_fpstatus_ptr(int neon) return statusptr; } -#define VFP_GEN_ITOF(name) \ -static inline void gen_vfp_##name(int dp, int neon) \ -{ \ - TCGv_ptr statusptr = get_fpstatus_ptr(neon); \ - if (dp) { \ - gen_helper_vfp_##name##d(cpu_F0d, cpu_F0s, statusptr); \ - } else { \ - gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, statusptr); \ - } \ - tcg_temp_free_ptr(statusptr); \ -} - -VFP_GEN_ITOF(uito) -VFP_GEN_ITOF(sito) -#undef VFP_GEN_ITOF - -#define VFP_GEN_FTOI(name) \ -static inline void gen_vfp_##name(int dp, int neon) \ -{ \ - TCGv_ptr statusptr = get_fpstatus_ptr(neon); \ - if (dp) { \ - gen_helper_vfp_##name##d(cpu_F0s, cpu_F0d, statusptr); \ - } else { \ - gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, statusptr); \ - } \ - tcg_temp_free_ptr(statusptr); \ -} - -VFP_GEN_FTOI(touiz) -VFP_GEN_FTOI(tosiz) -#undef VFP_GEN_FTOI - #define VFP_GEN_FIX(name, round) \ static inline void gen_vfp_##name(int dp, int shift, int neon) \ { \ @@ -4173,17 +4141,6 @@ static const uint8_t neon_3r_sizes[] = { #define NEON_2RM_VCVT_SF 62 #define NEON_2RM_VCVT_UF 63 -static int neon_2rm_is_float_op(int op) -{ - /* - * Return true if this neon 2reg-misc op is float-to-float. - * This is not a property of the operation but of our code -- - * what we are asking here is "does the code for this case in - * the Neon for-each-pass loop use cpu_F0s?". - */ - return op >= NEON_2RM_VCVT_FS; -} - static bool neon_2rm_is_v8_op(int op) { /* Return true if this neon 2reg-misc op is ARMv8 and up */ @@ -6599,13 +6556,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) default: elementwise: for (pass = 0; pass < (q ? 4 : 2); pass++) { - if (neon_2rm_is_float_op(op)) { - tcg_gen_ld_f32(cpu_F0s, cpu_env, - neon_reg_offset(rm, pass)); - tmp = NULL; - } else { - tmp = neon_load_reg(rm, pass); - } + tmp = neon_load_reg(rm, pass); switch (op) { case NEON_2RM_VREV32: switch (size) { @@ -6860,29 +6811,40 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) break; } case NEON_2RM_VCVT_FS: /* VCVT.F32.S32 */ - gen_vfp_sito(0, 1); + { + TCGv_ptr fpstatus = get_fpstatus_ptr(1); + gen_helper_vfp_sitos(tmp, tmp, fpstatus); + tcg_temp_free_ptr(fpstatus); break; + } case NEON_2RM_VCVT_FU: /* VCVT.F32.U32 */ - gen_vfp_uito(0, 1); + { + TCGv_ptr fpstatus = get_fpstatus_ptr(1); + gen_helper_vfp_uitos(tmp, tmp, fpstatus); + tcg_temp_free_ptr(fpstatus); break; + } case NEON_2RM_VCVT_SF: /* VCVT.S32.F32 */ - gen_vfp_tosiz(0, 1); + { + TCGv_ptr fpstatus = get_fpstatus_ptr(1); + gen_helper_vfp_tosizs(tmp, tmp, fpstatus); + tcg_temp_free_ptr(fpstatus); break; + } case NEON_2RM_VCVT_UF: /* VCVT.U32.F32 */ - gen_vfp_touiz(0, 1); + { + TCGv_ptr fpstatus = get_fpstatus_ptr(1); + gen_helper_vfp_touizs(tmp, tmp, fpstatus); + tcg_temp_free_ptr(fpstatus); break; + } default: /* Reserved op values were caught by the * neon_2rm_sizes[] check earlier. */ abort(); } - if (neon_2rm_is_float_op(op)) { - tcg_gen_st_f32(cpu_F0s, cpu_env, - neon_reg_offset(rd, pass)); - } else { - neon_store_reg(rd, pass, tmp); - } + neon_store_reg(rd, pass, tmp); } break; } From patchwork Thu Jun 13 16:39:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166728 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1103281ilk; Thu, 13 Jun 2019 11:48:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqxV/9UfWg/eLTWTSZgyx3/edayzf/bX3y0E3KOwFtJ0j9B01nZ548Wa/JX7D6Bn9MrVIFtg X-Received: by 2002:ac8:275a:: with SMTP id h26mr57741539qth.345.1560451711231; Thu, 13 Jun 2019 11:48:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560451711; cv=none; d=google.com; s=arc-20160816; b=lHgD7Oh9WRgJWb40bTIGigGxya05Gr8UxDqQhbOqC1gZyTL7jJak3fBVW7aqLdlq4O vHDtCy4s2sD3Lxr/+m02y/VQYTwZa20UYruTxNgvKEvkaT/a6pxsGry5hXbW6tICT37D ZAtmOGRH/2e+yqRRF9h1UgHp+b4Lzamp6jALD9q/eW6QI9lXsVNEBWM+fHuT3T4Ai+SJ 6WYkFFdiYOssehyYqmrS41T7ZRTZPpMbwNlRUSF3gfoRUlE/+RN6m+qdlxYLb3YputWM T6jHROOuS9TV/CYCwofdGa3IW3IroYZyRIx9m5zYeyft8YTWLHhbhF4NKV/xp5xn9r/M 3ijQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=XGJE4iIoyDN2tN+sycnvDF5WRUBy3je+PRFryiYL8bY=; b=cTefFK85dNOCNdIA5Sp2Zh8ddgGFuxKfjUfhhTsCBOwzl198Ygd1lA5PYgEZFM5qcx vO36Lxtbw/WG0A1aHEuku96bIyYgTCxuZimYGeomcCfl5nm9qwh05dtpgurt+ECMsx43 UVWO7ZLmqcZ000uQsvoLrPj8TuNbXNZ+0uF27qJfUhRav7ivTZiFFMr9UGlK07eF7VuK eobO70GRg5H36qr6vWFGxq/8ICMeyeyOtoLeu89jn5eol+VFmGHi400/g0/m7x6FHqtN 5d3Bx/gK5uSQ9mTjL62KS/YdqVUpLA7PBDmQ7Uus3FBgI0MGcZgvz9X7pyWmVMnaFnM1 0xSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=JyIH9wNg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:28 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:14 +0100 Message-Id: <20190613163917.28589-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH 09/12] target/arm: Stop using cpu_F0s in Neon VCVT fixed-point ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Stop using cpu_F0s in the Neon VCVT fixed-point operations. Signed-off-by: Peter Maydell --- target/arm/translate.c | 62 +++++++++++++++++++----------------------- 1 file changed, 28 insertions(+), 34 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index 0fb94b777bf..d8b46130d42 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -80,6 +80,8 @@ static const char * const regnames[] = /* Function prototypes for gen_ functions calling Neon helpers. */ typedef void NeonGenThreeOpEnvFn(TCGv_i32, TCGv_env, TCGv_i32, TCGv_i32, TCGv_i32); +/* Function prototypes for gen_ functions for fix point conversions */ +typedef void VFPGenFixPointFn(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_ptr); /* initialize TCG globals. */ void arm_translate_init(void) @@ -1374,27 +1376,6 @@ static TCGv_ptr get_fpstatus_ptr(int neon) return statusptr; } -#define VFP_GEN_FIX(name, round) \ -static inline void gen_vfp_##name(int dp, int shift, int neon) \ -{ \ - TCGv_i32 tmp_shift = tcg_const_i32(shift); \ - TCGv_ptr statusptr = get_fpstatus_ptr(neon); \ - if (dp) { \ - gen_helper_vfp_##name##d##round(cpu_F0d, cpu_F0d, tmp_shift, \ - statusptr); \ - } else { \ - gen_helper_vfp_##name##s##round(cpu_F0s, cpu_F0s, tmp_shift, \ - statusptr); \ - } \ - tcg_temp_free_i32(tmp_shift); \ - tcg_temp_free_ptr(statusptr); \ -} -VFP_GEN_FIX(tosl, _round_to_zero) -VFP_GEN_FIX(toul, _round_to_zero) -VFP_GEN_FIX(slto, ) -VFP_GEN_FIX(ulto, ) -#undef VFP_GEN_FIX - static inline long vfp_reg_offset(bool dp, unsigned reg) { if (dp) { @@ -5721,28 +5702,41 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) } } else if (op >= 14) { /* VCVT fixed-point. */ + TCGv_ptr fpst; + TCGv_i32 shiftv; + VFPGenFixPointFn *fn; + if (!(insn & (1 << 21)) || (q && ((rd | rm) & 1))) { return 1; } + + if (!(op & 1)) { + if (u) { + fn = gen_helper_vfp_ultos; + } else { + fn = gen_helper_vfp_sltos; + } + } else { + if (u) { + fn = gen_helper_vfp_touls_round_to_zero; + } else { + fn = gen_helper_vfp_tosls_round_to_zero; + } + } + /* We have already masked out the must-be-1 top bit of imm6, * hence this 32-shift where the ARM ARM has 64-imm6. */ shift = 32 - shift; + fpst = get_fpstatus_ptr(1); + shiftv = tcg_const_i32(shift); for (pass = 0; pass < (q ? 4 : 2); pass++) { - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, pass)); - if (!(op & 1)) { - if (u) - gen_vfp_ulto(0, shift, 1); - else - gen_vfp_slto(0, shift, 1); - } else { - if (u) - gen_vfp_toul(0, shift, 1); - else - gen_vfp_tosl(0, shift, 1); - } - tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, pass)); + TCGv_i32 tmpf = neon_load_reg(rm, pass); + fn(tmpf, tmpf, shiftv, fpst); + neon_store_reg(rd, pass, tmpf); } + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(shiftv); } else { return 1; } From patchwork Thu Jun 13 16:39:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166732 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1108757ilk; Thu, 13 Jun 2019 11:55:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqyO+9ESzW22JY2jrAciy9uNTqp5e9nvZM6vQqG/Kl9/hTUUbBcrcfqVa6DY60GjGGzov3s6 X-Received: by 2002:ae9:c10c:: with SMTP id z12mr19189640qki.110.1560452115292; Thu, 13 Jun 2019 11:55:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560452115; cv=none; d=google.com; s=arc-20160816; b=Ro0ZAm/OfICOdiDgDCWU6dOOAoBnOHTGuOHaskTkZhkc3AmNHX/3y2+HeCwl3GdF6t 5VHEQvF6kshhJGL8SQS/CYoM9L3QukzcCHnnd8/UImZSCVDxS4uTCSncgHag21HeKo2P VphP9aucZo0KHARi+LXBny4gFMDGH24MkSGH0l5mj/CfJE2KqTDDVZV6swTReqKnUviN kgf2VHYXsLvA75FBEyaB7ART2A+fSdzaKA1lRRgiJugH+Egi7FsWBc+O0JI7xI0Q95pY zCMC3Cno5UFYoZzvx6VF5+mwo1G//EFnt03DS+GbVr5gQlDkuBOS+XoUKHdcG6ZnZGCr 3v6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=XS2MzO+cZz80eCqH3YLxLgykyR6csa7kzG0bgwV0MQs=; b=dAQlRx8Nrx5NGEuP0ZCPUeI699PjVs1KkKrTAaNVntiZhkGDenFVfabpVkT+f3YBxB Ji9MJJciMfe6vY4CcSKE3Ks/yPQjcvqsVRncNMsff22QN3Ncnn6JkfaEkUTez7Uw7V/n 9Odz969o+rKnIy20iYuNiYCfoJ4z8MNXTX3OilCMv/FEVCpXZ0yAIIGAHg7679vDc+l1 41hAbIFvHQOvyPRrNZQuG8FdvJrR/rBUqrA7tY7PQX9JN/IOICPqCG2DQuLdMdxv2U1x WuzU8SucQdmKgkofx2yQff1yx/GXBLJdsKHlYapZd8rievwSmNhNqmGnK0aVaq3kOtW0 2yVQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jDC2C3uc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:29 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:15 +0100 Message-Id: <20190613163917.28589-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 Subject: [Qemu-devel] [PATCH 10/12] target/arm: stop using deprecated functions in NEON_2RM_VCVT_F16_F32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Remove some old constructs from NEON_2RM_VCVT_F16_F32 code: * don't use cpu_F0s * don't use tcg_gen_ld_f32 Signed-off-by: Peter Maydell --- target/arm/translate.c | 27 ++++++++++++--------------- 1 file changed, 12 insertions(+), 15 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index d8b46130d42..2ba620ac1e1 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1542,7 +1542,6 @@ static TCGv_ptr vfp_reg_ptr(bool dp, int reg) return ret; } -#define tcg_gen_ld_f32 tcg_gen_ld_i32 #define tcg_gen_st_f32 tcg_gen_st_i32 #define ARM_CP_RW_BIT (1 << 20) @@ -6425,25 +6424,23 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) q || (rm & 1)) { return 1; } - tmp = tcg_temp_new_i32(); - tmp2 = tcg_temp_new_i32(); fpst = get_fpstatus_ptr(true); ahp = get_ahp_flag(); - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, 0)); - gen_helper_vfp_fcvt_f32_to_f16(tmp, cpu_F0s, fpst, ahp); - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, 1)); - gen_helper_vfp_fcvt_f32_to_f16(tmp2, cpu_F0s, fpst, ahp); + tmp = neon_load_reg(rm, 0); + gen_helper_vfp_fcvt_f32_to_f16(tmp, tmp, fpst, ahp); + tmp2 = neon_load_reg(rm, 1); + gen_helper_vfp_fcvt_f32_to_f16(tmp2, tmp2, fpst, ahp); tcg_gen_shli_i32(tmp2, tmp2, 16); tcg_gen_or_i32(tmp2, tmp2, tmp); - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, 2)); - gen_helper_vfp_fcvt_f32_to_f16(tmp, cpu_F0s, fpst, ahp); - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, 3)); + tcg_temp_free_i32(tmp); + tmp = neon_load_reg(rm, 2); + gen_helper_vfp_fcvt_f32_to_f16(tmp, tmp, fpst, ahp); + tmp3 = neon_load_reg(rm, 3); neon_store_reg(rd, 0, tmp2); - tmp2 = tcg_temp_new_i32(); - gen_helper_vfp_fcvt_f32_to_f16(tmp2, cpu_F0s, fpst, ahp); - tcg_gen_shli_i32(tmp2, tmp2, 16); - tcg_gen_or_i32(tmp2, tmp2, tmp); - neon_store_reg(rd, 1, tmp2); + gen_helper_vfp_fcvt_f32_to_f16(tmp3, tmp3, fpst, ahp); + tcg_gen_shli_i32(tmp3, tmp3, 16); + tcg_gen_or_i32(tmp3, tmp3, tmp); + neon_store_reg(rd, 1, tmp3); tcg_temp_free_i32(tmp); tcg_temp_free_i32(ahp); tcg_temp_free_ptr(fpst); From patchwork Thu Jun 13 16:39:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166731 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1107549ilk; Thu, 13 Jun 2019 11:53:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqzhrLY4KbLPMymBh3/GM+dmguJlrK7ITP/7wor60lpjH8mp1IKBuneiygAhLtwRQ1i7GZh7 X-Received: by 2002:ac8:828:: with SMTP id u37mr20010557qth.96.1560452030830; Thu, 13 Jun 2019 11:53:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560452030; cv=none; d=google.com; s=arc-20160816; b=gUUr8Det8GENsSNDm4tJc3/gkQzaGrjPtrrHaBuHcLTjXJ4Hz/SRiQKbakm/BX/Eik GjNUG6D/QviUXpf447EGmRhUmBeBKtExUMTzJgBHvslacpbPU7SLo+sUAYfdhMq1jCMk gYXmgGKU64qvyNqf8NVLN8YHxcKU0g6h+XB4Ow+zUuXri0I5ZzTyyLOys4h/Ks937O4h /93LJpbs3kZ/UuQreiSWsoufHZVb5L3B0Apbw5G0H8vmwDJwjsJKTp4TGpPX6DmK2iw7 o3QCtHvrZbO0NjTG+QwP1xshDz1emN0Q7CUzWzS+PSDSUgYs6ifKdNr5xuv0AWG/77vX XTTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=GypQohw7qsarAznVOv5kE9/Dbn/Co/pX/VNOWPFpp1I=; b=gF+++VwtdWyLzKpmNTcsW/rTqSzzZTB4mJX7Y0gssy+V+favaOc8ScuqCGZx7vjzVj fbu/Tf/FLEQnHyW88CjpTCIU9S8b6INx4KQuTcqA6vwrT9NQuTJELSNhXjzGQH5moN2Q VMyZrhizpAKtN5YORBXZPc+o7wRDHhikNbSPbtfCnF3HKWfHynF47i9xXfzZuLzpb+Kj BVJoecCl0b/5b/SKdPmSG//7NyY7QwC+D1JxhSqhE3fWuaDGoC7U0RjhWcygFg6F87dP l/V6mqFIGp5qs2WSdp0VT6hsLkbohzLq6MIV6uGTUVVCyDRSQoVQVN7tiCLEITZ4b3Iq 9HSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=sGwPa0qY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:30 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:16 +0100 Message-Id: <20190613163917.28589-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH 11/12] target/arm: Stop using deprecated functions in NEON_2RM_VCVT_F32_F16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Remove some old constructns from NEON_2RM_VCVT_F16_F32 code: * don't use CPU_F0s * don't use tcg_gen_st_f32 Signed-off-by: Peter Maydell --- target/arm/translate.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index 2ba620ac1e1..8f124a953b6 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1542,8 +1542,6 @@ static TCGv_ptr vfp_reg_ptr(bool dp, int reg) return ret; } -#define tcg_gen_st_f32 tcg_gen_st_i32 - #define ARM_CP_RW_BIT (1 << 20) /* Include the VFP decoder */ @@ -6460,20 +6458,18 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tmp = neon_load_reg(rm, 0); tmp2 = neon_load_reg(rm, 1); tcg_gen_ext16u_i32(tmp3, tmp); - gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp3, fpst, ahp); - tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 0)); - tcg_gen_shri_i32(tmp3, tmp, 16); - gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp3, fpst, ahp); - tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 1)); - tcg_temp_free_i32(tmp); + gen_helper_vfp_fcvt_f16_to_f32(tmp3, tmp3, fpst, ahp); + neon_store_reg(rd, 0, tmp3); + tcg_gen_shri_i32(tmp, tmp, 16); + gen_helper_vfp_fcvt_f16_to_f32(tmp, tmp, fpst, ahp); + neon_store_reg(rd, 1, tmp); + tmp3 = tcg_temp_new_i32(); tcg_gen_ext16u_i32(tmp3, tmp2); - gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp3, fpst, ahp); - tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 2)); - tcg_gen_shri_i32(tmp3, tmp2, 16); - gen_helper_vfp_fcvt_f16_to_f32(cpu_F0s, tmp3, fpst, ahp); - tcg_gen_st_f32(cpu_F0s, cpu_env, neon_reg_offset(rd, 3)); - tcg_temp_free_i32(tmp2); - tcg_temp_free_i32(tmp3); + gen_helper_vfp_fcvt_f16_to_f32(tmp3, tmp3, fpst, ahp); + neon_store_reg(rd, 2, tmp3); + tcg_gen_shri_i32(tmp2, tmp2, 16); + gen_helper_vfp_fcvt_f16_to_f32(tmp2, tmp2, fpst, ahp); + neon_store_reg(rd, 3, tmp2); tcg_temp_free_i32(ahp); tcg_temp_free_ptr(fpst); break; From patchwork Thu Jun 13 16:39:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 166730 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1107390ilk; Thu, 13 Jun 2019 11:53:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqz8EfSGQxQi+mBGYa2Yn44R4X2b2yEcY1So/df3tb1041OURJdKmMdxxfoLuhx38IsV02Sv X-Received: by 2002:a0c:8885:: with SMTP id 5mr4885430qvn.137.1560452018865; Thu, 13 Jun 2019 11:53:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560452018; cv=none; d=google.com; s=arc-20160816; b=FnV+yGZu24Qcu7qk4WI5xA5RkYEWMWM/dAQ3brAcJltFVEe+XzBJXzXkn7ttZEHIDO OBFA+ffr/MwdadCfCwydNb6+NTaiV6yk4GWMsZoXzrqfKBQZpndmuvodZ3Gf4wmiQ4CZ vhatmi2X5iDoJBH0ty9ku0kTqDt37PIl/3MkxFPid3f7Ngg3Vu7u7LAYW/pW8RKOORr6 QP6IY8oAmWBf9pfuzTU7ByA92FPXQcaRBRJvT7w15iyve63M/wDpkuaxUx99A+zXU+ck vU3L1EXD3AeoO+5/G1+9nsoYE/9cTmRgburoyOsaZOxSNThoLneT4yUomXrad9AqpbeV l5UA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=aWvmCLU0tYg1jkOyEItQlK/WmLZzoOV611s9Hk2h2Ds=; b=BxjMSC5QpbfGg3V/SpVrzA3E+mwDBvSSu8Q+2NGDW+aFJvXVmtcO1WPnA0A5oUjVsX H5/P2MOIHDA4wCg76PRqrCIy9eUo30V0RGoeOmuf3dThVTlUxQX7NUF5+OR95JJNYYSm Ep27WGC2N06Aa0k3YHEUfG7UvcK0EIPQMAihRQ92epfjppS9pduk1XjMStdQWQv/56ST DIZvru3afQPk1g81Yv8c/HTPYWUQa2fmIPD8Nb2vP5BJu6cuxsft/46RP+/oo0BXlqTM w2BSkIScLa6G8e679p3bHBWSA32LyvxIiUXe+bQUNn6J9KuRDMtyW4FwFCJee4enHcfB zMIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ldLozEVS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id f197sm358747wme.39.2019.06.13.09.39.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jun 2019 09:39:31 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Thu, 13 Jun 2019 17:39:17 +0100 Message-Id: <20190613163917.28589-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190613163917.28589-1-peter.maydell@linaro.org> References: <20190613163917.28589-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH 12/12] target/arm: Remove unused cpu_F0s, cpu_F0d, cpu_F1s, cpu_F1d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Remove the now unused TCG globals cpu_F0s, cpu_F0d, cpu_F1s, cpu_F1d. cpu_M0 is still used by the iwmmxt code, and cpu_V0 and cpu_V1 are used by both iwmmxt and Neon. Signed-off-by: Peter Maydell --- target/arm/translate.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index 8f124a953b6..4750b9fa1bb 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -67,10 +67,6 @@ TCGv_i32 cpu_CF, cpu_NF, cpu_VF, cpu_ZF; TCGv_i64 cpu_exclusive_addr; TCGv_i64 cpu_exclusive_val; -/* FIXME: These should be removed. */ -static TCGv_i32 cpu_F0s, cpu_F1s; -static TCGv_i64 cpu_F0d, cpu_F1d; - #include "exec/gen-icount.h" static const char * const regnames[] = @@ -11911,12 +11907,8 @@ static void arm_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) dc->base.max_insns = MIN(dc->base.max_insns, bound); } - cpu_F0s = tcg_temp_new_i32(); - cpu_F1s = tcg_temp_new_i32(); - cpu_F0d = tcg_temp_new_i64(); - cpu_F1d = tcg_temp_new_i64(); - cpu_V0 = cpu_F0d; - cpu_V1 = cpu_F1d; + cpu_V0 = tcg_temp_new_i64(); + cpu_V1 = tcg_temp_new_i64(); /* FIXME: cpu_M0 can probably be the same as cpu_V0. */ cpu_M0 = tcg_temp_new_i64(); }