From patchwork Tue Jun 18 16:52:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 167186 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp4487960ilk; Tue, 18 Jun 2019 10:16:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqzCwGZnISAhTRv2IuWESnyNSqrNIBeyVf/wdePoItK+827coFqenB6RTLzJbuDTGvyH+d9f X-Received: by 2002:ac8:525a:: with SMTP id y26mr102207752qtn.297.1560878178262; Tue, 18 Jun 2019 10:16:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560878178; cv=none; d=google.com; s=arc-20160816; b=wfCU/oQc0r16cjMhHb3eX5bHIsqzJCZmEtiLZiucs8JnIlxJO04ZkMFB0u6EA7T+0e pPGosnjUcYDeE3MHuF+/6bUt6XiQ0TFeyiVyNuox4/UTCvtniHXMbT+SLqjerSZGh0sv 1+5coDb95Q/wWDt7bcmUT2u/ukFbyG4EYyk0PSV7NAKYJ+4EbMlqvDI0Z3Mt3WDjqCYR +P6BxYye81BtOfqH7gBPZjus1r/rqu7+ce3ZVrGFIP0/7F9XJ2NESxsLoe7VVubkVdKB Yd3bZ0drKgooErmm1yfrwHM23o1hjFqzcy1JA1FN+rwj2PTmMsSBbbNxIy8dYnxKaA1Y gDnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from; bh=X6/Cylx1lf5U61uEtrIMT8QHoJMp9iUmBKW8LFGmfQg=; b=Qbf43O1JU2WkpJy7dgRLBYXQxACTZmIOLl2m4Ff4em6I0L4jGGYl9b24P+TqhAO37W EDTQ3rKo0hf3eg9HPJzxkSjk3e3OT6moP67n/ubsVFJuCWTqAUIDjFDChtvGrUKkvqDs kUwePaB80xJZxZ+2AQlpJLvLD9fMJduib784IQ9Tp9dF+b8wgXNNUYlJ0qecME+9sHZ6 TDvBIG6ua3WRUE2HIqn1c8kAspGUs0QpEgXLkzwlZMRPdjNSAMu7bFlamlAG5XbKtk23 DZv7ICSnp9VRNecFpIPgG5gVwO+w/1QIVWmfvl6Duvvg7jRxcs9T3hXEFkiHUDh5Sjgq O5nA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t55si672266qtt.283.2019.06.18.10.16.18 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Jun 2019 10:16:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:60392 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdHiT-0007UA-JQ for patch@linaro.org; Tue, 18 Jun 2019 13:16:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60263) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdHMp-0007sd-3J for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:53:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hdHMn-0003nE-3p for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:53:54 -0400 Received: from 10.mo68.mail-out.ovh.net ([46.105.79.203]:39571) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hdHMl-0003iD-7b for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:53:53 -0400 Received: from player157.ha.ovh.net (unknown [10.108.42.168]) by mo68.mail-out.ovh.net (Postfix) with ESMTP id 2FE1D132554 for ; Tue, 18 Jun 2019 18:53:48 +0200 (CEST) Received: from kaod.org (lfbn-1-10649-41.w90-89.abo.wanadoo.fr [90.89.235.41]) (Authenticated sender: clg@kaod.org) by player157.ha.ovh.net (Postfix) with ESMTPSA id A8ED56EB510B; Tue, 18 Jun 2019 16:53:42 +0000 (UTC) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: Peter Maydell Date: Tue, 18 Jun 2019 18:52:53 +0200 Message-Id: <20190618165311.27066-4-clg@kaod.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618165311.27066-1-clg@kaod.org> References: <20190618165311.27066-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1664924489653652241 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduvddrtddtgdejjecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 46.105.79.203 Subject: [Qemu-devel] [PATCH v2 03/21] hw: timer: Add ASPEED RTC device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Joel Stanley Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Joel Stanley The RTC is modeled to provide time and date functionality. It is initialised at zero to match the hardware. There is no modelling of the alarm functionality, which includes the IRQ line. As there is no guest code to exercise this function that is acceptable for now. Signed-off-by: Joel Stanley Reviewed-by: Peter Maydell --- include/hw/timer/aspeed_rtc.h | 31 ++++++ hw/timer/aspeed_rtc.c | 180 ++++++++++++++++++++++++++++++++++ hw/timer/Makefile.objs | 2 +- hw/timer/trace-events | 4 + 4 files changed, 216 insertions(+), 1 deletion(-) create mode 100644 include/hw/timer/aspeed_rtc.h create mode 100644 hw/timer/aspeed_rtc.c -- 2.21.0 diff --git a/include/hw/timer/aspeed_rtc.h b/include/hw/timer/aspeed_rtc.h new file mode 100644 index 000000000000..1f1155a676c1 --- /dev/null +++ b/include/hw/timer/aspeed_rtc.h @@ -0,0 +1,31 @@ +/* + * ASPEED Real Time Clock + * Joel Stanley + * + * Copyright 2019 IBM Corp + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef ASPEED_RTC_H +#define ASPEED_RTC_H + +#include + +#include "hw/hw.h" +#include "hw/irq.h" +#include "hw/sysbus.h" + +typedef struct AspeedRtcState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + qemu_irq irq; + + uint32_t reg[0x18]; + int offset; + +} AspeedRtcState; + +#define TYPE_ASPEED_RTC "aspeed.rtc" +#define ASPEED_RTC(obj) OBJECT_CHECK(AspeedRtcState, (obj), TYPE_ASPEED_RTC) + +#endif /* ASPEED_RTC_H */ diff --git a/hw/timer/aspeed_rtc.c b/hw/timer/aspeed_rtc.c new file mode 100644 index 000000000000..19f061c846e8 --- /dev/null +++ b/hw/timer/aspeed_rtc.c @@ -0,0 +1,180 @@ +/* + * ASPEED Real Time Clock + * Joel Stanley + * + * Copyright 2019 IBM Corp + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "hw/timer/aspeed_rtc.h" +#include "qemu/log.h" +#include "qemu/timer.h" + +#include "trace.h" + +#define COUNTER1 (0x00 / 4) +#define COUNTER2 (0x04 / 4) +#define ALARM (0x08 / 4) +#define CONTROL (0x10 / 4) +#define ALARM_STATUS (0x14 / 4) + +#define RTC_UNLOCKED BIT(1) +#define RTC_ENABLED BIT(0) + +static void aspeed_rtc_calc_offset(AspeedRtcState *rtc) +{ + struct tm tm; + uint32_t year, cent; + uint32_t reg1 = rtc->reg[COUNTER1]; + uint32_t reg2 = rtc->reg[COUNTER2]; + + tm.tm_mday = (reg1 >> 24) & 0x1f; + tm.tm_hour = (reg1 >> 16) & 0x1f; + tm.tm_min = (reg1 >> 8) & 0x3f; + tm.tm_sec = (reg1 >> 0) & 0x3f; + + cent = (reg2 >> 16) & 0x1f; + year = (reg2 >> 8) & 0x7f; + tm.tm_mon = ((reg2 >> 0) & 0x0f) - 1; + tm.tm_year = year + (cent * 100) - 1900; + + rtc->offset = qemu_timedate_diff(&tm); +} + +static uint32_t aspeed_rtc_get_counter(AspeedRtcState *rtc, int r) +{ + uint32_t year, cent; + struct tm now; + + qemu_get_timedate(&now, rtc->offset); + + switch (r) { + case COUNTER1: + return (now.tm_mday << 24) | (now.tm_hour << 16) | + (now.tm_min << 8) | now.tm_sec; + case COUNTER2: + cent = (now.tm_year + 1900) / 100; + year = now.tm_year % 100; + return ((cent & 0x1f) << 16) | ((year & 0x7f) << 8) | + ((now.tm_mon + 1) & 0xf); + default: + g_assert_not_reached(); + } +} + +static uint64_t aspeed_rtc_read(void *opaque, hwaddr addr, + unsigned size) +{ + AspeedRtcState *rtc = opaque; + uint64_t val; + uint32_t r = addr >> 2; + + switch (r) { + case COUNTER1: + case COUNTER2: + if (rtc->reg[CONTROL] & RTC_ENABLED) { + rtc->reg[r] = aspeed_rtc_get_counter(rtc, r); + } + /* fall through */ + case CONTROL: + val = rtc->reg[r]; + break; + case ALARM: + case ALARM_STATUS: + default: + qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx "\n", __func__, addr); + return 0; + } + + trace_aspeed_rtc_read(addr, val); + + return val; +} + +static void aspeed_rtc_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) +{ + AspeedRtcState *rtc = opaque; + uint32_t r = addr >> 2; + + switch (r) { + case COUNTER1: + case COUNTER2: + if (!(rtc->reg[CONTROL] & RTC_UNLOCKED)) { + break; + } + /* fall through */ + case CONTROL: + rtc->reg[r] = val; + aspeed_rtc_calc_offset(rtc); + break; + case ALARM: + case ALARM_STATUS: + default: + qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx "\n", __func__, addr); + break; + } + trace_aspeed_rtc_write(addr, val); +} + +static void aspeed_rtc_reset(DeviceState *d) +{ + AspeedRtcState *rtc = ASPEED_RTC(d); + + rtc->offset = 0; + memset(rtc->reg, 0, sizeof(rtc->reg)); +} + +static const MemoryRegionOps aspeed_rtc_ops = { + .read = aspeed_rtc_read, + .write = aspeed_rtc_write, + .endianness = DEVICE_NATIVE_ENDIAN, +}; + +static const VMStateDescription vmstate_aspeed_rtc = { + .name = TYPE_ASPEED_RTC, + .version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(reg, AspeedRtcState, 0x18), + VMSTATE_INT32(offset, AspeedRtcState), + VMSTATE_INT32(offset, AspeedRtcState), + VMSTATE_END_OF_LIST() + } +}; + +static void aspeed_rtc_realize(DeviceState *dev, Error **errp) +{ + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + AspeedRtcState *s = ASPEED_RTC(dev); + + sysbus_init_irq(sbd, &s->irq); + + memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_rtc_ops, s, + "aspeed-rtc", 0x18ULL); + sysbus_init_mmio(sbd, &s->iomem); +} + +static void aspeed_rtc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = aspeed_rtc_realize; + dc->vmsd = &vmstate_aspeed_rtc; + dc->reset = aspeed_rtc_reset; +} + +static const TypeInfo aspeed_rtc_info = { + .name = TYPE_ASPEED_RTC, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(AspeedRtcState), + .class_init = aspeed_rtc_class_init, +}; + +static void aspeed_rtc_register_types(void) +{ + type_register_static(&aspeed_rtc_info); +} + +type_init(aspeed_rtc_register_types) diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs index 0e9a4530f848..123d92c9692c 100644 --- a/hw/timer/Makefile.objs +++ b/hw/timer/Makefile.objs @@ -41,7 +41,7 @@ obj-$(CONFIG_MC146818RTC) += mc146818rtc.o obj-$(CONFIG_ALLWINNER_A10_PIT) += allwinner-a10-pit.o common-obj-$(CONFIG_STM32F2XX_TIMER) += stm32f2xx_timer.o -common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o +common-obj-$(CONFIG_ASPEED_SOC) += aspeed_timer.o aspeed_rtc.o common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o diff --git a/hw/timer/trace-events b/hw/timer/trace-events index dcaf3d6da6c8..db02a9142cda 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -66,6 +66,10 @@ cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK A cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" +# hw/timer/aspeed-rtc.c +aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 +aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 + # sun4v-rtc.c sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " value 0x%" PRIx64 sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " value 0x%" PRIx64 From patchwork Tue Jun 18 16:52:54 2019 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id s54si661458qte.241.2019.06.18.10.24.01 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Jun 2019 10:24:01 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:60464 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdHpx-0006vA-Cr for patch@linaro.org; Tue, 18 Jun 2019 13:24:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60326) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdHMr-0007xd-KW for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:53:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hdHMp-0003rq-Gn for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:53:57 -0400 Received: from 3.mo69.mail-out.ovh.net ([188.165.52.203]:46562) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hdHMp-0003o9-A3 for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:53:55 -0400 Received: from player157.ha.ovh.net (unknown [10.108.42.83]) by mo69.mail-out.ovh.net (Postfix) with ESMTP id 74F275E026 for ; Tue, 18 Jun 2019 18:53:53 +0200 (CEST) Received: from kaod.org (lfbn-1-10649-41.w90-89.abo.wanadoo.fr [90.89.235.41]) (Authenticated sender: clg@kaod.org) by player157.ha.ovh.net (Postfix) with ESMTPSA id 07F456EB5154; Tue, 18 Jun 2019 16:53:48 +0000 (UTC) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: Peter Maydell Date: Tue, 18 Jun 2019 18:52:54 +0200 Message-Id: <20190618165311.27066-5-clg@kaod.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618165311.27066-1-clg@kaod.org> References: <20190618165311.27066-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1666613338521832209 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduvddrtddtgdejjecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 188.165.52.203 Subject: [Qemu-devel] [PATCH v2 04/21] hw/arm/aspeed: Add RTC to SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Joel Stanley Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Joel Stanley All systems have an RTC. The IRQ is hooked up but the model does not use it at this stage. There is no guest code that uses it, so this limitation is acceptable. Signed-off-by: Joel Stanley Reviewed-by: Peter Maydell --- include/hw/arm/aspeed_soc.h | 2 ++ hw/arm/aspeed_soc.c | 13 +++++++++++++ 2 files changed, 15 insertions(+) -- 2.21.0 diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 88b901d5dfa9..fa0ba957a611 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -16,6 +16,7 @@ #include "hw/misc/aspeed_scu.h" #include "hw/misc/aspeed_sdmc.h" #include "hw/timer/aspeed_timer.h" +#include "hw/timer/aspeed_rtc.h" #include "hw/i2c/aspeed_i2c.h" #include "hw/ssi/aspeed_smc.h" #include "hw/watchdog/wdt_aspeed.h" @@ -32,6 +33,7 @@ typedef struct AspeedSoCState { ARMCPU cpu; MemoryRegion sram; AspeedVICState vic; + AspeedRtcState rtc; AspeedTimerCtrlState timerctrl; AspeedI2CState i2c; AspeedSCUState scu; diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 1cc98b9f4045..5faa78d81fd6 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -189,6 +189,9 @@ static void aspeed_soc_init(Object *obj) sysbus_init_child_obj(obj, "vic", OBJECT(&s->vic), sizeof(s->vic), TYPE_ASPEED_VIC); + sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc), + TYPE_ASPEED_RTC); + sysbus_init_child_obj(obj, "timerctrl", OBJECT(&s->timerctrl), sizeof(s->timerctrl), TYPE_ASPEED_TIMER); object_property_add_const_link(OBJECT(&s->timerctrl), "scu", @@ -275,6 +278,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 1, qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ)); + /* RTC */ + object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->info->memmap[ASPEED_RTC]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, + aspeed_soc_get_irq(s, ASPEED_RTC)); + /* Timer */ object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err); if (err) { From patchwork Tue Jun 18 16:52:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 167188 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp4505106ilk; Tue, 18 Jun 2019 10:33:17 -0700 (PDT) X-Google-Smtp-Source: APXvYqyacJ9OF1OLZzKz6N+QVz//nQ/A+wq0gmEGE7JQfKiYXy9T/Fpn/K4FkOw9kmqKt9Dk8HM+ X-Received: by 2002:a37:a9c3:: with SMTP id s186mr44163419qke.190.1560879197922; Tue, 18 Jun 2019 10:33:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560879197; cv=none; d=google.com; s=arc-20160816; b=uCtA6PlLP7SSlXjJ4nAy9VHxLo4+ATEHs8WDcsCCtXm5C/HUTuwdyKzMXcGEuYxkkq ZF9Oj2wBsF18VIZGR7TGPjcMHeKs8tTcZMcLwmAqmXaKCknmgX3/ReirTi40CcQ2WxdS HrvAdL9+R8WyUCVuJjjlCkGDtUr/5PYReaqJXG2BMrKULJdlw8sTTL7CnxNhLom0BiLr eRr/ZMcN0i1X58lFiqmoyLxj2VhKJt7sEWVXwY7OoaqLO1zKUDPgy0lrHmayxTjk4xvA kn0LtsvhBzVQTRqgfiSBlXzG+hfnJTgisVWZsvoHchzw8UyPMkQ6w+Xfx8owsn9EGPCI nf/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from; bh=yST2yA1MXO1PRUxLiIuZxjhQXF1u8DF/KqomlO5l8Uo=; b=FzMuJ0LK+rI4indaR2exYKegbDTHCsnZdJ/iMh0nmIj6O8aO9puWrIBLoL2PgcXJru oJcucQ33NTwxjOZ02F4BflSx6puTe/o3BbY3YqDisBovYsZFgOeUS0Jhhro/S0DGVGVi yIqebCDf2Yj7Dw1NbKhmbrxX6I2AiLQ3GX/+6l81cJCKuVSozRIe6qERQ9nI6duMdZUp Hs7PVl0ZxqgCQEjVqel75tcUB1KBjSVVKpphaKN0JyH6Hcvvi7wyml/JMDwoLj3lzEqj +/RiubD4W/WN/b831S7stQyU247igRrrkWjhpSDQ+sDHco2avLdz6KlhLar610oUyaBr 7zqg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m1si359985qvn.187.2019.06.18.10.33.17 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Jun 2019 10:33:17 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:60570 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdHyv-0007XA-FY for patch@linaro.org; Tue, 18 Jun 2019 13:33:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60609) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdHNL-0000GV-2L for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:54:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hdHNJ-0004WW-Dh for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:54:26 -0400 Received: from 6.mo1.mail-out.ovh.net ([46.105.43.205]:36949) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hdHNH-0004Ip-D5 for qemu-devel@nongnu.org; Tue, 18 Jun 2019 12:54:25 -0400 Received: from player157.ha.ovh.net (unknown [10.109.159.132]) by mo1.mail-out.ovh.net (Postfix) with ESMTP id 21AF217F201 for ; Tue, 18 Jun 2019 18:54:13 +0200 (CEST) Received: from kaod.org (lfbn-1-10649-41.w90-89.abo.wanadoo.fr [90.89.235.41]) (Authenticated sender: clg@kaod.org) by player157.ha.ovh.net (Postfix) with ESMTPSA id 2E4ED6EB527C; Tue, 18 Jun 2019 16:54:07 +0000 (UTC) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: Peter Maydell Date: Tue, 18 Jun 2019 18:52:57 +0200 Message-Id: <20190618165311.27066-8-clg@kaod.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190618165311.27066-1-clg@kaod.org> References: <20190618165311.27066-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1672242837034666769 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduvddrtddtgdejjecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 46.105.43.205 Subject: [Qemu-devel] [PATCH v2 07/21] aspeed/timer: Fix behaviour running Linux X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Joel Stanley Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Joel Stanley The Linux kernel driver was updated in commit 4451d3f59f2a ("clocksource/drivers/fttmr010: Fix set_next_event handler) to fix an issue observed on hardware: > RELOAD register is loaded into COUNT register when the aspeed timer > is enabled, which means the next event may be delayed because timer > interrupt won't be generated until <0xFFFFFFFF - current_count + > cycles>. When running under Qemu, the system appeared "laggy". The guest is now scheduling timer events too regularly, starving the host of CPU time. This patch modifies the timer model to attempt to schedule the timer expiry as the guest requests, but if we have missed the deadline we re interrupt and try again, which allows the guest to catch up. Provides expected behaviour with old and new guest code. Fixes: c04bd47db6b9 ("hw/timer: Add ASPEED timer device model") Signed-off-by: Joel Stanley [clg: - merged a fix from Andrew Jeffery "Fire interrupt on failure to meet deadline" https://lists.ozlabs.org/pipermail/openbmc/2019-January/014641.html - adapted commit log - checkpatch fixes ] Signed-off-by: Cédric Le Goater --- hw/timer/aspeed_timer.c | 59 ++++++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 28 deletions(-) -- 2.21.0 diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c index 2c3a4d0fe770..537f072cf87f 100644 --- a/hw/timer/aspeed_timer.c +++ b/hw/timer/aspeed_timer.c @@ -109,37 +109,40 @@ static inline uint64_t calculate_time(struct AspeedTimer *t, uint32_t ticks) static uint64_t calculate_next(struct AspeedTimer *t) { - uint64_t next = 0; - uint32_t rate = calculate_rate(t); + uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + uint64_t next; - while (!next) { - /* We don't know the relationship between the values in the match - * registers, so sort using MAX/MIN/zero. We sort in that order as the - * timer counts down to zero. */ - uint64_t seq[] = { - calculate_time(t, MAX(t->match[0], t->match[1])), - calculate_time(t, MIN(t->match[0], t->match[1])), - calculate_time(t, 0), - }; - uint64_t reload_ns; - uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - - if (now < seq[0]) { - next = seq[0]; - } else if (now < seq[1]) { - next = seq[1]; - } else if (now < seq[2]) { - next = seq[2]; - } else if (t->reload) { - reload_ns = muldiv64(t->reload, NANOSECONDS_PER_SECOND, rate); - t->start = now - ((now - t->start) % reload_ns); - } else { - /* no reload value, return 0 */ - break; - } + /* + * We don't know the relationship between the values in the match + * registers, so sort using MAX/MIN/zero. We sort in that order as + * the timer counts down to zero. + */ + + next = calculate_time(t, MAX(t->match[0], t->match[1])); + if (now < next) { + return next; + } + + next = calculate_time(t, MIN(t->match[0], t->match[1])); + if (now < next) { + return next; + } + + next = calculate_time(t, 0); + if (now < next) { + return next; + } + + /* We've missed all deadlines, fire interrupt and try again */ + timer_del(&t->timer); + + if (timer_overflow_interrupt(t)) { + t->level = !t->level; + qemu_set_irq(t->irq, t->level); } - return next; + t->start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); + return calculate_time(t, MAX(MAX(t->match[0], t->match[1]), 0)); } static void aspeed_timer_mod(AspeedTimer *t)