From patchwork Fri Jun 21 06:12:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "\(Exiting\) Baolin Wang" X-Patchwork-Id: 167360 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp312584ilk; Thu, 20 Jun 2019 23:12:59 -0700 (PDT) X-Google-Smtp-Source: APXvYqwo+G/GCIDEwdlM1X4e+7yd+7wg2RpdDLbDESiibAxvBa0K7+auE92ZocNBOrwByMF/XOe8 X-Received: by 2002:a17:902:8b82:: with SMTP id ay2mr29971022plb.164.1561097579483; Thu, 20 Jun 2019 23:12:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561097579; cv=none; d=google.com; s=arc-20160816; b=yTWP1/JLnbQ/0bDZouoXnBxa9wYtfMla/Ct0UO8ATSGK6MeUzYxnEUJv/HFzohvppc wCH4Z1+LXeWbI1gYqUFsJsmqKEVBaug57JUqbQ9hix/40Pwx1ON6t3PnlCVvPRLEfOPd u7VnHvKoC0vVqj8GImdpGE3Po/M01lSKmbKnBvoSXiyl4feMKGUhlMaEX/IjoISQNglQ NneIb/7JtONphjeW6Ycy8yFhvsBJJmoAUaUnVJrGdpxGJp4LCvnuxRCkgxejl1p8eWz8 CFAitMFJU3lbF0bSHQ4xC5eAeePnuMcNNMnYyjuhdYVDbSfcOnCAExJu9XSMx+HckGan 26oQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=sTCdN8+J6KLa7sEKH0EdC3HRf3eZR2ST2OSFrpSj98Q=; b=H6AwaUxBdD23uF+DzfXdjNqNEymZnzhpn0fgPTfVayftzrU7gQJmGJOGk8o/b+s1TC AKdDO8S4ddPMeNNpQRMmXNjxdaO5scp405pm9ZJB80MTLJieEuTxJspGvP5h9RJuuq09 ISg1dv+iT+WbCM+fUSgNm8BvdGqIDSr4fIBLBq+LNre3a9iXdaAJ+0IrgTKUEEzLUdZR VSIAhENqNCPatqqiViCLG/EXmfiD8couziJBaPpC3t4XrhHVBLXIF+zQ6hdiNb00Fo3J 0fTX0+ZXPv0BToKHOLE/QZPl1/WxlrjsNaBLD2Irnk8RqwoGy9NmYzcybzgyP7ZMuYEv 6MeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hRj5ECnn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g12si1839757pjs.35.2019.06.20.23.12.59; Thu, 20 Jun 2019 23:12:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hRj5ECnn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726309AbfFUGM6 (ORCPT + 8 others); Fri, 21 Jun 2019 02:12:58 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:32953 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726296AbfFUGM5 (ORCPT ); Fri, 21 Jun 2019 02:12:57 -0400 Received: by mail-pg1-f193.google.com with SMTP id m4so2228479pgk.0 for ; Thu, 20 Jun 2019 23:12:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=sTCdN8+J6KLa7sEKH0EdC3HRf3eZR2ST2OSFrpSj98Q=; b=hRj5ECnn+gxAxOedpghqwfXjTbai4FfzLUa9qcX00huzqhbDDBkKgalm3JGfPzF4sm 18yXQSv2ukoeVpjOkv7Db2DZDB28Ddz1Jkn3Q6od/ez8JwBgtOtfOj9X7ShDnaOcEZdA KM1UOo97Eo5hwjvpmIQCLUrL2E1wytzb1SD4kV+ffY2IRcgG4TT9FyI62cGLmutOceIj ipEH0GNu8YZ1aIGoR2Ku1j9iYaZQ84JO+TrBmMZYGD6Dx85JTEmWEO4lX7M6hvVTfA5N dvfPJJ8svG6P159BVUNq3Xzv6MU6BxsEK4BoUVBA9CNKMzhFQvWUVgCUhAsWngA5gedR Lbgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=sTCdN8+J6KLa7sEKH0EdC3HRf3eZR2ST2OSFrpSj98Q=; b=d1I6dD1ir5FkBbdIOHOOnSl8svUx7Uk/+vt+5nnyGISPMMxV8ODg+k2LctorWJhNh4 7ZFAqK/wWNRDP+rNe693apysEz9Gmi50ZT3gG2agC6Q4TRMLp+hzgZ4i0tdpGoLGtFgi fr/D020iWN57mAEpgAWG8tEF64Yqb0bCeVRdlfMY521qCmimS3M+KRjih1jUhD4uM1PY w7nFriNTYFBd1St6ZhKSEW0Q4VtsWFeQZK+kaNZEMmCJN+7E47r39eADdXLwoXbRTXFI d4ykY+kP97NIMVrLqc2i4435XXlTVJi2HCC7jAoUWSNF9GRsWPnKjrv+9bdC6rNp0V10 TpDA== X-Gm-Message-State: APjAAAX7Hl+64H1eF9Ojx4i65q6t/fUXGbhHj4QWHA0uVAcz6uuM+Zhq F0u9Mqu1oxRzGEjEcN1pkhGc7g== X-Received: by 2002:a17:90a:d814:: with SMTP id a20mr4358452pjv.48.1561097576891; Thu, 20 Jun 2019 23:12:56 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id x7sm1266134pfm.82.2019.06.20.23.12.53 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Jun 2019 23:12:56 -0700 (PDT) From: Baolin Wang To: adrian.hunter@intel.com, ulf.hansson@linaro.org, zhang.lyra@gmail.com, orsonzhai@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com Cc: baolin.wang@linaro.org, vincent.guittot@linaro.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: mmc: sprd: Add pinctrl support Date: Fri, 21 Jun 2019 14:12:32 +0800 Message-Id: <73f6c1291e4c15da6be53a6dd4602622e142fefb.1561094029.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When changing SD card voltage signal for Spreadtrum SD host controller, it also need to switch related pin's state. Thus add pinctrl properties' description in documentation. Signed-off-by: Baolin Wang --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 7 +++++++ 1 file changed, 7 insertions(+) -- 1.7.9.5 diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt index e675397..eb7eb1b 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -19,6 +19,9 @@ Required properties: Optional properties: - assigned-clocks: the same with "sdio" clock - assigned-clock-parents: the default parent of "sdio" clock +- pinctrl-names: should be "default", "state_uhs" +- pinctrl-0: should contain default/high speed pin control +- pinctrl-1: should contain uhs mode pin control PHY DLL delays are used to delay the data valid window, and align the window to sampling clock. PHY DLL delays can be configured by following properties, @@ -50,6 +53,10 @@ sdio0: sdio@20600000 { assigned-clocks = <&ap_clk CLK_EMMC_2X>; assigned-clock-parents = <&rpll CLK_RPLL_390M>; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&sd0_pins_default>; + pinctrl-1 = <&sd0_pins_uhs>; + sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>; bus-width = <8>; non-removable; From patchwork Fri Jun 21 06:12:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "\(Exiting\) Baolin Wang" X-Patchwork-Id: 167361 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp312625ilk; Thu, 20 Jun 2019 23:13:02 -0700 (PDT) X-Google-Smtp-Source: APXvYqy5n9YyP+Uj7PUcY/+M52VPE/ygeP5QiDJjJYW/lTOHuh81r45icvvKhxeilxYII3bMLko2 X-Received: by 2002:a17:902:8509:: with SMTP id bj9mr14422141plb.79.1561097582626; Thu, 20 Jun 2019 23:13:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561097582; cv=none; d=google.com; s=arc-20160816; b=kV9WCLM4HiG+Ne8LHiis8nL3ZibHk7Mu6IDa1fy5qIYX9WIiDuXa5TXv0v7Bv/T7D+ ItDKMCJsdRycX47DhR5cyGDWqkCkz1/wxJECxsgz7nHUrr8/7E2n8ZAeBd6m8Qy325OJ vPWt9E940eYd4W5TLZ0FqyyNa8KlBr6QhPFhuTy9syd0yfblAtWxPxrijkQVupV7NkLQ x9adDBac3ISGh362gdwwFvT1jPGxtLCZzaaL383ntUlNQgtwUn+mglMzxx7nT7tWmzEq i00nRseCBWwrGCWO2/Mlpbloik+TNp5OSRxdYphc4p91FYa2PVRtl6aDxnFRkxfXUHPZ 4QTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=ImM7LoJ0g/LV9Msk8fC9rkqyN6ipnuYryn1oHdAjw90=; b=Hxm71dJA2Q9dQ9tGEa2U3f6k6VwfrWGOiDdpc2HUkZPTiRQjfnUXccOgfCOsSNARMT ZT6sDcGCGIKG2M0s3lGXqgk11UVcCMD2228G1XtFaPgRNQctbJs/gQGMI9AVFQASRq3t driGUwZXPTBDQ8UI2C6e9Vn4iWROiEr/GugIbQpFKLQ1XSAM3h5JDz1kyekHbo3XPD/U q7H9pxs5x1s0A2j1YUr3EX9Vh6g0SIXgPNE6jSOj0buYB/GU/rON4O7Yciz30JKTpiq2 Q1TiJswW/SoUrFbNgZORskDLQ9xfs6snSitrih8Lg0LEquvU3Yp+I/bR+kGEO+4pobsM Laeg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IsSBjGrF; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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This patch adds pin control operation to support voltage switch. Signed-off-by: Baolin Wang --- drivers/mmc/host/sdhci-sprd.c | 54 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) -- 1.7.9.5 Acked-by: Adrian Hunter diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c index 8b23c88..6ee340a 100644 --- a/drivers/mmc/host/sdhci-sprd.c +++ b/drivers/mmc/host/sdhci-sprd.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -72,6 +73,9 @@ struct sdhci_sprd_host { struct clk *clk_sdio; struct clk *clk_enable; struct clk *clk_2x_enable; + struct pinctrl *pinctrl; + struct pinctrl_state *pins_uhs; + struct pinctrl_state *pins_default; u32 base_rate; int flags; /* backup of host attribute */ u32 phy_delay[MMC_TIMING_MMC_HS400 + 2]; @@ -405,6 +409,8 @@ static void sdhci_sprd_request(struct mmc_host *mmc, struct mmc_request *mrq) static int sdhci_sprd_voltage_switch(struct mmc_host *mmc, struct mmc_ios *ios) { + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); int ret; if (!IS_ERR(mmc->supply.vqmmc)) { @@ -416,6 +422,37 @@ static int sdhci_sprd_voltage_switch(struct mmc_host *mmc, struct mmc_ios *ios) } } + if (IS_ERR(sprd_host->pinctrl)) + return 0; + + switch (ios->signal_voltage) { + case MMC_SIGNAL_VOLTAGE_180: + ret = pinctrl_select_state(sprd_host->pinctrl, + sprd_host->pins_uhs); + if (ret) { + pr_err("%s: failed to select uhs pin state\n", + mmc_hostname(mmc)); + return ret; + } + break; + + default: + /* fall-through */ + case MMC_SIGNAL_VOLTAGE_330: + ret = pinctrl_select_state(sprd_host->pinctrl, + sprd_host->pins_default); + if (ret) { + pr_err("%s: failed to select default pin state\n", + mmc_hostname(mmc)); + return ret; + } + break; + } + + /* Wait for 300 ~ 500 us for pin state stable */ + usleep_range(300, 500); + sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + return 0; } @@ -504,6 +541,23 @@ static int sdhci_sprd_probe(struct platform_device *pdev) sprd_host = TO_SPRD_HOST(host); sdhci_sprd_phy_param_parse(sprd_host, pdev->dev.of_node); + sprd_host->pinctrl = devm_pinctrl_get(&pdev->dev); + if (!IS_ERR(sprd_host->pinctrl)) { + sprd_host->pins_uhs = + pinctrl_lookup_state(sprd_host->pinctrl, "state_uhs"); + if (IS_ERR(sprd_host->pins_uhs)) { + ret = PTR_ERR(sprd_host->pins_uhs); + goto pltfm_free; + } + + sprd_host->pins_default = + pinctrl_lookup_state(sprd_host->pinctrl, "default"); + if (IS_ERR(sprd_host->pins_default)) { + ret = PTR_ERR(sprd_host->pins_default); + goto pltfm_free; + } + } + clk = devm_clk_get(&pdev->dev, "sdio"); if (IS_ERR(clk)) { ret = PTR_ERR(clk);