From patchwork Fri Jun 21 08:59:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 167371 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp465814ilk; Fri, 21 Jun 2019 02:02:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqwbtQL/ng9C4oLEto4jl5x7voVctJ3nl1Yg0PKrEmBmFMuo5x8l1cIi9aFhpCcTVEQgwqAf X-Received: by 2002:a63:1d5:: with SMTP id 204mr17818754pgb.207.1561107759049; Fri, 21 Jun 2019 02:02:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561107759; cv=none; d=google.com; s=arc-20160816; b=cahuF14CozjIzJQue0K6Uls9aDvdW6fnq0kbTx+BY5MYyrnMaJHj522xjwgAZ7FgFJ ozQb1I9Fl/WNmO7R8bS6AihetjN2u1H6Dj2emj6EfUWrHzh+KVAVWUzcrmWns86uX1Ee MQ6o2ruEdKsESSHLWTsij9LY0IbmZfhvzmQ0PNYZ1r9cTJvAwxM1K8kKl9qfaHIPtyqO AIKqY6VbCzeulcerH+r8YHpmJZbFtPZ9fjhoVWgR0LAc1WLhwB1CsZG6rCwgySg7KeRf HLr9YJ0o0FSDdsLCLgSHD/Vbwg0R8y9wu7IvP7bEiCZoA/nvnTRDquph+Q+4kITc5Jbu g9Sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=yrRVYXQP6qkzrBfPUjQvpt1BLDdCPF/gafe7mTn7vAY=; b=vgNQ46wc6z2V3EN4V1sRENxfaO0XZ4CUBlWXYQFYpU9ACNEvzMD+UOuG2ZUCsT+pQI HtZkl5kHtndKEmMjwKKu5v/XGc9LRonvLXodppUSMLHAtwHFQSPV4NBua2hpsRSqwH/h 11yY9RCnSrlXucU+iLp5Q/mfFAzmQ7HNo07cqxfAr0ZcAuB8dHmxR3M+yS3Oy7V5x6yb tPGjKUpFIpeg9Qr3R/3Y3txl2+tNbA4sa8mMIguwynw3kx457g711SWVsIIt3RZGbU49 3zGgabxxQRClgZpNWybY4z7MbCORSjnMMdf4XxBKMQoaXHmFUf+1BE4Vbni4tG00DPoI usuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=u9pm+Mz6; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i4si2009066pgq.66.2019.06.21.02.02.38; Fri, 21 Jun 2019 02:02:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=u9pm+Mz6; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726489AbfFUJCi (ORCPT + 15 others); Fri, 21 Jun 2019 05:02:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:39198 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726055AbfFUJCi (ORCPT ); Fri, 21 Jun 2019 05:02:38 -0400 Received: from localhost.localdomain (unknown [106.201.116.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0FCDF21530; Fri, 21 Jun 2019 09:02:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561107756; bh=JK8hOuKNErqtd90GaYBh/aLxVD+w2NIzVf4nl1UPHxc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=u9pm+Mz6UKm8GGK2GGrMZjCTT3NwpeUAvxXjS2iDQUbf/bYaNKNMbgUnN8RvyFipc uDS/ivZnni7Fj+/iWqTmydiXDu1qJtXX+lpJWdepbNysQd2DgIb1H2+WMF+91KD6v6 HBoI7qbujn9nLws08OupD8WTB3un8vatB4x56Ln8= From: Vinod Koul To: Mathias Nyman , Greg Kroah-Hartman Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Christian Lamparter , Yoshihiro Shimoda , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Vinod Koul Subject: [PATCH v2 1/5] usb: xhci: add firmware loader for uPD720201 and uPD720202 w/o ROM Date: Fri, 21 Jun 2019 14:29:09 +0530 Message-Id: <20190621085913.8722-2-vkoul@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190621085913.8722-1-vkoul@kernel.org> References: <20190621085913.8722-1-vkoul@kernel.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Christian Lamparter This patch adds a firmware loader for the uPD720201K8-711-BAC-A and uPD720202K8-711-BAA-A variant. Both of these chips are listed in Renesas' R19UH0078EJ0500 Rev.5.00 "User's Manual: Hardware" as devices which need the firmware loader on page 2 in order to work as they "do not support the External ROM". The "Firmware Download Sequence" is describe in chapter "7.1 FW Download Interface" R19UH0078EJ0500 Rev.5.00 page 131. The firmware "K2013080.mem" is available from a USB3.0 Host to PCIe Adapter (PP2U-E card) "Firmware download" archive. An alternative version can be sourced from Netgear's WNDR4700 GPL archives. The release notes of the PP2U-E's "Firmware Download" ver 2.0.1.3 (2012-06-15) state that the firmware is for the following devices: - uPD720201 ES 2.0 sample whose revision ID is 2. - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3. - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2. Cc: Yoshihiro Shimoda Signed-off-by: Christian Lamparter Signed-off-by: Bjorn Andersson [vkoul: fixed comments: used macros for timeout count and delay removed renesas_fw_alive_check cleaned renesas_fw_callback removed recurion for renesas_fw_download added MODULE_FIRMWARE] Signed-off-by: Vinod Koul --- drivers/usb/host/xhci-pci.c | 458 ++++++++++++++++++++++++++++++++++++ 1 file changed, 458 insertions(+) -- 2.20.1 diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index c2fe218e051f..724d0f567d98 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include "xhci.h" #include "xhci-trace.h" @@ -55,6 +57,9 @@ #define PCI_DEVICE_ID_AMD_PROMONTORYA_1 0x43bc #define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142 +#define RENESAS_RETRY 1000 +#define RENESAS_DELAY 10 + static const char hcd_name[] = "xhci_hcd"; static struct hc_driver __read_mostly xhci_pci_hc_driver; @@ -279,6 +284,433 @@ static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { } #endif /* CONFIG_ACPI */ +static const struct renesas_fw_entry { + const char *firmware_name; + u16 device; + u8 revision; + u16 expected_version; +} renesas_fw_table[] = { + /* + * Only the uPD720201K8-711-BAC-A or uPD720202K8-711-BAA-A + * are listed in R19UH0078EJ0500 Rev.5.00 as devices which + * need the software loader. + * + * PP2U/ReleaseNote_USB3-201-202-FW.txt: + * + * Note: This firmware is for the following devices. + * - uPD720201 ES 2.0 sample whose revision ID is 2. + * - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3. + * - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2. + */ + { "K2013080.mem", 0x0014, 0x02, 0x2013 }, + { "K2013080.mem", 0x0014, 0x03, 0x2013 }, + { "K2013080.mem", 0x0015, 0x02, 0x2013 }, +}; + +MODULE_FIRMWARE("K2013080.mem"); + +static const struct renesas_fw_entry *renesas_needs_fw_dl(struct pci_dev *dev) +{ + const struct renesas_fw_entry *entry; + size_t i; + + /* This loader will only work with a RENESAS device. */ + if (!(dev->vendor == PCI_VENDOR_ID_RENESAS)) + return NULL; + + for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) { + entry = &renesas_fw_table[i]; + if (entry->device == dev->device && + entry->revision == dev->revision) + return entry; + } + + return NULL; +} + +static int renesas_fw_download_image(struct pci_dev *dev, + const u32 *fw, + size_t step) +{ + size_t i; + int err; + u8 fw_status; + bool data0_or_data1; + + /* + * The hardware does alternate between two 32-bit pages. + * (This is because each row of the firmware is 8 bytes). + * + * for even steps we use DATA0, for odd steps DATA1. + */ + data0_or_data1 = (step & 1) == 1; + + /* step+1. Read "Set DATAX" and confirm it is cleared. */ + for (i = 0; i < RENESAS_RETRY; i++) { + err = pci_read_config_byte(dev, 0xF5, &fw_status); + if (err) + return pcibios_err_to_errno(err); + if (!(fw_status & BIT(data0_or_data1))) + break; + + udelay(RENESAS_DELAY); + } + if (i == RENESAS_RETRY) + return -ETIMEDOUT; + + /* + * step+2. Write FW data to "DATAX". + * "LSB is left" => force little endian + */ + err = pci_write_config_dword(dev, data0_or_data1 ? 0xFC : 0xF8, + (__force u32)cpu_to_le32(fw[step])); + if (err) + return pcibios_err_to_errno(err); + + udelay(100); + + /* step+3. Set "Set DATAX". */ + err = pci_write_config_byte(dev, 0xF5, BIT(data0_or_data1)); + if (err) + return pcibios_err_to_errno(err); + + return 0; +} + +static int renesas_fw_verify(struct pci_dev *dev, + const void *fw_data, + size_t length) +{ + const struct renesas_fw_entry *entry = renesas_needs_fw_dl(dev); + u16 fw_version_pointer; + u16 fw_version; + + if (!entry) + return -EINVAL; + + /* + * The Firmware's Data Format is describe in + * "6.3 Data Format" R19UH0078EJ0500 Rev.5.00 page 124 + */ + + /* "Each row is 8 bytes". => firmware size must be a multiple of 8. */ + if (length % 8 != 0) + dev_warn(&dev->dev, "firmware size is not a multiple of 8."); + + /* + * The bootrom chips of the big brother have sizes up to 64k, let's + * assume that's the biggest the firmware can get. + */ + if (length < 0x1000 || length >= 0x10000) { + dev_err(&dev->dev, "firmware is size %zd is not (4k - 64k).", + length); + return -EINVAL; + } + + /* The First 2 bytes are fixed value (55aa). "LSB on Left" */ + if (get_unaligned_le16(fw_data) != 0x55aa) { + dev_err(&dev->dev, "no valid firmware header found."); + return -EINVAL; + } + + /* verify the firmware version position and print it. */ + fw_version_pointer = get_unaligned_le16(fw_data + 4); + if (fw_version_pointer + 2 >= length) { + dev_err(&dev->dev, + "firmware version pointer is outside of the firmware image."); + return -EINVAL; + } + + fw_version = get_unaligned_le16(fw_data + fw_version_pointer); + dev_dbg(&dev->dev, "got firmware version: %02x.", fw_version); + + if (fw_version != entry->expected_version) { + dev_err(&dev->dev, + "firmware version mismatch, expected version: %02x.", + entry->expected_version); + return -EINVAL; + } + + return 0; +} + +static int renesas_fw_check_running(struct pci_dev *pdev) +{ + int err; + u8 fw_state; + + /* + * Test if the device is actually needing the firmware. As most + * BIOSes will initialize the device for us. If the device is + * initialized. + */ + err = pci_read_config_byte(pdev, 0xF4, &fw_state); + if (err) + return pcibios_err_to_errno(err); + + /* + * Check if "FW Download Lock" is locked. If it is and the FW is + * ready we can simply continue. If the FW is not ready, we have + * to give up. + */ + if (fw_state & BIT(1)) { + dev_dbg(&pdev->dev, "FW Download Lock is engaged."); + + if (fw_state & BIT(4)) + return 0; + + dev_err(&pdev->dev, + "FW Download Lock is set and FW is not ready. Giving Up."); + return -EIO; + } + + /* + * Check if "FW Download Enable" is set. If someone (us?) tampered + * with it and it can't be resetted, we have to give up too... and + * ask for a forgiveness and a reboot. + */ + if (fw_state & BIT(0)) { + dev_err(&pdev->dev, + "FW Download Enable is stale. Giving Up (poweroff/reboot needed)."); + return -EIO; + } + + /* Otherwise, Check the "Result Code" Bits (6:4) and act accordingly */ + switch ((fw_state & 0x70)) { + case 0: /* No result yet */ + dev_dbg(&pdev->dev, "FW is not ready/loaded yet."); + + /* tell the caller, that this device needs the firmware. */ + return 1; + + case BIT(4): /* Success, device should be working. */ + dev_dbg(&pdev->dev, "FW is ready."); + return 0; + + case BIT(5): /* Error State */ + dev_err(&pdev->dev, + "hardware is in an error state. Giving up (poweroff/reboot needed)."); + return -ENODEV; + + default: /* All other states are marked as "Reserved states" */ + dev_err(&pdev->dev, + "hardware is in an invalid state %x. Giving up (poweroff/reboot needed).", + (fw_state & 0x70) >> 4); + return -EINVAL; + } +} + +static int renesas_fw_download(struct pci_dev *pdev, + const struct firmware *fw) +{ + const u32 *fw_data = (const u32 *)fw->data; + size_t i; + int err; + u8 fw_status; + + /* + * For more information and the big picture: please look at the + * "Firmware Download Sequence" in "7.1 FW Download Interface" + * of R19UH0078EJ0500 Rev.5.00 page 131 + */ + + /* + * 0. Set "FW Download Enable" bit in the + * "FW Download Control & Status Register" at 0xF4 + */ + err = pci_write_config_byte(pdev, 0xF4, BIT(0)); + if (err) + return pcibios_err_to_errno(err); + + /* 1 - 10 follow one step after the other. */ + for (i = 0; i < fw->size / 4; i++) { + err = renesas_fw_download_image(pdev, fw_data, i); + if (err) { + dev_err(&pdev->dev, + "Firmware Download Step %zd failed at position %zd bytes with (%d).", + i, i * 4, err); + return err; + } + } + + /* + * This sequence continues until the last data is written to + * "DATA0" or "DATA1". Naturally, we wait until "SET DATA0/1" + * is cleared by the hardware beforehand. + */ + for (i = 0; i < RENESAS_RETRY; i++) { + err = pci_read_config_byte(pdev, 0xF5, &fw_status); + if (err) + return pcibios_err_to_errno(err); + if (!(fw_status & (BIT(0) | BIT(1)))) + break; + + udelay(RENESAS_DELAY); + } + if (i == RENESAS_RETRY) + dev_warn(&pdev->dev, "Final Firmware Download step timed out."); + + /* + * 11. After finishing writing the last data of FW, the + * System Software must clear "FW Download Enable" + */ + err = pci_write_config_byte(pdev, 0xF4, 0); + if (err) + return pcibios_err_to_errno(err); + + /* 12. Read "Result Code" and confirm it is good. */ + for (i = 0; i < RENESAS_RETRY; i++) { + err = pci_read_config_byte(pdev, 0xF4, &fw_status); + if (err) + return pcibios_err_to_errno(err); + if (fw_status & BIT(4)) + break; + + udelay(RENESAS_DELAY); + } + if (i == RENESAS_RETRY) { + /* Timed out / Error - let's see if we can fix this */ + err = renesas_fw_check_running(pdev); + switch (err) { + case 0: /* + * we shouldn't end up here. + * maybe it took a little bit longer. + * But all should be well? + */ + break; + + case 1: /* (No result yet! */ + return -ETIMEDOUT; + + default: + return err; + } + } + /* + * Optional last step: Engage Firmware Lock + * + * err = pci_write_config_byte(pdev, 0xF4, BIT(2)); + * if (err) + * return pcibios_err_to_errno(err); + */ + + return 0; +} + +struct renesas_fw_ctx { + struct pci_dev *pdev; + const struct pci_device_id *id; + bool resume; +}; + +static int xhci_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *id); + +static void renesas_fw_callback(const struct firmware *fw, + void *context) +{ + struct renesas_fw_ctx *ctx = context; + struct pci_dev *pdev = ctx->pdev; + struct device *parent = pdev->dev.parent; + int err; + + if (!fw) { + dev_err(&pdev->dev, "firmware failed to load\n"); + + goto cleanup; + } + + err = renesas_fw_verify(pdev, fw->data, fw->size); + if (err) + goto cleanup; + + err = renesas_fw_download(pdev, fw); + release_firmware(fw); + if (err) { + dev_err(&pdev->dev, "firmware failed to download (%d).", err); + goto cleanup; + } + if (ctx->resume) + return; + + err = xhci_pci_probe(pdev, ctx->id); + if (!err) { + /* everything worked */ + devm_kfree(&pdev->dev, ctx); + return; + } + +cleanup: + /* in case of an error - fall through */ + dev_info(&pdev->dev, "Unloading driver"); + + if (parent) + device_lock(parent); + + device_release_driver(&pdev->dev); + + if (parent) + device_unlock(parent); + + pci_dev_put(pdev); +} + +static int renesas_fw_alive_check(struct pci_dev *pdev) +{ + const struct renesas_fw_entry *entry; + + /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */ + entry = renesas_needs_fw_dl(pdev); + if (!entry) + return 0; + + return renesas_fw_check_running(pdev); +} + +static int renesas_fw_download_to_hw(struct pci_dev *pdev, + const struct pci_device_id *id, + bool do_resume) +{ + const struct renesas_fw_entry *entry; + struct renesas_fw_ctx *ctx; + int err; + + /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */ + entry = renesas_needs_fw_dl(pdev); + if (!entry) + return 0; + + err = renesas_fw_check_running(pdev); + /* Continue ahead, if the firmware is already running. */ + if (err == 0) + return 0; + + if (err != 1) + return err; + + ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + ctx->pdev = pdev; + ctx->resume = do_resume; + ctx->id = id; + + pci_dev_get(pdev); + err = request_firmware_nowait(THIS_MODULE, 1, entry->firmware_name, + &pdev->dev, GFP_KERNEL, + ctx, renesas_fw_callback); + if (err) { + pci_dev_put(pdev); + return err; + } + + /* + * The renesas_fw_callback() callback will continue the probe + * process, once it aquires the firmware. + */ + return 1; +} + /* called during probe() after chip reset completes */ static int xhci_pci_setup(struct usb_hcd *hcd) { @@ -317,6 +749,22 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) struct hc_driver *driver; struct usb_hcd *hcd; + /* + * Check if this device is a RENESAS uPD720201/2 device. + * Otherwise, we can continue with xhci_pci_probe as usual. + */ + retval = renesas_fw_download_to_hw(dev, id, false); + switch (retval) { + case 0: + break; + + case 1: /* let it load the firmware and recontinue the probe. */ + return 0; + + default: + return retval; + }; + driver = (struct hc_driver *)id->driver_data; /* Prevent runtime suspending between USB-2 and USB-3 initialization */ @@ -381,6 +829,16 @@ static void xhci_pci_remove(struct pci_dev *dev) { struct xhci_hcd *xhci; + if (renesas_fw_alive_check(dev)) { + /* + * bail out early, if this was a renesas device w/o FW. + * Else we might hit the NMI watchdog in xhci_handsake + * during xhci_reset as part of the driver's unloading. + * which we forced in the renesas_fw_callback(). + */ + return; + } + xhci = hcd_to_xhci(pci_get_drvdata(dev)); xhci->xhc_state |= XHCI_STATE_REMOVING; From patchwork Fri Jun 21 08:59:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 167373 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp466006ilk; Fri, 21 Jun 2019 02:02:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqwpC2JdbJmjFA2NfDDFCUms6mcBCwnjrQ2qmh3FzhtHSa0EPznjQ34AjfeeSNZ6wYQBCe7K X-Received: by 2002:a17:90a:3aed:: with SMTP id b100mr5220233pjc.63.1561107768545; Fri, 21 Jun 2019 02:02:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561107768; cv=none; d=google.com; s=arc-20160816; b=DM206Xuuq22/RUPbJarohnvsQLPUHyKpWBljvitKgq9EYSQFLT51pFHszk4GP8sIeT a6ebEOZCH0Z7V4IfawqJsjYP18gHNco4pkkETgvARCJC/LRLSg+sSfry8uWhS+vCj2Oa 3SzOCb4ClC8X5gLq4mrEoCng0TBkQCTmV5HK3pDbAp7kP0DZcp3BqSPCpBpT+uhtZSig 5orRFc+vErDXJIfuuwv0+4DnHoErtEQnmjnVHG1phmH8Q8ZU4IA+B27fmEmslkeoXrxN jbHo9G86oIN6pEvVMN3OEAHJYXu4FReiENprPQ82BUbZ4JNamffkKUxfDUpDMeZ1KsMc kvNw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id f63si2172362plf.224.2019.06.21.02.02.48; Fri, 21 Jun 2019 02:02:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=edLp6MNc; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726297AbfFUJCr (ORCPT + 15 others); Fri, 21 Jun 2019 05:02:47 -0400 Received: from mail.kernel.org ([198.145.29.99]:39410 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726372AbfFUJCr (ORCPT ); Fri, 21 Jun 2019 05:02:47 -0400 Received: from localhost.localdomain (unknown [106.201.116.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BC97921530; Fri, 21 Jun 2019 09:02:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1561107766; bh=pphLpYEfEVlyNuqWtUX8Ont2QDuBs7uGJhwR5NOhnLQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=edLp6MNc85x8UFG4rOQQHLza1skHJOnv2RCEwnTlf0ZKPQT3iUB5tLNUqHT9+HFSk S4N6Q4t0+BJuOVzP8RlJNxb4jwprZ2Pu0jSB1c8332ja4UumQyABjzI6SPoZjVzznc yL7lTOQShPLyJeOrM3oONCcWcF/NWPbHrfyzaK3E= From: Vinod Koul To: Mathias Nyman , Greg Kroah-Hartman Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , Yoshihiro Shimoda , Christian Lamparter , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/5] usb: xhci: Add ROM loader for uPD720201 Date: Fri, 21 Jun 2019 14:29:12 +0530 Message-Id: <20190621085913.8722-5-vkoul@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190621085913.8722-1-vkoul@kernel.org> References: <20190621085913.8722-1-vkoul@kernel.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org uPD720201 supports ROM and allows software to program the ROM and boot from it. Add support for detecting if ROM is present, if so load the ROM if not programmed earlier. Signed-off-by: Vinod Koul Cc: Yoshihiro Shimoda Cc: Christian Lamparter --- drivers/usb/host/xhci-pci.c | 357 ++++++++++++++++++++++++++++++++++++ 1 file changed, 357 insertions(+) -- 2.20.1 diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index d9081fe7ed6c..771948ce3d38 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -78,6 +78,20 @@ #define RENESAS_FW_STATUS_SET_DATA0 BIT(8) #define RENESAS_FW_STATUS_SET_DATA1 BIT(9) +#define RENESAS_ROM_STATUS_ACCESS BIT(0) +#define RENESAS_ROM_STATUS_ERASE BIT(1) +#define RENESAS_ROM_STATUS_RELOAD BIT(2) +#define RENESAS_ROM_STATUS_RESULT GENMASK(6, 4) + #define RENESAS_ROM_STATUS_INVALID 0 + #define RENESAS_ROM_STATUS_SUCCESS BIT(4) + #define RENESAS_ROM_STATUS_ERROR BIT(5) +#define RENESAS_ROM_STATUS_SET_DATA0 BIT(8) +#define RENESAS_ROM_STATUS_SET_DATA1 BIT(9) +#define RENESAS_ROM_STATUS_ROM_EXISTS BIT(15) + +#define RENESAS_ROM_ERASE_MAGIC 0x5A65726F +#define RENESAS_ROM_WRITE_MAGIC 0x53524F4D + #define RENESAS_RETRY 1000 #define RENESAS_DELAY 10 @@ -458,11 +472,79 @@ static int renesas_fw_verify(struct pci_dev *dev, return 0; } +static int renesas_check_rom_state(struct pci_dev *pdev) +{ + const struct renesas_fw_entry *entry; + u16 rom_state; + u32 version; + bool valid_version = false; + int err, i; + + /* check FW version */ + err = pci_read_config_dword(pdev, RENESAS_FW_VERSION, &version); + if (err) + return pcibios_err_to_errno(err); + + version &= RENESAS_FW_VERSION_FIELD; + version = version >> RENESAS_FW_VERSION_OFFSET; + dev_dbg(&pdev->dev, "Found FW version loaded is %x\n", version); + + /* treat version in renesas_fw_table as correct ones */ + for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) { + entry = &renesas_fw_table[i]; + if (version == entry->expected_version) { + dev_dbg(&pdev->dev, "Detected valid ROM version..\n"); + valid_version = true; + } + } + + /* + * Test if ROM is present and loaded, if so we can skip everything + */ + err = pci_read_config_word(pdev, RENESAS_ROM_STATUS, &rom_state); + if (err) + return pcibios_err_to_errno(err); + + if (rom_state & BIT(15)) { + /* ROM exists */ + dev_dbg(&pdev->dev, "ROM exists\n"); + + /* Check the "Result Code" Bits (6:4) and act accordingly */ + switch (rom_state & RENESAS_ROM_STATUS_RESULT) { + case RENESAS_ROM_STATUS_SUCCESS: + dev_dbg(&pdev->dev, "Success ROM load..."); + /* we have valid version and status so success */ + if (valid_version) + return 0; + break; + + case RENESAS_ROM_STATUS_INVALID: /* No result yet */ + dev_dbg(&pdev->dev, "No result as it is ROM..."); + /* we have valid version and status so success */ + if (valid_version) + return 0; + break; + + case RENESAS_ROM_STATUS_ERROR: /* Error State */ + default: /* All other states are marked as "Reserved states" */ + dev_err(&pdev->dev, "Invalid ROM.."); + break; + } + } + + return -EIO; +} + static int renesas_fw_check_running(struct pci_dev *pdev) { int err; u8 fw_state; + /* Check if device has ROM and loaded, if so skip everything */ + err = renesas_check_rom_state(pdev); + if (!err) + return err; + /* * Test if the device is actually needing the firmware. As most * BIOSes will initialize the device for us. If the device is @@ -632,12 +714,261 @@ struct renesas_fw_ctx { static int xhci_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id); +static bool renesas_check_rom(struct pci_dev *pdev) +{ + u16 rom_status; + int retval; + + /* 1. Check if external ROM exists */ + retval = pci_read_config_word(pdev, RENESAS_ROM_STATUS, &rom_status); + if (retval) + return false; + + rom_status &= RENESAS_ROM_STATUS_ROM_EXISTS; + if (rom_status) { + dev_dbg(&pdev->dev, "External ROM exists\n"); + return true; /* External ROM exists */ + } + + return false; +} + +static void renesas_rom_erase(struct pci_dev *pdev) +{ + int retval, i; + u8 status; + + dev_dbg(&pdev->dev, "Performing ROM Erase...\n"); + retval = pci_write_config_dword(pdev, RENESAS_DATA0, + RENESAS_ROM_ERASE_MAGIC); + if (retval) { + dev_err(&pdev->dev, "ROM erase, magic word write failed: %d\n", + pcibios_err_to_errno(retval)); + return; + } + + retval = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status); + if (retval) { + dev_err(&pdev->dev, "ROM status read failed: %d\n", + pcibios_err_to_errno(retval)); + return; + } + status |= RENESAS_ROM_STATUS_ERASE; + retval = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, status); + if (retval) { + dev_err(&pdev->dev, "ROM erase set word write failed\n"); + return; + } + + /* sleep a bit while ROM is erased */ + msleep(20); + + for (i = 0; i < RENESAS_RETRY; i++) { + retval = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, + &status); + status &= RENESAS_ROM_STATUS_ERASE; + if (!status) + break; + + mdelay(RENESAS_DELAY); + } + + if (i == RENESAS_RETRY) + dev_dbg(&pdev->dev, "Chip erase timedout: %x\n", status); + + dev_dbg(&pdev->dev, "ROM Erase... Done success\n"); +} + +static bool renesas_download_rom(struct pci_dev *pdev, + const u32 *fw, size_t step) +{ + bool data0_or_data1; + u8 fw_status; + size_t i; + int err; + + /* + * The hardware does alternate between two 32-bit pages. + * (This is because each row of the firmware is 8 bytes). + * + * for even steps we use DATA0, for odd steps DATA1. + */ + data0_or_data1 = (step & 1) == 1; + + /* Read "Set DATAX" and confirm it is cleared. */ + for (i = 0; i < RENESAS_RETRY; i++) { + err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS_MSB, + &fw_status); + if (err) { + dev_err(&pdev->dev, "Read ROM Status failed: %d\n", + pcibios_err_to_errno(err)); + return false; + } + if (!(fw_status & BIT(data0_or_data1))) + break; + + udelay(RENESAS_DELAY); + } + if (i == RENESAS_RETRY) { + dev_err(&pdev->dev, "Timeout for Set DATAX step: %zd\n", step); + return false; + } + + /* + * Write FW data to "DATAX". + * "LSB is left" => force little endian + */ + err = pci_write_config_dword(pdev, data0_or_data1 ? + RENESAS_DATA1 : RENESAS_DATA0, + (__force u32)cpu_to_le32(fw[step])); + if (err) { + dev_err(&pdev->dev, "Write to DATAX failed: %d\n", + pcibios_err_to_errno(err)); + return false; + } + + udelay(100); + + /* Set "Set DATAX". */ + err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS_MSB, + BIT(data0_or_data1)); + if (err) { + dev_err(&pdev->dev, "Write config for DATAX failed: %d\n", + pcibios_err_to_errno(err)); + return false; + } + + return true; +} + +static bool renesas_setup_rom(struct pci_dev *pdev, const struct firmware *fw) +{ + const u32 *fw_data = (const u32 *)fw->data; + int err, i; + u8 status; + + /* 2. Write magic word to Data0 */ + err = pci_write_config_dword(pdev, RENESAS_DATA0, + RENESAS_ROM_WRITE_MAGIC); + if (err) + return false; + + /* 3. Set External ROM access */ + err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, + RENESAS_ROM_STATUS_ACCESS); + if (err) + goto remove_bypass; + + /* 4. Check the result */ + err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status); + if (err) + goto remove_bypass; + status &= GENMASK(6, 4); + if (status) { + dev_err(&pdev->dev, + "setting external rom failed: %x\n", status); + goto remove_bypass; + } + + /* 5 to 16 Write FW to DATA0/1 while checking SetData0/1 */ + for (i = 0; i < fw->size / 4; i++) { + err = renesas_download_rom(pdev, fw_data, i); + if (!err) { + dev_err(&pdev->dev, + "ROM Download Step %d failed at position %d bytes\n", + i, i * 4); + goto remove_bypass; + } + } + + /* + * wait till DATA0/1 is cleared + */ + for (i = 0; i < RENESAS_RETRY; i++) { + err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS_MSB, + &status); + if (err) + goto remove_bypass; + if (!(status & (BIT(0) | BIT(1)))) + break; + + udelay(RENESAS_DELAY); + } + if (i == RENESAS_RETRY) { + dev_err(&pdev->dev, "Final Firmware ROM Download step timed out\n"); + goto remove_bypass; + } + + /* 17. Remove bypass */ + err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, 0); + if (err) + return false; + + udelay(10); + + /* 18. check result */ + for (i = 0; i < RENESAS_RETRY; i++) { + err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status); + if (err) { + dev_err(&pdev->dev, "Read ROM status failed:%d\n", + pcibios_err_to_errno(err)); + return false; + } + status &= RENESAS_ROM_STATUS_RESULT; + if (status == RENESAS_ROM_STATUS_SUCCESS) { + dev_dbg(&pdev->dev, "Download ROM success\n"); + break; + } + udelay(RENESAS_DELAY); + } + if (i == RENESAS_RETRY) { /* Timed out */ + dev_err(&pdev->dev, + "Download to external ROM TO: %x\n", status); + return false; + } + + dev_dbg(&pdev->dev, "Download to external ROM scuceeded\n"); + + /* Last step set Reload */ + err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, + RENESAS_ROM_STATUS_RELOAD); + if (err) { + dev_err(&pdev->dev, "Set ROM execute failed: %d\n", + pcibios_err_to_errno(err)); + return false; + } + + /* + * wait till Reload is cleared + */ + for (i = 0; i < RENESAS_RETRY; i++) { + err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status); + if (err) + return false; + if (!(status & RENESAS_ROM_STATUS_RELOAD)) + break; + + udelay(RENESAS_DELAY); + } + if (i == RENESAS_RETRY) { + dev_err(&pdev->dev, "ROM Exec timed out: %x\n", status); + return false; + } + + return true; + +remove_bypass: + pci_write_config_byte(pdev, RENESAS_ROM_STATUS, 0); + return false; +} + static void renesas_fw_callback(const struct firmware *fw, void *context) { struct renesas_fw_ctx *ctx = context; struct pci_dev *pdev = ctx->pdev; struct device *parent = pdev->dev.parent; + bool rom; int err; if (!fw) { @@ -650,12 +981,33 @@ static void renesas_fw_callback(const struct firmware *fw, if (err) goto cleanup; + /* Check if the device has external ROM */ + rom = renesas_check_rom(pdev); + if (rom) { + /* perfrom chip erase first */ + renesas_rom_erase(pdev); + + /* lets try loading fw on ROM first */ + rom = renesas_setup_rom(pdev, fw); + if (!rom) { + dev_err(&pdev->dev, + "ROM load failed, falling back on FW load\n"); + } else { + dev_dbg(&pdev->dev, "ROM load done..\n"); + + release_firmware(fw); + goto do_probe; + } + } + err = renesas_fw_download(pdev, fw); release_firmware(fw); if (err) { dev_err(&pdev->dev, "firmware failed to download (%d).", err); goto cleanup; } + +do_probe: if (ctx->resume) return; @@ -757,6 +1109,11 @@ static int renesas_check_if_fw_dl_is_needed(struct pci_dev *pdev) (pdev->revision == 0x02 || pdev->revision == 0x03))))) return 0; + /* Check if device has ROM and loaded, if so skip everything */ + err = renesas_check_rom_state(pdev); + if (!err) + return err; + /* * Test if the firmware was uploaded and is running. * As most BIOSes will initialize the device for us.