From patchwork Sun Jun 25 14:21:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Farber, Eliav" X-Patchwork-Id: 696305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66548EB64DC for ; Sun, 25 Jun 2023 14:21:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230318AbjFYOVo (ORCPT ); Sun, 25 Jun 2023 10:21:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51982 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230309AbjFYOVm (ORCPT ); Sun, 25 Jun 2023 10:21:42 -0400 Received: from smtp-fw-9105.amazon.com (smtp-fw-9105.amazon.com [207.171.188.204]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FEC91B1; Sun, 25 Jun 2023 07:21:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1687702902; x=1719238902; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=K9olSALxwiqvfXFwnOq4yhThTzE4wPH5nlr+cWBRTlc=; b=SDJIQhpc1bN1h3cyiCuMKxM5viemm/wEDp84rSIuQ1Pq8PfMwmjEI+XB UpY3w7fqJ2j+8q3qD2a6Y7wzbbVOlEC3f6u2RrXQJkk611Ntp6y9Uw9Lt Cyz1J7ZeKQsQ6VwAheq1rq3taYTJtq5s36enZri+g8J2R8ecgFJEYF28B A=; X-IronPort-AV: E=Sophos;i="6.01,157,1684800000"; d="scan'208";a="656892651" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO email-inbound-relay-pdx-2c-m6i4x-e7094f15.us-west-2.amazon.com) ([10.25.36.214]) by smtp-border-fw-9105.sea19.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2023 14:21:37 +0000 Received: from EX19MTAUWC002.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan2.pdx.amazon.com [10.236.137.194]) by email-inbound-relay-pdx-2c-m6i4x-e7094f15.us-west-2.amazon.com (Postfix) with ESMTPS id B89B740D61; Sun, 25 Jun 2023 14:21:35 +0000 (UTC) Received: from EX19D013UWB003.ant.amazon.com (10.13.138.111) by EX19MTAUWC002.ant.amazon.com (10.250.64.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Sun, 25 Jun 2023 14:21:34 +0000 Received: from EX19MTAUWA001.ant.amazon.com (10.250.64.204) by EX19D013UWB003.ant.amazon.com (10.13.138.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Sun, 25 Jun 2023 14:21:34 +0000 Received: from dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (172.19.116.181) by mail-relay.amazon.com (10.250.64.204) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sun, 25 Jun 2023 14:21:34 +0000 Received: by dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (Postfix, from userid 14301484) id 115AC5AA; Sun, 25 Jun 2023 14:21:34 +0000 (UTC) From: Eliav Farber To: , , , , , , CC: , , , , , , , Subject: [PATCH 1/5] pps: add pulse-width calculation in nsec Date: Sun, 25 Jun 2023 14:21:30 +0000 Message-ID: <20230625142134.33690-2-farbere@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625142134.33690-1-farbere@amazon.com> References: <20230625142134.33690-1-farbere@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This change adds PPS pulse-width calculation in nano seconds. Width time can be calculated for both assert time and reset time. Calculation can be done only if capture ASSERT and capture CLEAR modes are both enabled. Assert width is calculated as: clear-time - assert-time and clear width is calculated as: assert-time - clear-time Read-only sysfs were added to get the last pulse-width time and event sequence. Examples: * cat /sys/class/pps/pps0/pulse_width_assert 20001450#85 * cat /sys/class/pps/pps1/pulse_width_clear 979893314#16 Signed-off-by: Eliav Farber --- drivers/pps/kapi.c | 49 ++++++++++++++++++++++++++++++++++++++ drivers/pps/pps.c | 9 +++++++ drivers/pps/sysfs.c | 30 +++++++++++++++++++++++ include/linux/pps_kernel.h | 3 +++ include/uapi/linux/pps.h | 19 +++++++++++++++ 5 files changed, 110 insertions(+) diff --git a/drivers/pps/kapi.c b/drivers/pps/kapi.c index d9d566f70ed1..deeecfc0a3ee 100644 --- a/drivers/pps/kapi.c +++ b/drivers/pps/kapi.c @@ -82,6 +82,14 @@ struct pps_device *pps_register_source(struct pps_source_info *info, goto pps_register_source_exit; } + if ((info->mode & PPS_WIDTHBOTH) && + ((info->mode & PPS_CAPTUREBOTH) != PPS_CAPTUREBOTH)) { + pr_err("%s: width can't be calculated without both captures (mode = 0x%x)\n", + info->name, info->mode); + err = -EINVAL; + goto pps_register_source_exit; + } + /* Allocate memory for the new PPS source struct */ pps = kzalloc(sizeof(struct pps_device), GFP_KERNEL); if (pps == NULL) { @@ -143,6 +151,39 @@ void pps_unregister_source(struct pps_device *pps) } EXPORT_SYMBOL(pps_unregister_source); +static u64 pps_ktime_sub(struct pps_ktime *ts1, struct pps_ktime *ts2) +{ + if (ts1->sec == ts2->sec) + return (ts1->nsec > ts2->nsec) ? (ts1->nsec - ts2->nsec) : (ts2->nsec - ts1->nsec); + + if (ts1->sec > ts2->sec) + return (ts1->sec - ts2->sec) * NSEC_PER_SEC + ts1->nsec - ts2->nsec; + + return (ts2->sec - ts1->sec) * NSEC_PER_SEC + ts2->nsec - ts1->nsec; +} + +static void pps_calc_clear_width(struct pps_device *pps) +{ + if (pps->clear_sequence == 0) + return; + + pps->clear_width.sequence++; + pps->clear_width.nsec = pps_ktime_sub(&pps->assert_tu, &pps->clear_tu); + dev_dbg(pps->dev, "PPS clear width = %llu#%u\n", + pps->clear_width.nsec, pps->clear_width.sequence); +} + +static void pps_calc_assert_width(struct pps_device *pps) +{ + if (pps->assert_sequence == 0) + return; + + pps->assert_width.sequence++; + pps->assert_width.nsec = pps_ktime_sub(&pps->clear_tu, &pps->assert_tu); + dev_dbg(pps->dev, "PPS assert width = %llu#%u\n", + pps->assert_width.nsec, pps->assert_width.sequence); +} + /* pps_event - register a PPS event into the system * @pps: the PPS device * @ts: the event timestamp @@ -191,6 +232,10 @@ void pps_event(struct pps_device *pps, struct pps_event_time *ts, int event, dev_dbg(pps->dev, "capture assert seq #%u\n", pps->assert_sequence); + /* Calculate clear pulse-width */ + if (pps->params.mode & PPS_WIDTHCLEAR) + pps_calc_clear_width(pps); + captured = ~0; } if (event & pps->params.mode & PPS_CAPTURECLEAR) { @@ -205,6 +250,10 @@ void pps_event(struct pps_device *pps, struct pps_event_time *ts, int event, dev_dbg(pps->dev, "capture clear seq #%u\n", pps->clear_sequence); + /* Calculate assert pulse-width */ + if (pps->params.mode & PPS_WIDTHASSERT) + pps_calc_assert_width(pps); + captured = ~0; } diff --git a/drivers/pps/pps.c b/drivers/pps/pps.c index 5d19baae6a38..8299a272af11 100644 --- a/drivers/pps/pps.c +++ b/drivers/pps/pps.c @@ -195,6 +195,11 @@ static long pps_cdev_ioctl(struct file *file, fdata.info.clear_tu = pps->clear_tu; fdata.info.current_mode = pps->current_mode; + memcpy(&fdata.info.assert_width, &pps->assert_width, + sizeof(struct pps_kwidth)); + memcpy(&fdata.info.clear_width, &pps->clear_width, + sizeof(struct pps_kwidth)); + spin_unlock_irq(&pps->lock); err = copy_to_user(uarg, &fdata, sizeof(struct pps_fdata)); @@ -283,6 +288,10 @@ static long pps_cdev_compat_ioctl(struct file *file, sizeof(struct pps_ktime_compat)); memcpy(&compat.info.clear_tu, &pps->clear_tu, sizeof(struct pps_ktime_compat)); + memcpy(&compat.info.assert_width, &pps->assert_width, + sizeof(struct pps_kwidth_compat)); + memcpy(&compat.info.clear_width, &pps->clear_width, + sizeof(struct pps_kwidth_compat)); spin_unlock_irq(&pps->lock); diff --git a/drivers/pps/sysfs.c b/drivers/pps/sysfs.c index 134bc33f6ad0..3e34de77dba6 100644 --- a/drivers/pps/sysfs.c +++ b/drivers/pps/sysfs.c @@ -79,6 +79,34 @@ static ssize_t path_show(struct device *dev, struct device_attribute *attr, } static DEVICE_ATTR_RO(path); +static ssize_t pulse_width_assert_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct pps_device *pps = dev_get_drvdata(dev); + + if (!(pps->info.mode & PPS_WIDTHASSERT)) + return 0; + + return sprintf(buf, "%llu#%u\n", + pps->assert_width.nsec, pps->assert_width.sequence); +} +static DEVICE_ATTR_RO(pulse_width_assert); + +static ssize_t pulse_width_clear_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct pps_device *pps = dev_get_drvdata(dev); + + if (!(pps->info.mode & PPS_WIDTHCLEAR)) + return 0; + + return sprintf(buf, "%llu#%u\n", + pps->clear_width.nsec, pps->clear_width.sequence); +} +static DEVICE_ATTR_RO(pulse_width_clear); + static struct attribute *pps_attrs[] = { &dev_attr_assert.attr, &dev_attr_clear.attr, @@ -86,6 +114,8 @@ static struct attribute *pps_attrs[] = { &dev_attr_echo.attr, &dev_attr_name.attr, &dev_attr_path.attr, + &dev_attr_pulse_width_assert.attr, + &dev_attr_pulse_width_clear.attr, NULL, }; diff --git a/include/linux/pps_kernel.h b/include/linux/pps_kernel.h index 78c8ac4951b5..15f2338095c6 100644 --- a/include/linux/pps_kernel.h +++ b/include/linux/pps_kernel.h @@ -51,6 +51,9 @@ struct pps_device { struct pps_ktime clear_tu; int current_mode; /* PPS mode at event time */ + struct pps_kwidth assert_width; /* PPS assert pulse-width time and event seq # */ + struct pps_kwidth clear_width; /* PPS clear pulse-width time and event seq # */ + unsigned int last_ev; /* last PPS event id */ wait_queue_head_t queue; /* PPS event queue */ diff --git a/include/uapi/linux/pps.h b/include/uapi/linux/pps.h index 009ebcd8ced5..dd93dac0afc1 100644 --- a/include/uapi/linux/pps.h +++ b/include/uapi/linux/pps.h @@ -64,12 +64,24 @@ struct pps_ktime_compat { } __attribute__((packed, aligned(4))); #define PPS_TIME_INVALID (1<<0) /* used to specify timeout==NULL */ +struct pps_kwidth { + __u64 nsec; + __u32 sequence; +}; + +struct pps_kwidth_compat { + __u64 nsec; + __u32 sequence; +} __attribute__((packed, aligned(4))); + struct pps_kinfo { __u32 assert_sequence; /* seq. num. of assert event */ __u32 clear_sequence; /* seq. num. of clear event */ struct pps_ktime assert_tu; /* time of assert event */ struct pps_ktime clear_tu; /* time of clear event */ int current_mode; /* current mode bits */ + struct pps_kwidth assert_width; /* assert pulse-width time and seq. num. */ + struct pps_kwidth clear_width; /* clear pulse-width time and seq. num. */ }; struct pps_kinfo_compat { @@ -78,6 +90,8 @@ struct pps_kinfo_compat { struct pps_ktime_compat assert_tu; /* time of assert event */ struct pps_ktime_compat clear_tu; /* time of clear event */ int current_mode; /* current mode bits */ + struct pps_kwidth_compat assert_width; /* assert pulse-width time and seq. num. */ + struct pps_kwidth_compat clear_width; /* clear pulse-width time and seq. num. */ }; struct pps_kparams { @@ -96,6 +110,11 @@ struct pps_kparams { #define PPS_CAPTURECLEAR 0x02 /* capture clear events */ #define PPS_CAPTUREBOTH 0x03 /* capture assert and clear events */ +/* Pulse-width calculation */ +#define PPS_WIDTHASSERT 0x04 /* calculate assert width */ +#define PPS_WIDTHCLEAR 0x08 /* calculate clear width */ +#define PPS_WIDTHBOTH 0x0c /* calculate assert and clear width */ + #define PPS_OFFSETASSERT 0x10 /* apply compensation for assert event */ #define PPS_OFFSETCLEAR 0x20 /* apply compensation for clear event */ From patchwork Sun Jun 25 14:21:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Farber, Eliav" X-Patchwork-Id: 696307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A018EB64DC for ; Sun, 25 Jun 2023 14:21:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230185AbjFYOVl (ORCPT ); Sun, 25 Jun 2023 10:21:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229537AbjFYOVk (ORCPT ); Sun, 25 Jun 2023 10:21:40 -0400 Received: from smtp-fw-52005.amazon.com (smtp-fw-52005.amazon.com [52.119.213.156]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7558E43; Sun, 25 Jun 2023 07:21:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; 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Sun, 25 Jun 2023 14:21:34 +0000 Received: from EX19MTAUEB001.ant.amazon.com (10.252.135.35) by EX19D040EUB004.ant.amazon.com (10.252.61.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Sun, 25 Jun 2023 14:21:34 +0000 Received: from dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (172.19.116.181) by mail-relay.amazon.com (10.252.135.35) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sun, 25 Jun 2023 14:21:34 +0000 Received: by dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (Postfix, from userid 14301484) id 153DE4F0C; Sun, 25 Jun 2023 14:21:34 +0000 (UTC) From: Eliav Farber To: , , , , , , CC: , , , , , , , Subject: [PATCH 2/5] dt-bindings: pps: pps-gpio: introduce capture-clear property Date: Sun, 25 Jun 2023 14:21:31 +0000 Message-ID: <20230625142134.33690-3-farbere@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625142134.33690-1-farbere@amazon.com> References: <20230625142134.33690-1-farbere@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a new optional "capture-clear" boolean property. When present, PPS clear events shall also be reported. Signed-off-by: Eliav Farber --- Documentation/devicetree/bindings/pps/pps-gpio.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pps/pps-gpio.txt b/Documentation/devicetree/bindings/pps/pps-gpio.txt index 9012a2a02e14..8d588e38c44e 100644 --- a/Documentation/devicetree/bindings/pps/pps-gpio.txt +++ b/Documentation/devicetree/bindings/pps/pps-gpio.txt @@ -14,6 +14,10 @@ Additional required properties for the PPS ECHO functionality: Optional properties: - assert-falling-edge: when present, assert is indicated by a falling edge (instead of by a rising edge) +- capture-clear: when present, report also PPS clear events, which is the + opposite of the assert edge (if assert is rising-edge then + clear is falling-edge and if assert is falling-edge then + clear is rising-edge). Example: pps { From patchwork Sun Jun 25 14:21:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Farber, Eliav" X-Patchwork-Id: 696666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2FD72C001B1 for ; Sun, 25 Jun 2023 14:21:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230307AbjFYOVm (ORCPT ); Sun, 25 Jun 2023 10:21:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230179AbjFYOVl (ORCPT ); Sun, 25 Jun 2023 10:21:41 -0400 Received: from smtp-fw-2101.amazon.com (smtp-fw-2101.amazon.com [72.21.196.25]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FACDE4C; Sun, 25 Jun 2023 07:21:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1687702900; x=1719238900; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hzkmriAJdrDXAPOXkzYgl+u0BMBeF3csMzsxYQTdpVE=; b=v+j4JMfZ7mgF092SNpNm3yrnhkLLXRlEk5L62XHeiEMLTiawXfi6av28 yhX3SXnnZvQo0dj7zx77YGSxrcAAuLaVXyjFDmezGXQjxcPbNswqM7B4r zbejXwDy1uSMCR8gOpkVkvmeCWqBodmRpVGriD/V+15aQsj6bsjKeGg0s o=; X-IronPort-AV: E=Sophos;i="6.01,157,1684800000"; d="scan'208";a="336051270" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-pdx-2c-m6i4x-5eae960a.us-west-2.amazon.com) ([10.43.8.6]) by smtp-border-fw-2101.iad2.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2023 14:21:37 +0000 Received: from EX19D005EUA004.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan3.pdx.amazon.com [10.236.137.198]) by email-inbound-relay-pdx-2c-m6i4x-5eae960a.us-west-2.amazon.com (Postfix) with ESMTPS id EEDCB40AEB; Sun, 25 Jun 2023 14:21:35 +0000 (UTC) Received: from EX19MTAUEA001.ant.amazon.com (10.252.134.203) by EX19D005EUA004.ant.amazon.com (10.252.50.241) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Sun, 25 Jun 2023 14:21:34 +0000 Received: from dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (172.19.116.181) by mail-relay.amazon.com (10.252.134.102) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sun, 25 Jun 2023 14:21:34 +0000 Received: by dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (Postfix, from userid 14301484) id 18A034F0D; Sun, 25 Jun 2023 14:21:34 +0000 (UTC) From: Eliav Farber To: , , , , , , CC: , , , , , , , Subject: [PATCH 3/5] pps: clients: gpio: add option to set capture-clear from device-tree Date: Sun, 25 Jun 2023 14:21:32 +0000 Message-ID: <20230625142134.33690-4-farbere@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625142134.33690-1-farbere@amazon.com> References: <20230625142134.33690-1-farbere@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable capture clear events if "capture-clear" boolean property exists in device-tree. Signed-off-by: Eliav Farber --- drivers/pps/clients/pps-gpio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pps/clients/pps-gpio.c b/drivers/pps/clients/pps-gpio.c index 2f4b11b4dfcd..a61dc1299ce9 100644 --- a/drivers/pps/clients/pps-gpio.c +++ b/drivers/pps/clients/pps-gpio.c @@ -112,6 +112,7 @@ static int pps_gpio_setup(struct device *dev) data->assert_falling_edge = device_property_read_bool(dev, "assert-falling-edge"); + data->capture_clear = device_property_read_bool(dev, "capture-clear"); data->echo_pin = devm_gpiod_get_optional(dev, "echo", GPIOD_OUT_LOW); if (IS_ERR(data->echo_pin)) From patchwork Sun Jun 25 14:21:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Farber, Eliav" X-Patchwork-Id: 696306 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EAEEC001DC for ; Sun, 25 Jun 2023 14:21:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229706AbjFYOVn (ORCPT ); Sun, 25 Jun 2023 10:21:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230229AbjFYOVl (ORCPT ); Sun, 25 Jun 2023 10:21:41 -0400 Received: from smtp-fw-6002.amazon.com (smtp-fw-6002.amazon.com [52.95.49.90]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4EF4E4E; Sun, 25 Jun 2023 07:21:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1687702901; x=1719238901; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xOf7NZnUQximwIOSiAVcKVvthWSLkf2RWP5JPwMyfkM=; b=hlCan534UHgxcqsIhzGCfYS7fTjpM9iVqAOu3rONS9iU7GSRxGXD4hzy gQCa+7xIiRSFeyj4SF5NpC0RuKjcU9Lf59QN3ZPqOt9Wip+FX3/tQ10LL H+G3cO8wQTiaD9BtUZUNZMkfs2T/9k8qYXSjePKhoj8MXfzrctKtvcfzK s=; X-IronPort-AV: E=Sophos;i="6.01,157,1684800000"; d="scan'208";a="340868763" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-pdx-2c-m6i4x-5eae960a.us-west-2.amazon.com) ([10.43.8.6]) by smtp-border-fw-6002.iad6.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2023 14:21:38 +0000 Received: from EX19D005EUB004.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan3.pdx.amazon.com [10.236.137.198]) by email-inbound-relay-pdx-2c-m6i4x-5eae960a.us-west-2.amazon.com (Postfix) with ESMTPS id 6FE8D40BBE; Sun, 25 Jun 2023 14:21:35 +0000 (UTC) Received: from EX19MTAUEB001.ant.amazon.com (10.252.135.35) by EX19D005EUB004.ant.amazon.com (10.252.51.126) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Sun, 25 Jun 2023 14:21:34 +0000 Received: from dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (172.19.116.181) by mail-relay.amazon.com (10.252.135.35) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sun, 25 Jun 2023 14:21:34 +0000 Received: by dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (Postfix, from userid 14301484) id 1C00B4F91; Sun, 25 Jun 2023 14:21:34 +0000 (UTC) From: Eliav Farber To: , , , , , , CC: , , , , , , , Subject: [PATCH 4/5] dt-bindings: pps: pps-gpio: introduce pulse-width properties Date: Sun, 25 Jun 2023 14:21:33 +0000 Message-ID: <20230625142134.33690-5-farbere@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625142134.33690-1-farbere@amazon.com> References: <20230625142134.33690-1-farbere@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add two new optional properties to calculate PPS pulse-width in nano seconds: - assert-pulse-width - clear-pulse-width Signed-off-by: Eliav Farber --- Documentation/devicetree/bindings/pps/pps-gpio.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pps/pps-gpio.txt b/Documentation/devicetree/bindings/pps/pps-gpio.txt index 8d588e38c44e..9ecfd5fb3b63 100644 --- a/Documentation/devicetree/bindings/pps/pps-gpio.txt +++ b/Documentation/devicetree/bindings/pps/pps-gpio.txt @@ -18,6 +18,12 @@ Optional properties: opposite of the assert edge (if assert is rising-edge then clear is falling-edge and if assert is falling-edge then clear is rising-edge). +- assert-pulse-width: when present, assert pulse width will be calculated in + nano seconds. + It should be enabled only if 'capture-clear' is enabled. +- clear-pulse-width: when present, clear pulse width will be calculated in + nano seconds. + It should be enabled only if 'capture-clear' is enabled. Example: pps { From patchwork Sun Jun 25 14:21:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Farber, Eliav" X-Patchwork-Id: 696667 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC2B2C0015E for ; Sun, 25 Jun 2023 14:21:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230280AbjFYOVl (ORCPT ); Sun, 25 Jun 2023 10:21:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229509AbjFYOVk (ORCPT ); Sun, 25 Jun 2023 10:21:40 -0400 Received: from smtp-fw-80009.amazon.com (smtp-fw-80009.amazon.com [99.78.197.220]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CAF051B1; Sun, 25 Jun 2023 07:21:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1687702899; x=1719238899; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MvMgTuAn0uYdFTGp+Tc21ooe+rx3n9Gtbjp0LnEzoh8=; b=GgKMlIDbbeVWYpb8SvoHoqsXCHUOtOPJcGEBCwJ8nexHvGl5hssu3K6P FhiJBn6JPQMhK6vCM7370V7IkFvSKc9HNyIkTRyqPQwG+eOt4tA4Z6mfy 24WNvX1QAylO4QbiWyQU/yG3JYkv7GmfmKqOcmo3P/Zu4rLPF/m6PMgA2 s=; X-IronPort-AV: E=Sophos;i="6.01,157,1684800000"; d="scan'208";a="12280813" Received: from pdx4-co-svc-p1-lb2-vlan3.amazon.com (HELO email-inbound-relay-pdx-2c-m6i4x-fa5fe5fb.us-west-2.amazon.com) ([10.25.36.214]) by smtp-border-fw-80009.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jun 2023 14:21:37 +0000 Received: from EX19D016EUA004.ant.amazon.com (pdx1-ws-svc-p6-lb9-vlan2.pdx.amazon.com [10.236.137.194]) by email-inbound-relay-pdx-2c-m6i4x-fa5fe5fb.us-west-2.amazon.com (Postfix) with ESMTPS id F3A3F40D47; Sun, 25 Jun 2023 14:21:36 +0000 (UTC) Received: from EX19D034EUC001.ant.amazon.com (10.252.61.138) by EX19D016EUA004.ant.amazon.com (10.252.50.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Sun, 25 Jun 2023 14:21:35 +0000 Received: from EX19MTAUEB001.ant.amazon.com (10.252.135.35) by EX19D034EUC001.ant.amazon.com (10.252.61.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Sun, 25 Jun 2023 14:21:35 +0000 Received: from dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (172.19.116.181) by mail-relay.amazon.com (10.252.135.35) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sun, 25 Jun 2023 14:21:35 +0000 Received: by dev-dsk-farbere-1a-46ecabed.eu-west-1.amazon.com (Postfix, from userid 14301484) id 1F5066DA4; Sun, 25 Jun 2023 14:21:34 +0000 (UTC) From: Eliav Farber To: , , , , , , CC: , , , , , , , Subject: [PATCH 5/5] pps: clients: gpio: enable pps pulse-width calculations based on device-tree Date: Sun, 25 Jun 2023 14:21:34 +0000 Message-ID: <20230625142134.33690-6-farbere@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230625142134.33690-1-farbere@amazon.com> References: <20230625142134.33690-1-farbere@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This change adds setting of PPS_WIDTHASSERT and PPS_WIDTHCLEAR modes to enable PPS pulse-width calculation. Width calculation will be enabled if - assert-pulse-width - clear-pulse-width boolean properties exist in device-tree. Signed-off-by: Eliav Farber --- drivers/pps/clients/pps-gpio.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/pps/clients/pps-gpio.c b/drivers/pps/clients/pps-gpio.c index a61dc1299ce9..ca4b8047e924 100644 --- a/drivers/pps/clients/pps-gpio.c +++ b/drivers/pps/clients/pps-gpio.c @@ -33,6 +33,8 @@ struct pps_gpio_device_data { struct timer_list echo_timer; /* timer to reset echo active state */ bool assert_falling_edge; bool capture_clear; + bool assert_pulse_width; + bool clear_pulse_width; unsigned int echo_active_ms; /* PPS echo active duration */ unsigned long echo_timeout; /* timer timeout value in jiffies */ }; @@ -113,6 +115,10 @@ static int pps_gpio_setup(struct device *dev) data->assert_falling_edge = device_property_read_bool(dev, "assert-falling-edge"); data->capture_clear = device_property_read_bool(dev, "capture-clear"); + data->assert_pulse_width = + device_property_read_bool(dev, "assert-pulse-width"); + data->clear_pulse_width = + device_property_read_bool(dev, "clear-pulse-width"); data->echo_pin = devm_gpiod_get_optional(dev, "echo", GPIOD_OUT_LOW); if (IS_ERR(data->echo_pin)) @@ -186,6 +192,10 @@ static int pps_gpio_probe(struct platform_device *pdev) if (data->capture_clear) data->info.mode |= PPS_CAPTURECLEAR | PPS_OFFSETCLEAR | PPS_ECHOCLEAR; + if (data->assert_pulse_width) + data->info.mode |= PPS_WIDTHASSERT; + if (data->clear_pulse_width) + data->info.mode |= PPS_WIDTHCLEAR; data->info.owner = THIS_MODULE; snprintf(data->info.name, PPS_MAX_NAME_LEN - 1, "%s.%d", pdev->name, pdev->id); @@ -199,6 +209,10 @@ static int pps_gpio_probe(struct platform_device *pdev) pps_default_params = PPS_CAPTUREASSERT | PPS_OFFSETASSERT; if (data->capture_clear) pps_default_params |= PPS_CAPTURECLEAR | PPS_OFFSETCLEAR; + if (data->assert_pulse_width) + pps_default_params |= PPS_WIDTHASSERT; + if (data->clear_pulse_width) + pps_default_params |= PPS_WIDTHCLEAR; data->pps = pps_register_source(&data->info, pps_default_params); if (IS_ERR(data->pps)) { dev_err(dev, "failed to register IRQ %d as PPS source\n",