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[209.51.188.17]) by mx.google.com with ESMTPS id o13-20020ad45c8d000000b006287d6a6befsi6097084qvh.308.2023.06.29.05.03.20 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 29 Jun 2023 05:03:20 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=koniqtd7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qEqMh-0002NB-TR; Thu, 29 Jun 2023 08:03:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qEqMf-0002MM-GR for qemu-devel@nongnu.org; Thu, 29 Jun 2023 08:03:09 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qEqMc-0005Gy-Sw for qemu-devel@nongnu.org; Thu, 29 Jun 2023 08:03:09 -0400 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-3fba545d743so6535085e9.0 for ; Thu, 29 Jun 2023 05:03:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688040185; x=1690632185; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=z4l1J8enWAobibO9WsPypgJKzhJVu5hQ9JLx6ngTgp4=; b=koniqtd7SYoVw2kQ/UzeNmfGub4mnhpycYG0PglTSTIJL/724C15kLS0UUoZb8IDf9 Ds2GPsYW4g6yzpMHvVBZVmsheYGUTp5cLOkz/Qlfk/RJnZjhRnjLHdDBnTvVpEaac184 9wAFOPJh46B1q1LOFwcva91yZUMvdgAqydXhM5pfyPISnfJbBdZKo4EH27IegYddLsWp lsl5AJeXeo8e3/i6eQFZGi7NCJQBiEO+avfbGqiwQzdDllFsY654HPKbsrg/6XlZcva/ 7OlMoGslc0G3PPUuh7OZ3tbs7tP6bZ2wu2ccWPCfojk/NwHrBJ8+xZJISC1hIgWOBbBv YmYw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688040185; x=1690632185; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=z4l1J8enWAobibO9WsPypgJKzhJVu5hQ9JLx6ngTgp4=; b=C6O+Z6ZMo/1ss2cBnN95KYloQDyChfdw5SFMhtxV/wunt2WdYLzizeVQtPTyo04Ba6 NJuLpvOVDlSgWlPdeh/ONR3Sonz0+2iak2zRZNEVzMFj6ts0UauextVgOhfSiGMpRSoE sYN4qkLRAiNN92M1E8XHfi37O5VGkcU+Bpuy+94nXpKW8MymEqhJVCz4ke+KpzMqMSQt yMBZnSKyC1HASi7uJEN9WYPoH9WOl3OTIcfH4VvfmnfTSBXmZEdiGMuZJFuc91kmEHfK dkFkNZQiM4TINkEiTTKiGfC80SdxGuyFmMKpdv4MdDmLf2IVO4AhKTX3HYEY7y4dmMUc InGg== X-Gm-Message-State: AC+VfDzTP/XwSSyOMZVDxK476w4VwZrF9vfmbGHJPN175TZ0rzFFyNwg cQO5MxfM7p2PrMAF1U4Ksh7MaVtnI9IRMWyp1Yw= X-Received: by 2002:a7b:c041:0:b0:3f9:b748:ff3f with SMTP id u1-20020a7bc041000000b003f9b748ff3fmr24245529wmc.1.1688040185160; Thu, 29 Jun 2023 05:03:05 -0700 (PDT) Received: from m1x-phil.lan ([176.176.166.242]) by smtp.gmail.com with ESMTPSA id l6-20020a7bc446000000b003fba137857esm7709810wmi.14.2023.06.29.05.03.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 29 Jun 2023 05:03:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Richard Henderson , Yanan Wang , Alistair Francis , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Weiwei Li , Palmer Dabbelt , Eduardo Habkost , Liu Zhiwei , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 1/2] target/riscv: Check for CF_PARALLEL instead of qemu_tcg_mttcg_enabled Date: Thu, 29 Jun 2023 14:02:54 +0200 Message-Id: <20230629120255.85581-2-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230629120255.85581-1-philmd@linaro.org> References: <20230629120255.85581-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org A CPU knows whether MTTCG is enabled or not because it is reflected in its TCG flags via the CF_PARALLEL bit. Suggested-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4035fe0e62..4dfa64af6a 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -473,7 +473,7 @@ static void rv64_veyron_v1_cpu_init(Object *obj) static void rv128_base_cpu_init(Object *obj) { - if (qemu_tcg_mttcg_enabled()) { + if (CPU(obj)->tcg_cflags & CF_PARALLEL) { /* Missing 128-bit aligned atomics */ error_report("128-bit RISC-V currently does not work with Multi " "Threaded TCG. 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[209.51.188.17]) by mx.google.com with ESMTPS id ge6-20020a05621427c600b00631f44eb2fasi6060501qvb.489.2023.06.29.05.03.56 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 29 Jun 2023 05:03:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Yj9ryyAJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qEqMp-0002Rm-HC; Thu, 29 Jun 2023 08:03:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qEqMl-0002P5-Db for qemu-devel@nongnu.org; Thu, 29 Jun 2023 08:03:16 -0400 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qEqMj-0005Iz-PM for qemu-devel@nongnu.org; Thu, 29 Jun 2023 08:03:15 -0400 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-31297125334so493205f8f.0 for ; Thu, 29 Jun 2023 05:03:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688040192; x=1690632192; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Rqeub9QhHhZghiXhwOlqYOD/JyNFrg92mDnkS/0+7ew=; b=Yj9ryyAJEC2DeCMX8mcRK63XON6zjvPDQpDOLtpjdN2nrTf4UnKRn/De2gv1MJr6rJ zO/FHNAMzy/F3/M/ggpuItH+nQE9msAUKBLYGsQvBRXYMhVmvrRnpATXESzOBG8uMm9V iaayWEOSs+CqRyQTNUjLF3JIrnevgIBro8afOC0z6Sga0Nl3JBCCisda8MbP4GtySnSA gkprqTBJKY2k+4M2oQ793TA0G3cvPTq0mlCFJ3gTchLAzNq2oHExV4ZIRvHgpKq1qIpd 4euwm5kvgA7XtHGLUHqFPTT0CkgzaDxWQAyidNMHQj9Ws10RdrkKR1yXt2PmNYfs+e2K djxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688040192; x=1690632192; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Rqeub9QhHhZghiXhwOlqYOD/JyNFrg92mDnkS/0+7ew=; b=gEfVqAN7wr1X8rLWgQXktrl8QhMEcotyWi/am7s5O9d55SI3e3vOyQSXlLStBU9n81 2SYiYOEsjekjlmQcYEQIG6CoHoT0N00jFmCX4jAg0CINADn+YvAr/qQJ+XR77lpptOD+ 9AIXHDrc5AQDMYVFKjVQNrUqFGOmtVBiylQcmvB2+XK949WouWbT5j8c1005EYRMBstB jHxj14zj/G0luCXF7pr00/QcRzFY5c2Cc4+Z+0xHIJAowgjkzlDU5ikYuixynvZ9K5Rf wAKEvpp9tkXiEHrCsudg5JZMmSoBKA5kvEjMirda99szSUOedyLct98UW5T9Ttpriwrm oyqg== X-Gm-Message-State: AC+VfDzmdouUuQZwbLkq8lgb+Gptx630aGGlAMxwgc4Q+WE4B8CShi+S a4sZXfuhgWIQlNtGMTlx8zgJ6jzqHTWIFMGqvSo= X-Received: by 2002:adf:dcc1:0:b0:313:e740:4956 with SMTP id x1-20020adfdcc1000000b00313e7404956mr4294303wrm.25.1688040192055; Thu, 29 Jun 2023 05:03:12 -0700 (PDT) Received: from m1x-phil.lan ([176.176.166.242]) by smtp.gmail.com with ESMTPSA id c21-20020a7bc855000000b003f8fac0ad4bsm16167192wml.17.2023.06.29.05.03.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 29 Jun 2023 05:03:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Marcel Apfelbaum , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Richard Henderson , Yanan Wang , Alistair Francis , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Weiwei Li , Palmer Dabbelt , Eduardo Habkost , Liu Zhiwei Subject: [PATCH 2/2] accel/tcg: Replace qemu_tcg_mttcg_enabled() by mttcg_enabled Date: Thu, 29 Jun 2023 14:02:55 +0200 Message-Id: <20230629120255.85581-3-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230629120255.85581-1-philmd@linaro.org> References: <20230629120255.85581-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Move 'mttcg_enabled' declaration to "tcg-accel-ops-mttcg.h" which is a TCG-internal header; un-inline and remove the qemu_tcg_mttcg_enabled() definition. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tcg-accel-ops-mttcg.h | 8 ++++++++ include/hw/core/cpu.h | 9 --------- accel/tcg/tcg-accel-ops.c | 2 +- tcg/region.c | 3 ++- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/accel/tcg/tcg-accel-ops-mttcg.h b/accel/tcg/tcg-accel-ops-mttcg.h index 8ffa7a9a9f..1ffe8f3ac2 100644 --- a/accel/tcg/tcg-accel-ops-mttcg.h +++ b/accel/tcg/tcg-accel-ops-mttcg.h @@ -10,6 +10,14 @@ #ifndef TCG_ACCEL_OPS_MTTCG_H #define TCG_ACCEL_OPS_MTTCG_H +/** + * qemu_tcg_mttcg_enabled: + * Check whether we are running MultiThread TCG or not. + * + * Returns: %true if we are in MTTCG mode %false otherwise. + */ +extern bool mttcg_enabled; + /* kick MTTCG vCPU thread */ void mttcg_kick_vcpu_thread(CPUState *cpu); diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index b08f8b7079..5d26e6c90c 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -456,15 +456,6 @@ extern CPUTailQ cpus; extern __thread CPUState *current_cpu; -/** - * qemu_tcg_mttcg_enabled: - * Check whether we are running MultiThread TCG or not. - * - * Returns: %true if we are in MTTCG mode %false otherwise. - */ -extern bool mttcg_enabled; -#define qemu_tcg_mttcg_enabled() (mttcg_enabled) - /** * cpu_paging_enabled: * @cpu: The CPU whose state is to be inspected. diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 3973591508..5391f078cf 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -188,7 +188,7 @@ static inline void tcg_remove_all_breakpoints(CPUState *cpu) static void tcg_accel_ops_init(AccelOpsClass *ops) { - if (qemu_tcg_mttcg_enabled()) { + if (mttcg_enabled) { ops->create_vcpu_thread = mttcg_start_vcpu_thread; ops->kick_vcpu_thread = mttcg_kick_vcpu_thread; ops->handle_interrupt = tcg_handle_interrupt; diff --git a/tcg/region.c b/tcg/region.c index 2b28ed3556..45f1742271 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -32,6 +32,7 @@ #include "qapi/error.h" #include "tcg/tcg.h" #include "exec/translation-block.h" +#include "accel/tcg/tcg-accel-ops-mttcg.h" #include "tcg-internal.h" @@ -413,7 +414,7 @@ static size_t tcg_n_regions(size_t tb_size, unsigned max_cpus) * dividing the code_gen_buffer among the vCPUs. */ /* Use a single region if all we have is one vCPU thread */ - if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) { + if (max_cpus == 1 || !mttcg_enabled) { return 1; }