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[176.184.47.225]) by smtp.gmail.com with ESMTPSA id p8-20020adfe608000000b003141f3843e6sm1740689wrm.90.2023.07.11.02.41.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 11 Jul 2023 02:41:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Alistair Francis , Michael Tokarev , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Marc?= =?utf-8?q?-Andr=C3=A9_Lureau?= , =?utf-8?q?Dan?= =?utf-8?q?iel_P=2E_Berrang=C3=A9?= , Richard Henderson Subject: [hotfix PATCH-for-8.1 v3] meson: Fix cross-building for RISCV host Date: Tue, 11 Jul 2023 11:41:47 +0200 Message-Id: <20230711094147.54985-1-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org While when building on native Linux the host architecture is reported as "riscv32" or "riscv64": Host machine cpu family: riscv64 Host machine cpu: riscv64 Found pkg-config: /usr/bin/pkg-config (0.29.2) When cross-compiling it is detected as "riscv". Meson handles the cross-detection but displays a warning: WARNING: Unknown CPU family riscv, please report this at https://github.com/mesonbuild/meson/issues/new Host machine cpu family: riscv Host machine cpu: riscv Target machine cpu family: riscv Target machine cpu: riscv Found pkg-config: /usr/bin/riscv64-linux-gnu-pkg-config (1.8.1) Commit 278c1bcef5 was tested on native host but not under cross environment, and now we get on our cross-riscv64-system Gitlab-CI job: WARNING: Unknown CPU family riscv, please report this at https://github.com/mesonbuild/meson/issues/new Host machine cpu family: riscv Host machine cpu: riscv Target machine cpu family: riscv Target machine cpu: riscv ../meson.build:684:6: ERROR: Problem encountered: Unsupported CPU riscv, try --enable-tcg-interpreter As a kludge, re-introduce "riscv" in the supported_cpus[] array. Fixes: 278c1bcef5 ("target/riscv: Only unify 'riscv32/64' -> 'riscv' for host cpu in meson") Reported-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- v3: include verbose Meson output --- meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/meson.build b/meson.build index 5fcdb37a71..58e35febb9 100644 --- a/meson.build +++ b/meson.build @@ -55,7 +55,7 @@ qapi_trace_events = [] bsd_oses = ['gnu/kfreebsd', 'freebsd', 'netbsd', 'openbsd', 'dragonfly', 'darwin'] supported_oses = ['windows', 'freebsd', 'netbsd', 'openbsd', 'darwin', 'sunos', 'linux'] -supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv32', 'riscv64', 'x86', 'x86_64', +supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv', 'riscv32', 'riscv64', 'x86', 'x86_64', 'arm', 'aarch64', 'loongarch64', 'mips', 'mips64', 'sparc64'] cpu = host_machine.cpu_family()