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Wed, 12 Jul 2023 13:14:31 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 0A2FBF800D2 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=Ldqv88QB Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A7C5661730; Wed, 12 Jul 2023 11:14:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 964B6C433C9; Wed, 12 Jul 2023 11:14:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1689160469; bh=Y6+HL5cXUR8pbarN3p3+VttPH3gHnNQ6XxPid37hCR8=; h=From:Date:Subject:To:Cc:From; b=Ldqv88QBLV2MDVWXgVYjElfKL8Ym4/H4j1R72PcSdBA47TCiesI7tIawH0QYyTOmS 6E3hcwsrAUAq5WuoL+/Bi/cRmA4aoOIUU2LDqtmcXZIQ6b1QVYuMhwZKAuQ3/9S8xf nhxzgXyomqJGU9nE6nDV1BjU0LjnSFKRgziPysotee0zozTWajkZXV3L2rWenGqJfS yOO8DKC9mzNYIfyfq21Xbr6gyySIcLJVI+5wnIGJxFshLVsyHED5QWN8zbzYNDoTYG C4pqrAaT3+neX66FqV8rR/TVz2sYhvUE1DwQV6UIrGcASNW3NHsZI//PBKY/cV/fxq SIBkfxqr295eg== From: Mark Brown Date: Wed, 12 Jul 2023 12:14:21 +0100 Subject: [PATCH] ASoC: jz4740: Update to use maple tree register cache MIME-Version: 1.0 Message-Id: <20230712-asoc-jz-maple-v1-1-3f745adf96e5@kernel.org> X-B4-Tracking: v=1; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the jz4740 driver to use the more modern data structure. Signed-off-by: Mark Brown --- sound/soc/codecs/jz4740.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- base-commit: 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5 change-id: 20230630-asoc-jz-maple-aacbd3a12bb6 Best regards, diff --git a/sound/soc/codecs/jz4740.c b/sound/soc/codecs/jz4740.c index 7c25acf6ff0d..d1cea93bdb59 100644 --- a/sound/soc/codecs/jz4740.c +++ b/sound/soc/codecs/jz4740.c @@ -301,7 +301,7 @@ static const struct regmap_config jz4740_codec_regmap_config = { .reg_defaults = jz4740_codec_reg_defaults, .num_reg_defaults = ARRAY_SIZE(jz4740_codec_reg_defaults), - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_MAPLE, }; static int jz4740_codec_probe(struct platform_device *pdev)