From patchwork Wed Jul 12 16:51:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 702430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90D16C001DF for ; Wed, 12 Jul 2023 16:52:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233405AbjGLQwu (ORCPT ); Wed, 12 Jul 2023 12:52:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233265AbjGLQws (ORCPT ); Wed, 12 Jul 2023 12:52:48 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9427512E; Wed, 12 Jul 2023 09:52:46 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-191-111.ewe-ip-backbone.de [91.248.191.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id E6B986606FD8; Wed, 12 Jul 2023 17:52:44 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1689180765; bh=cgoCgj1TntBDxGd/KB0E4UgOCbq//hMHGvNN7KpnzYw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LrXV5DJk7x1cf+ii0QS2hMY78fRfdgaOthlP/gTTi4iaQt1ZWBMRkGarOtvPGifbi H6lJ6QDEjY+b4CONSzk49udJyi6qRjClZ9o36JbyEcqOWBTTPDsRBMUOptPsQPMFGf Jgc3UCEsULM7gWIKDJfGrYugUPPUgDmwkPypVEq0xVKPsk1AjLhNa7GdX1LC7XGrIf s3WhOxDsm6K0Hw6MfUaY82RxtbjhvwxyO3DpHistifSrpNpUaiaHvt8gz01k93mXH9 OGURvNlA8nIK1+y3G3IEOu4J7krs2WK/ZhwJJ71J5PBtobq+w0biutmbAe/KSy5HQ5 cmMEKgReElu2g== Received: by jupiter.universe (Postfix, from userid 1000) id 18777480596; Wed, 12 Jul 2023 18:52:43 +0200 (CEST) From: Sebastian Reichel To: linux-rockchip@lists.infradead.org, Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 1/4] arm64: dts: rockchip: rk3588: add USB2 support Date: Wed, 12 Jul 2023 18:51:03 +0200 Message-Id: <20230712165106.65603-2-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712165106.65603-1-sebastian.reichel@collabora.com> References: <20230712165106.65603-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds USB2 (EHCI & OHCI) ports including the related PHYs and GRF modules to the rk3588(s) device tree. Signed-off-by: Sebastian Reichel --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 94 +++++++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 8243e52bce59..c9f9dd2472f5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -399,6 +399,50 @@ scmi_shmem: sram@0 { }; }; + usb_host0_ehci: usb@fc800000 { + compatible = "rockchip,rk3588-ehci", "generic-ehci"; + reg = <0x0 0xfc800000 0x0 0x40000>; + interrupts = ; + clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>; + phys = <&u2phy2_host>; + phy-names = "usb"; + power-domains = <&power RK3588_PD_USB>; + status = "disabled"; + }; + + usb_host0_ohci: usb@fc840000 { + compatible = "rockchip,rk3588-ohci", "generic-ohci"; + reg = <0x0 0xfc840000 0x0 0x40000>; + interrupts = ; + clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>; + phys = <&u2phy2_host>; + phy-names = "usb"; + power-domains = <&power RK3588_PD_USB>; + status = "disabled"; + }; + + usb_host1_ehci: usb@fc880000 { + compatible = "rockchip,rk3588-ehci", "generic-ehci"; + reg = <0x0 0xfc880000 0x0 0x40000>; + interrupts = ; + clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>; + phys = <&u2phy3_host>; + phy-names = "usb"; + power-domains = <&power RK3588_PD_USB>; + status = "disabled"; + }; + + usb_host1_ohci: usb@fc8c0000 { + compatible = "rockchip,rk3588-ohci", "generic-ohci"; + reg = <0x0 0xfc8c0000 0x0 0x40000>; + interrupts = ; + clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>; + phys = <&u2phy3_host>; + phy-names = "usb"; + power-domains = <&power RK3588_PD_USB>; + status = "disabled"; + }; + sys_grf: syscon@fd58c000 { compatible = "rockchip,rk3588-sys-grf", "syscon"; reg = <0x0 0xfd58c000 0x0 0x1000>; @@ -419,6 +463,56 @@ pipe_phy2_grf: syscon@fd5c4000 { reg = <0x0 0xfd5c4000 0x0 0x100>; }; + usb2phy2_grf: syscon@fd5d8000 { + compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; + reg = <0x0 0xfd5d8000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy2: usb2-phy@8000 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0x8000 0x10>; + interrupts = ; + resets = <&cru SRST_OTGPHY_U2_0>, <&cru SRST_P_USB2PHY_U2_0_GRF0>; + reset-names = "phy", "apb"; + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy2"; + #clock-cells = <0>; + status = "disabled"; + + u2phy2_host: host-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + }; + + usb2phy3_grf: syscon@fd5dc000 { + compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; + reg = <0x0 0xfd5dc000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + u2phy3: usb2-phy@c000 { + compatible = "rockchip,rk3588-usb2phy"; + reg = <0xc000 0x10>; + interrupts = ; + resets = <&cru SRST_OTGPHY_U2_1>, <&cru SRST_P_USB2PHY_U2_1_GRF0>; + reset-names = "phy", "apb"; + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>; + clock-names = "phyclk"; + clock-output-names = "usb480m_phy3"; + #clock-cells = <0>; + status = "disabled"; + + u2phy3_host: host-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + }; + ioc: syscon@fd5f0000 { compatible = "rockchip,rk3588-ioc", "syscon"; reg = <0x0 0xfd5f0000 0x0 0x10000>; From patchwork Wed Jul 12 16:51:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 701978 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80258C0015E for ; Wed, 12 Jul 2023 16:52:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233380AbjGLQwt (ORCPT ); Wed, 12 Jul 2023 12:52:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233055AbjGLQwr (ORCPT ); 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Wed, 12 Jul 2023 18:52:43 +0200 (CEST) From: Sebastian Reichel To: linux-rockchip@lists.infradead.org, Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 2/4] arm64: dts: rockchip: rk3588-evb1: add USB2 Date: Wed, 12 Jul 2023 18:51:04 +0200 Message-Id: <20230712165106.65603-3-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712165106.65603-1-sebastian.reichel@collabora.com> References: <20230712165106.65603-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable USB2 (EHCI and OCHI mode) support for the Rockchip RK3588 EVB1. Signed-off-by: Sebastian Reichel --- .../boot/dts/rockchip/rk3588-evb1-v10.dts | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts index eeab8f0478a5..378d285a92be 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -38,6 +38,20 @@ vcc12v_dcin: vcc12v-dcin-regulator { regulator-max-microvolt = <12000000>; }; + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_usb>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + }; + vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -47,6 +61,26 @@ vcc5v0_sys: vcc5v0-sys-regulator { regulator-max-microvolt = <5000000>; vin-supply = <&vcc12v_dcin>; }; + + vcc5v0_usbdcin: vcc5v0-usbdcin-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usbdcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_usb: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usbdcin>; + }; }; &combphy0_ps { @@ -142,6 +176,12 @@ hym8563_int: hym8563-int { rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pwm2 { @@ -767,7 +807,41 @@ &sata0 { status = "okay"; }; +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; From patchwork Wed Jul 12 16:51:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 702431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E79C7EB64DA for ; Wed, 12 Jul 2023 16:52:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233372AbjGLQwt (ORCPT ); Wed, 12 Jul 2023 12:52:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50266 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229473AbjGLQwr (ORCPT ); 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Wed, 12 Jul 2023 18:52:43 +0200 (CEST) From: Sebastian Reichel To: linux-rockchip@lists.infradead.org, Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 3/4] arm64: dts: rockchip: rk3588-rock5b: add USB2 Date: Wed, 12 Jul 2023 18:51:05 +0200 Message-Id: <20230712165106.65603-4-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712165106.65603-1-sebastian.reichel@collabora.com> References: <20230712165106.65603-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable USB2 (EHCI and OCHI mode) support for the Radxa ROCK 5 Model B. This adds USB support on the M.2 Key E, both USB2 ports and USB2 mode for the upper USB3 port (the one further away from the PCB). The lower USB3 (closer to the PCB) and the USB-C ports use the RK3588 USB TypeC host controller, which is not yet supported upstream. Signed-off-by: Sebastian Reichel --- .../boot/dts/rockchip/rk3588-rock-5b.dts | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts index 9cea262998b4..6be759903411 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -43,6 +43,20 @@ fan: pwm-fan { #cooling-cells = <2>; }; + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + vin-supply = <&vcc5v0_sys>; + }; + vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -201,6 +215,12 @@ hp_detect: hp-detect { rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pwm1 { @@ -564,3 +584,38 @@ &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + /* connected to USB hub, which is powered by vcc5v0_sys */ + phy-supply = <&vcc5v0_sys>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; From patchwork Wed Jul 12 16:51:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 701977 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E2CEC00528 for ; Wed, 12 Jul 2023 16:52:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229473AbjGLQwv (ORCPT ); Wed, 12 Jul 2023 12:52:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233351AbjGLQws (ORCPT ); Wed, 12 Jul 2023 12:52:48 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A84081734; Wed, 12 Jul 2023 09:52:46 -0700 (PDT) Received: from jupiter.universe (dyndsl-091-248-191-111.ewe-ip-backbone.de [91.248.191.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id 14E4E660702E; Wed, 12 Jul 2023 17:52:45 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1689180765; bh=2VVwOOwLYFVfiLx9s3vRhudNAVz3rkLWFj9+rMW24Lo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KEwnWd1nCvePb64/F4kDhtsNX+nq0clMGpQs+SvEyr5qzPZjA+nyifqkgDmDB6qud KtE+Mi6DiOhATsh+678XONtgoBdNptGj2sJrugSjrXmVPYS5K5tHVMCaSRwJulvx54 D4EMgkwQE1Ns6Dn5qksLD1+fiWPqRrWBanI/liB1kAQnZGf5rQu29+D9IPz1ZeQtEk tQO0V+icVV3HagTU9eC9gG22Fd//gV1OmwnTXn1sQp10speFgzqKKwjeNRVAGjbRoN pkQtdxmVCKcklodUIpDmTz2qHkeQggtyT3w2H0aU4731TDxkg9fhucc2sEsTK9ZSLn FvdTIi/Flqb0w== Received: by jupiter.universe (Postfix, from userid 1000) id 1CD914805A0; Wed, 12 Jul 2023 18:52:43 +0200 (CEST) From: Sebastian Reichel To: linux-rockchip@lists.infradead.org, Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCH v1 4/4] arm64: dts: rockchip: rk3588s-rock5a: add USB2 Date: Wed, 12 Jul 2023 18:51:06 +0200 Message-Id: <20230712165106.65603-5-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230712165106.65603-1-sebastian.reichel@collabora.com> References: <20230712165106.65603-1-sebastian.reichel@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable USB2 (EHCI and OCHI mode) support for the Radxa ROCK 5 Model A. This adds USB support for the on-board WLAN/BT chip, the two USB2 ports, the USB available from the 2x20 connector and the lower USB3 port (in USB2 mode). The upper USB3 (further away from the PCB) uses the RK3588S USB TypeC OTG controller for USB2 and USB3 and thus is not supported at all at the moment. Signed-off-by: Sebastian Reichel --- .../boot/dts/rockchip/rk3588s-rock-5a.dts | 78 +++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts index a6dff117b459..66eab281c2c9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts @@ -64,6 +64,20 @@ vcc12v_dcin: vcc12v-dcin-regulator { regulator-max-microvolt = <12000000>; }; + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + vin-supply = <&vcc5v0_sys>; + }; + vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -292,6 +306,34 @@ rtl8211f_rst: rtl8211f-rst { rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifibt { + wl_reset: wl-reset { + rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + wl_dis: wl-dis { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_output_high>; + }; + + wl_wake_host: wl-wake-host { + rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_dis: bt-dis { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_output_high>; + }; + + bt_wake_host: bt-wake-host { + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; }; &pwm3 { @@ -650,7 +692,43 @@ regulator-state-mem { }; }; +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + status = "okay"; + phy-supply = <&vcc5v0_host>; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; + +&usb_host0_ehci { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&wl_reset &wl_dis &wl_wake_host &bt_dis &bt_wake_host>; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +};