From patchwork Mon Jul 17 10:32:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 704135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3C6DC0015E for ; Mon, 17 Jul 2023 10:33:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229635AbjGQKde (ORCPT ); Mon, 17 Jul 2023 06:33:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229932AbjGQKd3 (ORCPT ); Mon, 17 Jul 2023 06:33:29 -0400 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E8CC19AC for ; Mon, 17 Jul 2023 03:33:08 -0700 (PDT) Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-1b852785a65so26392205ad.0 for ; Mon, 17 Jul 2023 03:33:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689589978; x=1692181978; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=f6nS90cTjCSY7Tyo8KTgzDnh4BrkTy5UxyLb8PDeWUE=; b=c+09fdJb79CO8X/gmJ74r6rTnBbn0Pe5L63/elKMcPDbT0DESKOvmxcIxAPsxoBw0J A46rI4QatHrxVoCEz/OJCQUX8b3B54nHbRBYEF/xNUx3EWhZmoDSkkOmRAGE7Jcg39lv Q+AVd6RfWm9ahCcWtAVEqQSogWV+HKcoBnviU8b+4yGDVcXK7/XySHfHTYU7rtuN6Y4G Kx2LHT0begdXwscKvyf3ZDhWTe/mpX7RL51MWN/XAi6rZ2ZhyG0zRzORjerTPzVi1w8f 4XpwZAldTnrds8BvA1jf+TqoJ88O7+8Pl+bkkQkW4Atii46aC/u0KQp9yxXA6pCUXYDh NYAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689589978; x=1692181978; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=f6nS90cTjCSY7Tyo8KTgzDnh4BrkTy5UxyLb8PDeWUE=; b=YxgchlBtTKbc+xMJOdNmFSqabU9wuw/rM87J7/qKcXSJ+aS931KF4ivrAgktMOV1wJ 8qauA/TtwlQwOnExcybKgnrn1bcfrPbPNvOoqoi1P1ZQ4F4SLmufjAP0OH+N14rvIooz JaYcOLhYnBVi55cxbAmeAuXy6pTh431KcKNnHXKeP8ZUDNaGfgHAl92XH7CHjDqAWnnI xGdnwOIzYubXGzh7QBkeLvJPK7FDBvVHKuc/EpM6zXM0FD/F8AkCwQggtmt/YCI69SB9 oGtF5DAiUDUVVAmprFL4W99bqP0N8KqsGQRaH9S/gn3mQCZutBbZRTUzyzwh9XkWNZOg ljMg== X-Gm-Message-State: ABy/qLZBw3Rn19jAba5GDh6zhtzYMQTGgKsaKPRTGRcK01KsyqIda79t gdDEpwHeq12H+TdlOh3H7X0CAeQm7pvhjTn+MRRQYg== X-Google-Smtp-Source: APBJJlErZNuNmI4xKteu0wKevQatiM0x7wY/pvfwrBifAyKv1RyfDNKDm/Xj0yP3UaAu/ubjT54MZg== X-Received: by 2002:a17:903:32c9:b0:1b5:5162:53bd with SMTP id i9-20020a17090332c900b001b5516253bdmr13332000plr.33.1689589977999; Mon, 17 Jul 2023 03:32:57 -0700 (PDT) Received: from localhost.localdomain ([223.233.68.54]) by smtp.gmail.com with ESMTPSA id ij9-20020a170902ab4900b001b9de67285dsm12633616plb.156.2023.07.17.03.32.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jul 2023 03:32:57 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com, bhupesh.sharma@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, krzysztof.kozlowski@linaro.org, quic_schowdhu@quicinc.com, gregkh@linuxfoundation.org Subject: [PATCH v8 1/4] dt-bindings: soc: qcom: eud: Add SM6115 / SM4250 support Date: Mon, 17 Jul 2023 16:02:33 +0530 Message-Id: <20230717103236.1246771-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230717103236.1246771-1-bhupesh.sharma@linaro.org> References: <20230717103236.1246771-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add dt-bindings for EUD found on Qualcomm SM6115 / SM4250 SoC. On this SoC (and derivatives) the enable bit inside 'tcsr_check_reg' needs to be set first to 'enable' the eud module. So, update the dt-bindings to accommodate the third register property (TCSR Base) required by the driver on these SoCs. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bhupesh Sharma --- .../bindings/soc/qcom/qcom,eud.yaml | 42 +++++++++++++++++-- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index f2c5ec7e6437b..71274bc978584 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -18,12 +18,16 @@ properties: items: - enum: - qcom,sc7280-eud + - qcom,sm6115-eud - const: qcom,eud reg: - items: - - description: EUD Base Register Region - - description: EUD Mode Manager Register + minItems: 2 + maxItems: 3 + + reg-names: + minItems: 2 + maxItems: 3 interrupts: description: EUD interrupt @@ -50,6 +54,38 @@ required: - reg - ports +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7280-eud + then: + properties: + reg: + maxItems: 2 + reg-names: + items: + - const: eud-base + - const: eud-mode-mgr + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm6115-eud + then: + properties: + reg: + maxItems: 3 + reg-names: + items: + - const: eud-base + - const: eud-mode-mgr + - const: tcsr-base + additionalProperties: false examples: From patchwork Mon Jul 17 10:32:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 703771 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0952BC04E69 for ; Mon, 17 Jul 2023 10:33:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230320AbjGQKdc (ORCPT ); Mon, 17 Jul 2023 06:33:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230364AbjGQKdb (ORCPT ); Mon, 17 Jul 2023 06:33:31 -0400 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 982A519B1 for ; Mon, 17 Jul 2023 03:33:09 -0700 (PDT) Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-1b8ad9eede0so34934065ad.1 for ; Mon, 17 Jul 2023 03:33:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689589983; x=1692181983; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ATTO38/iOwVxNwj2oDkWC8K05sDZoQ4wq1YyEPI7+d8=; b=MyOhzNAQ9J1iPOmPtoVjZ4DgBGmtH/yypeJvaYJuXuHKJWwG3hmX1TR6Htx4j6Tde8 J1wj0/3c7wtqzGEFhVGk8UeNk43zxTSKQDASwRZeVLrigBUrmKKgGy6/C0YS3j+IiELZ jESzbOjERN6CT+e7sri3mg0D//U4ofZZRc2eh1rU2+aObRLTSOlpTrndBN04QgHsOA5r m3je/+qdgFfY2qVbwGPUCpvkbtoBEWVIbAtHmrzTZ+cOqAPCQWcR/PzqBkMndlVHYhOD p8ZOep23FpvRle3w/tnzVxtSDiZiTrTs98vx54qWjhLcQE84EpAnnld2qQiCefx5ha+j fU1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689589983; x=1692181983; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ATTO38/iOwVxNwj2oDkWC8K05sDZoQ4wq1YyEPI7+d8=; b=NIrXJfCyh6olHSllNV/CcHNRjQfp/WBpuAM9M6vWfwm1JuuWwT0WHMx5IIqkxFrK/p 0xmtOZorjT/uY3S7P/luXKvFYCZDaV7Yjbiuww5WLoV/ZQI719od0o+K+gtI0iAis5Zb XuBaX2wdeOnpLfugB8X3MTdsPlGOZpT8VPvfI2H0WYYB9c+A+1kilFNN4wErZUOG4NXt h6Cgd8jcSPqTYC/u/4zups0Dky+PtrzErn+O4KjrkStDcd428cimYiVmrurMS4D+l997 Fq3WxHZ820HH0opc4McjkWZLhB6CGQ7uHq3ZNWliiPQL7IYEXt/hkPdDv1SGO0nOtuZz rBcg== X-Gm-Message-State: ABy/qLZBy7ynk9ry8oiKBkyVpi139zicw08yrTRqh5+np3FDtQcWxY+2 eX2PC70Jy6+CmCLovEdddIBIqLk8TGSdymelbiSHcA== X-Google-Smtp-Source: APBJJlFeyZDPDWURFC6I/5UxqTtOXcwxmB92C9PgveQcu/vBRWYlKgTJnm6kdl0bBnm/qdhLmlHGEA== X-Received: by 2002:a17:902:efc3:b0:1b8:b461:595e with SMTP id ja3-20020a170902efc300b001b8b461595emr12182599plb.48.1689589982808; Mon, 17 Jul 2023 03:33:02 -0700 (PDT) Received: from localhost.localdomain ([223.233.68.54]) by smtp.gmail.com with ESMTPSA id ij9-20020a170902ab4900b001b9de67285dsm12633616plb.156.2023.07.17.03.32.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jul 2023 03:33:02 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com, bhupesh.sharma@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, krzysztof.kozlowski@linaro.org, quic_schowdhu@quicinc.com, gregkh@linuxfoundation.org Subject: [PATCH v8 2/4] usb: misc: eud: Add driver support for SM6115 / SM4250 Date: Mon, 17 Jul 2023 16:02:34 +0530 Message-Id: <20230717103236.1246771-3-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230717103236.1246771-1-bhupesh.sharma@linaro.org> References: <20230717103236.1246771-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add SM6115 / SM4250 SoC EUD support in qcom_eud driver. On some SoCs (like the SM6115 / SM4250 SoC), the mode manager needs to be accessed only via the secure world (through 'scm' calls). Also, the enable bit inside 'tcsr_check_reg' needs to be set first to set the eud in 'enable' mode on these SoCs. Signed-off-by: Bhupesh Sharma --- drivers/usb/misc/Kconfig | 2 +- drivers/usb/misc/qcom_eud.c | 62 ++++++++++++++++++++++++++++++++++--- 2 files changed, 58 insertions(+), 6 deletions(-) diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig index 99b15b77dfd57..51eb5140caa14 100644 --- a/drivers/usb/misc/Kconfig +++ b/drivers/usb/misc/Kconfig @@ -146,7 +146,7 @@ config USB_APPLEDISPLAY config USB_QCOM_EUD tristate "QCOM Embedded USB Debugger(EUD) Driver" - depends on ARCH_QCOM || COMPILE_TEST + depends on (ARCH_QCOM && QCOM_SCM) || COMPILE_TEST select USB_ROLE_SWITCH help This module enables support for Qualcomm Technologies, Inc. diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 7f371ea1248c3..136cac90228a0 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -11,9 +11,11 @@ #include #include #include +#include #include #include #include +#include #include #define EUD_REG_INT1_EN_MASK 0x0024 @@ -30,15 +32,25 @@ #define EUD_INT_SAFE_MODE BIT(4) #define EUD_INT_ALL (EUD_INT_VBUS | EUD_INT_SAFE_MODE) +#define EUD_EN2_EN BIT(0) +#define EUD_EN2_DISABLE (0) +#define TCSR_CHECK_EN BIT(0) + +struct eud_soc_cfg { + u32 tcsr_check_offset; +}; + struct eud_chip { struct device *dev; struct usb_role_switch *role_sw; + const struct eud_soc_cfg *eud_cfg; void __iomem *base; void __iomem *mode_mgr; unsigned int int_status; int irq; bool enabled; bool usb_attached; + phys_addr_t secure_mode_mgr; }; static int enable_eud(struct eud_chip *priv) @@ -46,7 +58,11 @@ static int enable_eud(struct eud_chip *priv) writel(EUD_ENABLE, priv->base + EUD_REG_CSR_EUD_EN); writel(EUD_INT_VBUS | EUD_INT_SAFE_MODE, priv->base + EUD_REG_INT1_EN_MASK); - writel(1, priv->mode_mgr + EUD_REG_EUD_EN2); + + if (priv->secure_mode_mgr) + qcom_scm_io_writel(priv->secure_mode_mgr + EUD_REG_EUD_EN2, EUD_EN2_EN); + else + writel(EUD_EN2_EN, priv->mode_mgr + EUD_REG_EUD_EN2); return usb_role_switch_set_role(priv->role_sw, USB_ROLE_DEVICE); } @@ -54,7 +70,11 @@ static int enable_eud(struct eud_chip *priv) static void disable_eud(struct eud_chip *priv) { writel(0, priv->base + EUD_REG_CSR_EUD_EN); - writel(0, priv->mode_mgr + EUD_REG_EUD_EN2); + + if (priv->secure_mode_mgr) + qcom_scm_io_writel(priv->secure_mode_mgr + EUD_REG_EUD_EN2, EUD_EN2_DISABLE); + else + writel(EUD_EN2_DISABLE, priv->mode_mgr + EUD_REG_EUD_EN2); } static ssize_t enable_show(struct device *dev, @@ -178,6 +198,8 @@ static void eud_role_switch_release(void *data) static int eud_probe(struct platform_device *pdev) { struct eud_chip *chip; + struct resource *res; + phys_addr_t tcsr_check; int ret; chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); @@ -200,9 +222,34 @@ static int eud_probe(struct platform_device *pdev) if (IS_ERR(chip->base)) return PTR_ERR(chip->base); - chip->mode_mgr = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(chip->mode_mgr)) - return PTR_ERR(chip->mode_mgr); + /* + * EUD block on a few Qualcomm SoCs needs secure register access. + * Check for the same via SoC specific config data. + */ + chip->eud_cfg = of_device_get_match_data(&pdev->dev); + if (chip->eud_cfg) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) + return dev_err_probe(chip->dev, -ENODEV, + "failed to get secure_mode_mgr reg base\n"); + + chip->secure_mode_mgr = res->start; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tcsr-base"); + if (!res) + return dev_err_probe(chip->dev, -ENODEV, + "failed to get tcsr reg base\n"); + + tcsr_check = res->start + chip->eud_cfg->tcsr_check_offset; + + ret = qcom_scm_io_writel(tcsr_check, TCSR_CHECK_EN); + if (ret) + return dev_err_probe(chip->dev, ret, "failed to write tcsr check reg\n"); + } else { + chip->mode_mgr = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(chip->mode_mgr)) + return PTR_ERR(chip->mode_mgr); + } chip->irq = platform_get_irq(pdev, 0); ret = devm_request_threaded_irq(&pdev->dev, chip->irq, handle_eud_irq, @@ -228,8 +275,13 @@ static void eud_remove(struct platform_device *pdev) disable_irq_wake(chip->irq); } +static const struct eud_soc_cfg sm6115_eud_cfg = { + .tcsr_check_offset = 0x25018, +}; + static const struct of_device_id eud_dt_match[] = { { .compatible = "qcom,sc7280-eud" }, + { .compatible = "qcom,sm6115-eud", .data = &sm6115_eud_cfg }, { } }; MODULE_DEVICE_TABLE(of, eud_dt_match); From patchwork Mon Jul 17 10:32:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 704134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DCFBC0015E for ; Mon, 17 Jul 2023 10:33:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229895AbjGQKd4 (ORCPT ); Mon, 17 Jul 2023 06:33:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229817AbjGQKdf (ORCPT ); Mon, 17 Jul 2023 06:33:35 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51F881BC9 for ; Mon, 17 Jul 2023 03:33:14 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-6687466137bso2696055b3a.0 for ; Mon, 17 Jul 2023 03:33:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689589987; x=1692181987; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Yr2lhl/TncZ/nmgXyyvgeCSOjpClIkhhe0GOfOLj29s=; b=SPWBNeopaNU3nELTMHts++zOvw/SEcmL1DiqjoGZPEIZjJ86A7udWgCAfjHtR57aOq RkTD8yG/uwBxmXKLLeDheFMRnIhrNmVEv50AJEfWyEXHNDt5LnNpDZFTQehkPREXei1b ylDgqExQtF3sJPXKs41jQz/rfJatp0b11KLJlYp3G7vCTQKkddpSkl6LGwKgOgDvFFYE Ht3nrXp9buuArG8aeDSuNP9Z3nzDk6ZIJeWS3zrQWH7YQPXcRB/Pqx9LoXDBz1Lonbo/ s/UfNDwMHtQrOaVIABMiJFxGXYaDoFDu47ma36eDNNgLyeIaFy7vBL2au5mtBq3FTVst LscQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689589987; x=1692181987; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Yr2lhl/TncZ/nmgXyyvgeCSOjpClIkhhe0GOfOLj29s=; b=BE4VdWU3PDvF9mIVmUAb8pfMFu97oD6ccxeupxRJVF6KJXg4pFKIQaovpLvcINkx+H dm6e3rYVyzuuf3eT+lk6kOOkayMl5rcozohysTlwS1Tj/86N5y1rmdvpgpbbme+z6zO2 Ew0dlSaypIIcwRHMVoUBKLHlzB3n9hoqcdcxGmmWKKqPoUrbR7h1B7J8fJO0/3t4pDT6 PLK5Lc+yLTNW95YMGUzKj/OdPC4pps51eWidjHmLTydNcToUB5ihjEwkP1FF0eT4Qmbp rqGTBMcRRB/GJC2Qm2JGVbL67MHmiXhpzTWrcL6dUI3a+jEjBPuQ+al7dDiFxV5tbknw SpJA== X-Gm-Message-State: ABy/qLbcOmmrrzfa3pw9Z/GjWUXLVWWB3MSYzmGDJjsfUwpElCZvRsi6 58JYpYTvnR++R9iJejL4MQIL87fbwhgRzfl0ioA1DA== X-Google-Smtp-Source: APBJJlFcTSvu7b52GUZ3skTVKlJd6itPmcIPP6ywn40LUPGaF3qiBa95JEqP4Y+cXYceKo+YR96ddA== X-Received: by 2002:a05:6a20:a109:b0:133:6d89:4d29 with SMTP id q9-20020a056a20a10900b001336d894d29mr12601888pzk.58.1689589987309; Mon, 17 Jul 2023 03:33:07 -0700 (PDT) Received: from localhost.localdomain ([223.233.68.54]) by smtp.gmail.com with ESMTPSA id ij9-20020a170902ab4900b001b9de67285dsm12633616plb.156.2023.07.17.03.33.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jul 2023 03:33:07 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com, bhupesh.sharma@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, krzysztof.kozlowski@linaro.org, quic_schowdhu@quicinc.com, gregkh@linuxfoundation.org Subject: [PATCH v8 3/4] arm64: dts: qcom: sm6115: Add EUD dt node and dwc3 connector Date: Mon, 17 Jul 2023 16:02:35 +0530 Message-Id: <20230717103236.1246771-4-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230717103236.1246771-1-bhupesh.sharma@linaro.org> References: <20230717103236.1246771-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the Embedded USB Debugger(EUD) device tree node for SM6115 / SM4250 SoC. The node contains EUD base register region, EUD mode manager register region and TCSR Base register region along with the interrupt entry. Also add the typec connector node for EUD which is attached to EUD node via port. EUD is also attached to DWC3 node via port. To enable the role switch, we need to set dr_mode = "otg" property for 'usb_dwc3' sub-node in the board dts file. Also the EUD device can be enabled on a board once linux is boot'ed by setting: $ echo 1 > /sys/bus/platform/drivers/qcom_eud/../enable Reviewed-by: Konrad Dybcio Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 50 ++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 839c603512403..db45337c1082c 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -260,6 +260,18 @@ CLUSTER_1_SLEEP_1: cluster-sleep-1-1 { }; }; + eud_typec: connector { + compatible = "usb-c-connector"; + + ports { + port@0 { + con_eud: endpoint { + remote-endpoint = <&eud_con>; + }; + }; + }; + }; + firmware { scm: scm { compatible = "qcom,scm-sm6115", "qcom,scm"; @@ -789,6 +801,37 @@ gcc: clock-controller@1400000 { #power-domain-cells = <1>; }; + eud: eud@1610000 { + compatible = "qcom,sm6115-eud", "qcom,eud"; + reg = <0x0 0x01610000 0x0 0x2000>, + <0x0 0x01612000 0x0 0x1000>, + <0x0 0x003c0000 0x0 0x40000>; + reg-names = "eud-base", "eud-mode-mgr", "tcsr-base"; + interrupts = ; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + eud_ep: endpoint { + remote-endpoint = <&usb2_role_switch>; + }; + }; + + port@1 { + reg = <1>; + + eud_con: endpoint { + remote-endpoint = <&con_eud>; + }; + }; + }; + }; + usb_hsphy: phy@1613000 { compatible = "qcom,sm6115-qusb2-phy"; reg = <0x0 0x01613000 0x0 0x180>; @@ -1322,6 +1365,13 @@ usb_dwc3: usb@4e00000 { snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,usb3_lpm_capable; + usb-role-switch; + + port { + usb2_role_switch: endpoint { + remote-endpoint = <&eud_ep>; + }; + }; }; }; From patchwork Mon Jul 17 10:32:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 703770 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ABC2CC001DE for ; Mon, 17 Jul 2023 10:33:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229590AbjGQKdu (ORCPT ); Mon, 17 Jul 2023 06:33:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230437AbjGQKde (ORCPT ); Mon, 17 Jul 2023 06:33:34 -0400 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2D111BDA for ; Mon, 17 Jul 2023 03:33:15 -0700 (PDT) Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-1bb119be881so27832595ad.3 for ; Mon, 17 Jul 2023 03:33:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1689589992; x=1692181992; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aoaxiWdRTQIjlpKBPFLmbhlJ2o+zAdh4av4kyochmEo=; b=g519a+G7tOuP5AGM99e4AMmxik1Mq8hK7gBhqN7FfI+fi/u8RiwEdZteCyakYGYPp6 LSJRF5Km6sXgyIAlc90wqM1qSPKCKc+H3LTr9jpdfZwmbJEbEka5ynRujS7NNNEB1CoS WHVeD8s+JTtarzKaGi2LDeJU8uJKCpuRSm9DJp142XsIcjzRrRByl9XNuIlqcYjHLsSI w8EoI4s1yeYtJRXOsfuf3TyVwtvx8DNZhLTifve1u6pdFo+iv8eD02apBZJqGs4Bedkk OGkhqV1yml1BoYdBsrB8DRKy9k7pjQH+j+nacouB8lEz7suiSGB2L70kIZ1ouOXOgALy ITPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1689589992; x=1692181992; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aoaxiWdRTQIjlpKBPFLmbhlJ2o+zAdh4av4kyochmEo=; b=atXhj4uGIEiriAgU/AQotzfS6VEBwfoStlcbVYh9mhnGyxEPHvy00Yxn+FoS9fEFCZ qbCiRj5xOfBtkBT2lmh8lSzr5fpyXl/tJ+uUs+u21E4Y9AatY6GrQ1lD+8L1KOwc89W9 Ca/0u4UzmXwLeFeLl7aCWDyIwccs/wzxN1cEifG8nWaTBNSjNymnDRx5TLTZCLro7s4f gDnBvDB+aQEKrjKY5jSuGRiSBKkS+pTkQTXzf3LbiQViGauPUdr3w+1FBBf82Q/l9kpU Db4s++fYbb+Sb3ED85ypu9NNuQxZLjpLmLpmLer5+eMxIWlfS/2OxoK+K6+E2GUqZiwo wBxg== X-Gm-Message-State: ABy/qLYzBgTLq+hjbxUsksTVpK9jugm4HE4Vqi3oFSZs89fImUP7NGWB GPacmdtpHl7hnfPIKcAqN3mRpMVndvnt+YGPULI8OQ== X-Google-Smtp-Source: APBJJlGxjHTy27oHzebTb158x0c33RIuQvSDpQ/GYL/rSpU/c05I0WJAE/sHlYsRZQIMLM7KbWO+Tg== X-Received: by 2002:a17:902:9347:b0:1b8:a12e:d655 with SMTP id g7-20020a170902934700b001b8a12ed655mr1968934plp.11.1689589991826; Mon, 17 Jul 2023 03:33:11 -0700 (PDT) Received: from localhost.localdomain ([223.233.68.54]) by smtp.gmail.com with ESMTPSA id ij9-20020a170902ab4900b001b9de67285dsm12633616plb.156.2023.07.17.03.33.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jul 2023 03:33:11 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org Cc: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com, bhupesh.sharma@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, krzysztof.kozlowski@linaro.org, quic_schowdhu@quicinc.com, gregkh@linuxfoundation.org Subject: [PATCH v8 4/4] arm64: dts: qcom: qrb4210-rb2: Enable EUD debug peripheral Date: Mon, 17 Jul 2023 16:02:36 +0530 Message-Id: <20230717103236.1246771-5-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230717103236.1246771-1-bhupesh.sharma@linaro.org> References: <20230717103236.1246771-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Since the USB-C type port on the Qualcomm QRB4210-RB2 board can be set primarily in a 'device' configuration (with the default DIP switch settings), it makes sense to enable the EUD debug peripheral on the board by default by setting the USB 'dr_mode' property as 'otg'. Now, the EUD debug peripheral can be enabled by executing: $ echo 1 > /sys/bus/platform/drivers/qcom_eud/1610000.eud/enable Reviewed-by: Konrad Dybcio Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 27 +++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index a7278a9472ed9..640668960deb0 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -264,6 +264,10 @@ &pon_resin { status = "okay"; }; +&eud { + status = "okay"; +}; + &qupv3_id_0 { status = "okay"; }; @@ -518,7 +522,28 @@ &usb { &usb_dwc3 { maximum-speed = "super-speed"; - dr_mode = "peripheral"; + + /* + * There is only one USB DWC3 controller on QRB4210 board and it is connected + * via a DIP Switch: + * - to either an USB - C type connector or an USB - A type connector + * (via a GL3590-S hub), and + * - to either an USB - A type connector (via a GL3590-S hub) or a connector + * for further connection with a mezzanine board. + * + * All of the above hardware muxes would allow us to hook things up in + * different ways to some potential benefit for static configurations (for e.g. + * on one hand we can have two USB - A type connectors and a USB - Ethernet + * connection available and on the other we can use the USB - C type in + * peripheral mode). + * + * Note that since the USB - C type can be used only in peripehral mode, + * so hardcoding the mode to 'peripheral' here makes sense. + * + * However since we want to use the EUD debug device, we set the mode as + * 'otg' here. + */ + dr_mode = "otg"; }; &usb_hsphy {