From patchwork Wed Jul 26 14:49:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 706802 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 678EEC001B0 for ; Wed, 26 Jul 2023 14:49:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233676AbjGZOtz (ORCPT ); Wed, 26 Jul 2023 10:49:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232490AbjGZOtx (ORCPT ); Wed, 26 Jul 2023 10:49:53 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.155.65.254]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 466B62688; Wed, 26 Jul 2023 07:49:49 -0700 (PDT) X-QQ-mid: bizesmtp89t1690382979t5z5adzy Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 26 Jul 2023 22:49:37 +0800 (CST) X-QQ-SSF: 01200000000000D0X000000A0000000 X-QQ-FEAT: D6RqbDSxuq4bBscb3WVWJI1d+Kqxad6f7cVfrgZopYXRqGipdAcIvUN9SmVKh FsqYoEBAYwJvS+xCmp3VNDRxt86o/WUyGbOg6iMds5ynt/tIJaIBSfOQ42vq3DqrHntG5kB x8jfASTBlbomLdxOX1vAp8v5o6cGFXzyVY3L7U1gjdC+TPFHtuODcmmDGIK89nInZ9YTwyV BeBmAGBGe4NT4Q+mpqeqnbRh+gjlUDZ8oA6ZQmXl31Ks+gwE3lYeI+kTS9YO1OmVOp/OtGc wIGT5KKMo59tdUZa1Mny9zYq/jXM4N/lCuAaute9E6Y/G3yTgSt3O2uiJurAyCxBanLHl0H vlJ/xqVrtqe38J5Kl727HMZez7flA0NA2fAw2HEr12N7eQvjGlZDlWiG279dFXn/WjL5pbl X-QQ-GoodBg: 0 X-BIZMAIL-ID: 7150859421509600242 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v2 1/7] tools/nolibc: add support for powerpc Date: Wed, 26 Jul 2023 22:49:32 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Both syscall declarations and _start code definition are added for powerpc to nolibc. Like mips, powerpc uses a register (exactly, the summary overflow bit) to record the error occurred, and uses another register to return the value [1]. So, the return value of every syscall declaration must be normalized to easier the __sysret helper, return -value when there is an error, otheriwse, return value directly. Glibc and musl use different methods to check the summary overflow bit, glibc (sysdeps/unix/sysv/linux/powerpc/sysdep.h) saves the cr register to r0 at first, and then check the summary overflow bit in cr0: mfcr r0 r0 & (1 << 28) ? -r3 : r3 --> 10003c14: 7c 00 00 26 mfcr r0 10003c18: 74 09 10 00 andis. r9,r0,4096 10003c1c: 41 82 00 08 beq 0x10003c24 10003c20: 7c 63 00 d0 neg r3,r3 Musl (arch/powerpc/syscall_arch.h) directly checks the summary overflow bit with the 'bns' instruction, it is smaller: /* no summary overflow bit means no error, return value directly */ bns+ 1f /* otherwise, return negated value */ neg r3, r3 1: --> 10000418: 40 a3 00 08 bns 0x10000420 1000041c: 7c 63 00 d0 neg r3,r3 Like musl, Linux (arch/powerpc/include/asm/vdso/gettimeofday.h) uses the same method for do_syscall_2() too. Here applies the second method to get smaller size. [1]: https://man7.org/linux/man-pages/man2/syscall.2.html Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/include/nolibc/arch-powerpc.h | 188 ++++++++++++++++++++++++++++ tools/include/nolibc/arch.h | 2 + 2 files changed, 190 insertions(+) create mode 100644 tools/include/nolibc/arch-powerpc.h diff --git a/tools/include/nolibc/arch-powerpc.h b/tools/include/nolibc/arch-powerpc.h new file mode 100644 index 000000000000..caa943e1521a --- /dev/null +++ b/tools/include/nolibc/arch-powerpc.h @@ -0,0 +1,188 @@ +/* SPDX-License-Identifier: LGPL-2.1 OR MIT */ +/* + * PowerPC specific definitions for NOLIBC + * Copyright (C) 2023 Zhangjin Wu + */ + +#ifndef _NOLIBC_ARCH_POWERPC_H +#define _NOLIBC_ARCH_POWERPC_H + +#include "compiler.h" +#include "crt.h" + +/* Syscalls for PowerPC : + * - stack is 16-byte aligned + * - syscall number is passed in r0 + * - arguments are in r3, r4, r5, r6, r7, r8, r9 + * - the system call is performed by calling "sc" + * - syscall return comes in r3, and the summary overflow bit is checked + * to know if an error occurred, in which case errno is in r3. + * - the arguments are cast to long and assigned into the target + * registers which are then simply passed as registers to the asm code, + * so that we don't have to experience issues with register constraints. + */ + +#define _NOLIBC_SYSCALL_CLOBBERLIST \ + "memory", "cr0", "r12", "r11", "r10", "r9" + +#define my_syscall0(num) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num) \ + : \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5", "r4" \ + ); \ + _ret; \ +}) + +#define my_syscall1(num, arg1) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5", "r4" \ + ); \ + _ret; \ +}) + + +#define my_syscall2(num, arg1, arg2) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6", "r5" \ + ); \ + _ret; \ +}) + + +#define my_syscall3(num, arg1, arg2, arg3) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7", "r6" \ + ); \ + _ret; \ +}) + + +#define my_syscall4(num, arg1, arg2, arg3, arg4) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8", "r7" \ + ); \ + _ret; \ +}) + + +#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + register long _arg5 __asm__ ("r7") = (long)(arg5); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4), "+r"(_arg5) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST, "r8" \ + ); \ + _ret; \ +}) + +#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \ +({ \ + register long _ret __asm__ ("r3"); \ + register long _num __asm__ ("r0") = (num); \ + register long _arg1 __asm__ ("r3") = (long)(arg1); \ + register long _arg2 __asm__ ("r4") = (long)(arg2); \ + register long _arg3 __asm__ ("r5") = (long)(arg3); \ + register long _arg4 __asm__ ("r6") = (long)(arg4); \ + register long _arg5 __asm__ ("r7") = (long)(arg5); \ + register long _arg6 __asm__ ("r8") = (long)(arg6); \ + \ + __asm__ volatile ( \ + " sc\n" \ + " bns+ 1f\n" \ + " neg %0, %0\n" \ + "1:\n" \ + : "=r"(_ret), "+r"(_num), "+r"(_arg2), "+r"(_arg3), \ + "+r"(_arg4), "+r"(_arg5), "+r"(_arg6) \ + : "0"(_arg1) \ + : _NOLIBC_SYSCALL_CLOBBERLIST \ + ); \ + _ret; \ +}) + +/* startup code */ +void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector _start(void) +{ + __asm__ volatile ( + "mr 3, 1\n" /* save stack pointer to r3, as arg1 of _start_c */ + "clrrwi 1, 1, 4\n" /* align the stack to 16 bytes */ + "li 0, 0\n" /* zero the frame pointer */ + "stwu 1, -16(1)\n" /* the initial stack frame */ + "bl _start_c\n" /* transfer to c runtime */ + ); + __builtin_unreachable(); +} + +#endif /* _NOLIBC_ARCH_POWERPC_H */ diff --git a/tools/include/nolibc/arch.h b/tools/include/nolibc/arch.h index 82b43935650f..e276fb0680af 100644 --- a/tools/include/nolibc/arch.h +++ b/tools/include/nolibc/arch.h @@ -25,6 +25,8 @@ #include "arch-aarch64.h" #elif defined(__mips__) && defined(_ABIO32) #include "arch-mips.h" +#elif defined(__powerpc__) +#include "arch-powerpc.h" #elif defined(__riscv) #include "arch-riscv.h" #elif defined(__s390x__) From patchwork Wed Jul 26 14:50:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 707298 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A966C001DC for ; Wed, 26 Jul 2023 14:52:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233701AbjGZOwC (ORCPT ); Wed, 26 Jul 2023 10:52:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38226 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232277AbjGZOwA (ORCPT ); Wed, 26 Jul 2023 10:52:00 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.155.65.254]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BCD7D19A0; Wed, 26 Jul 2023 07:51:58 -0700 (PDT) X-QQ-mid: bizesmtp74t1690383109tpb94mlh Received: from localhost.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 26 Jul 2023 22:51:48 +0800 (CST) X-QQ-SSF: 01200000000000D0X000000A0000000 X-QQ-FEAT: OtIeQkg1QQHHCIiiAVCObq1XZpMiZZrep3CdnHIkv0Cbq1h4RDrOm7rMYOmUZ TPmC2nvXS5zvaOqkRcYFP7EfRTxQFyzdfssN9/Zr9xCoiY3tRyPj8srSEwFivyx8xeQaLQX b3Odf2maFdKYvMj0gCu2tmb4PLz2APzE+8iPcs1RsXJWOiOSXyUWSY4BvsyCLc/90ENTR0t vkfEksPIiQbt4oShglA/Z3TXba5fVnLCA5jXsgBn4u+TmtrrxNqAHTiAvJBk9QW/oXJw0GX yHdj+I2fEEDUD8nlIrzcPleDk+h/UglC9Cr8TQPiTBTknIe75gEv+IJOBa/s3LWCAetWPu1 JqzNl/k0pRQXeSgeoZ6pjTQJDInAolTF/IwBwWez3jMOCp2mJukfmi+T11QwA== X-QQ-GoodBg: 0 X-BIZMAIL-ID: 1055855130666732953 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v2 2/7] tools/nolibc: add support for powerpc64 Date: Wed, 26 Jul 2023 22:50:46 +0800 Message-Id: <7a406115cb891105e554d2bebb3532a5de70f5ca.1690373704.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org This follows the 64-bit PowerPC ABI [1], refers to the slides: "A new ABI for little-endian PowerPC64 Design & Implementation" [2] and the musl code in arch/powerpc64/crt_arch.h. Firstly, stdu and clrrdi are used instead of stwu and clrrwi for powerpc64. Second, the stack frame size is increased to 32 bytes for powerpc64, 32 bytes is the minimal stack frame size supported described in [2]. Besides, the TOC pointer (GOT pointer) must be saved to r2. This works on both little endian and big endian 64-bit PowerPC. [1]: https://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.pdf [2]: https://www.llvm.org/devmtg/2014-04/PDFs/Talks/Euro-LLVM-2014-Weigand.pdf Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/include/nolibc/arch-powerpc.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/tools/include/nolibc/arch-powerpc.h b/tools/include/nolibc/arch-powerpc.h index caa943e1521a..d783ed0b5dbd 100644 --- a/tools/include/nolibc/arch-powerpc.h +++ b/tools/include/nolibc/arch-powerpc.h @@ -175,6 +175,19 @@ /* startup code */ void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector _start(void) { +#ifdef __powerpc64__ + /* On 64-bit PowerPC, save TOC/GOT pointer to r2 */ + extern char TOC __asm__ (".TOC."); + register volatile long r2 __asm__ ("r2") = (void *)&TOC - (void *)_start; + + __asm__ volatile ( + "mr 3, 1\n" /* save stack pointer to r3, as arg1 of _start_c */ + "clrrdi 1, 1, 4\n" /* align the stack to 16 bytes */ + "li 0, 0\n" /* zero the frame pointer */ + "stdu 1, -32(1)\n" /* the initial stack frame */ + "bl _start_c\n" /* transfer to c runtime */ + ); +#else __asm__ volatile ( "mr 3, 1\n" /* save stack pointer to r3, as arg1 of _start_c */ "clrrwi 1, 1, 4\n" /* align the stack to 16 bytes */ @@ -182,6 +195,7 @@ void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_ "stwu 1, -16(1)\n" /* the initial stack frame */ "bl _start_c\n" /* transfer to c runtime */ ); +#endif __builtin_unreachable(); } From patchwork Wed Jul 26 14:52:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 706801 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0734C001DC for ; Wed, 26 Jul 2023 14:53:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233927AbjGZOxb (ORCPT ); Wed, 26 Jul 2023 10:53:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233896AbjGZOxa (ORCPT ); Wed, 26 Jul 2023 10:53:30 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5C181FDD; Wed, 26 Jul 2023 07:53:27 -0700 (PDT) X-QQ-mid: bizesmtp81t1690383196tg3gh1y1 Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 26 Jul 2023 22:53:15 +0800 (CST) X-QQ-SSF: 01200000000000D0X000000A0000000 X-QQ-FEAT: CR3LFp2JE4lR8uPfZDf/0uFir0EsUHKoIwJEyr/UBQkcQtyYyGJy+e/6T2bhl ZIJRDpqjWmsEvMhs7TxXstjU/eRcQx+Luc8vn+wo2GlERyOOmhZlkyrA7rCWWu3ysV3Hh5I UU8ha4Ud4zqLREeTs0H1/xM7MXjt6HsVs81LVJLtY2KyZHbiem9ohokvXd/i211/VBPrP9F +OdRuATSNtWxecawtfJb6H179BBcc4xS9yMDAQDYKlW6aCjNfYy7J7++YZUSNun3rXu7aI5 2gfuXzzAhcprbvxAynbM0fN2eK83hWvon+GU4BHxvbIQ6kWPxNEphh0+vHGVPyK7sIz4tGR /Z3y5Wyeb+QS2e8Ly474VQH5TNpPj+voCBKRn8SmHq7xm11eXgdQb+pSzN3dXzON9v0UGrj X-QQ-GoodBg: 0 X-BIZMAIL-ID: 13127243865508606372 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v2 3/7] selftests/nolibc: add extra configs customize support Date: Wed, 26 Jul 2023 22:52:56 +0800 Message-Id: <06d7db26484ca13e583ddad43af1bc0e4a99674f.1690373704.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org The default DEFCONFIG_ may not always work for all architectures, some architectures require to add extra kernel config options, this allows to add extra options in the defconfig target. It allows to customize extra kernel config options via the common common.config and the architecture specific .config, at last trigger 'allnoconfig' to let them take effect with missing config options as disabled. The scripts/kconfig/merge_config.sh tool is used to merge the extra config files. Suggested-by: Thomas Weißschuh Link: https://lore.kernel.org/lkml/67eb70d4-c9ff-4afc-bac7-7f36cc2c81bc@t-8ch.de/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index f42adef87e12..9576f1a0a98d 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -39,6 +39,9 @@ DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig DEFCONFIG = $(DEFCONFIG_$(ARCH)) +# extra kernel config files under configs/, include common + architecture specific +EXTCONFIG = common.config $(ARCH).config + # optional tests to run (default = all) TEST = @@ -161,6 +164,8 @@ initramfs: nolibc-test defconfig: $(Q)$(MAKE) -C $(srctree) ARCH=$(ARCH) CC=$(CC) CROSS_COMPILE=$(CROSS_COMPILE) mrproper $(DEFCONFIG) prepare + $(Q)$(srctree)/scripts/kconfig/merge_config.sh -O "$(srctree)" -m "$(srctree)/.config" $(foreach c,$(EXTCONFIG),$(wildcard $(CURDIR)/configs/$c)) + $(Q)$(MAKE) -C $(srctree) ARCH=$(ARCH) CC=$(CC) CROSS_COMPILE=$(CROSS_COMPILE) KCONFIG_ALLCONFIG="$(srctree)/.config" allnoconfig kernel: initramfs $(Q)$(MAKE) -C $(srctree) ARCH=$(ARCH) CC=$(CC) CROSS_COMPILE=$(CROSS_COMPILE) $(IMAGE_NAME) CONFIG_INITRAMFS_SOURCE=$(CURDIR)/initramfs From patchwork Wed Jul 26 14:54:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 707297 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EC53C001B0 for ; Wed, 26 Jul 2023 14:54:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234075AbjGZOyu (ORCPT ); Wed, 26 Jul 2023 10:54:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234024AbjGZOyt (ORCPT ); Wed, 26 Jul 2023 10:54:49 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F10D2135; Wed, 26 Jul 2023 07:54:45 -0700 (PDT) X-QQ-mid: bizesmtp67t1690383276tza3l49q Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 26 Jul 2023 22:54:34 +0800 (CST) X-QQ-SSF: 01200000000000D0X000000A0000000 X-QQ-FEAT: r/cTxDoDoiFjb4JVRsMIgBybvgGHeXlw6CGhAu8N0T0dgbDdPlnhEzj5qjA9U RGODEI2n+1TT4nmIX3JXDAh/Z5olvgc1R5vAdtpGjKPrv4ckIFp3ciD1SXhl8sVkSEA75zM nXA6uJ4mZOYuQgqiQhrwISXcL7SvqvKH93rc7xvehVM1kQA4jEPe/JMduL8gOoO15+tnCuy YT0lx5a3u465mj5R1oz78QjysAdkkwIn1/PCC3x5nHK5wKVL76lSai4M9WxQcxfxHeHEm4j 4eiCoeNzvQIX+FqBJiLoFB2bthvw0UAf7ZeLLj6s1GFT1mKLud6P3dLdbXIVTIe/10n6fF+ Z3Q7mbKNdvYhXT56sEwKXo1ydqP20Q6TXk8m0bSJt3/BBFSHTDLroEdklq3mELFUS6w0XYG leSO6sakNHw= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 7571784619353913893 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v2 4/7] selftests/nolibc: add XARCH and ARCH mapping support Date: Wed, 26 Jul 2023 22:54:23 +0800 Message-Id: <4260bf6df7417ba5395e7a1f71609690bbd11b17.1690373704.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Most of the CPU architectures have different variants, but kernel usually only accept parts of them via the ARCH variable, the others should be customized via kernel config file. To simplify testing, the external ARCH variable is extended to accept more CPU variants from user's input, a new internal XARCH variable is added to save users' ARCH input and used to customize variant specific variables, at last convert XARCH to the internal ARCH variable acceptable by kernel: e.g. make run-user ARCH= | v external ARCH from cmdline -> internal XARCH -> internal ARCH for kernel | `--> variant specific variables XARCH and ARCH are carefully mapped to allow users to pass architecture variants via external ARCH (or XARCH) from cmdline: - From developers' perspective - XARCH records the architecture variant from user's ARCH input, after 'override ARCH', ARCH is overridden by the one supported by kernel - Map from XARCH to the kernel supported ARCH: 'ARCH_ = ' - Configure a default variant for kernel supported ARCH: 'XARCH_ = ' - From users' perspective - ARCH (or XARCH) are architecture variants of a target architecture - the variants are XARCH names from the "ARCH_ = " mapping list Suggested-by: Willy Tarreau Link: https://lore.kernel.org/lkml/20230702171715.GD16233@1wt.eu/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 27 ++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 9576f1a0a98d..f04ec1cc132b 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -14,6 +14,14 @@ include $(srctree)/scripts/subarch.include ARCH = $(SUBARCH) endif +# XARCH is used to save user-input ARCH variant +# allow configure default variant for target ARCH +XARCH := $(or $(XARCH_$(ARCH)),$(ARCH)) + +# ARCH is supported by kernel +# map from user-input variant to kernel-supported +override ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) + # kernel image names by architecture IMAGE_i386 = arch/x86/boot/bzImage IMAGE_x86_64 = arch/x86/boot/bzImage @@ -24,7 +32,7 @@ IMAGE_mips = vmlinuz IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage IMAGE_loongarch = arch/loongarch/boot/vmlinuz.efi -IMAGE = $(IMAGE_$(ARCH)) +IMAGE = $(IMAGE_$(XARCH)) IMAGE_NAME = $(notdir $(IMAGE)) # default kernel configurations that appear to be usable @@ -37,10 +45,10 @@ DEFCONFIG_mips = malta_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig -DEFCONFIG = $(DEFCONFIG_$(ARCH)) +DEFCONFIG = $(DEFCONFIG_$(XARCH)) # extra kernel config files under configs/, include common + architecture specific -EXTCONFIG = common.config $(ARCH).config +EXTCONFIG = common.config $(XARCH).config # optional tests to run (default = all) TEST = @@ -55,7 +63,7 @@ QEMU_ARCH_mips = mipsel # works with malta_defconfig QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x QEMU_ARCH_loongarch = loongarch64 -QEMU_ARCH = $(QEMU_ARCH_$(ARCH)) +QEMU_ARCH = $(QEMU_ARCH_$(XARCH)) # QEMU_ARGS : some arch-specific args to pass to qemu QEMU_ARGS_i386 = -M pc -append "console=ttyS0,9600 i8042.noaux panic=-1 $(TEST:%=NOLIBC_TEST=%)" @@ -67,7 +75,7 @@ QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_loongarch = -M virt -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)" -QEMU_ARGS = $(QEMU_ARGS_$(ARCH)) $(QEMU_ARGS_EXTRA) +QEMU_ARGS = $(QEMU_ARGS_$(XARCH)) $(QEMU_ARGS_EXTRA) # OUTPUT is only set when run from the main makefile, otherwise # it defaults to this nolibc directory. @@ -84,7 +92,7 @@ CFLAGS_mips = -EL CFLAGS_STACKPROTECTOR ?= $(call cc-option,-mstack-protector-guard=global $(call cc-option,-fstack-protector-all)) CFLAGS ?= -Os -fno-ident -fno-asynchronous-unwind-tables -std=c89 \ $(call cc-option,-fno-stack-protector) \ - $(CFLAGS_$(ARCH)) $(CFLAGS_STACKPROTECTOR) + $(CFLAGS_$(XARCH)) $(CFLAGS_STACKPROTECTOR) LDFLAGS := -s REPORT ?= awk '/\[OK\][\r]*$$/{p++} /\[FAIL\][\r]*$$/{if (!f) printf("\n"); f++; print;} /\[SKIPPED\][\r]*$$/{s++} \ @@ -102,7 +110,7 @@ help: @echo " run-user runs the executable under QEMU (uses \$$ARCH, \$$TEST)" @echo " initramfs prepare the initramfs with nolibc-test" @echo " defconfig create a fresh new default config (uses \$$ARCH)" - @echo " kernel (re)build the kernel with the initramfs (uses \$$ARCH)" + @echo " kernel (re)build the kernel with the initramfs (uses $$ARCH)" @echo " run runs the kernel in QEMU after building it (uses \$$ARCH, \$$TEST)" @echo " rerun runs a previously prebuilt kernel in QEMU (uses \$$ARCH, \$$TEST)" @echo " clean clean the sysroot, initramfs, build and output files" @@ -111,12 +119,13 @@ help: @echo "" @echo "Currently using the following variables:" @echo " ARCH = $(ARCH)" + @echo " XARCH = $(XARCH)" @echo " CROSS_COMPILE = $(CROSS_COMPILE)" @echo " CC = $(CC)" @echo " OUTPUT = $(OUTPUT)" @echo " TEST = $(TEST)" - @echo " QEMU_ARCH = $(if $(QEMU_ARCH),$(QEMU_ARCH),UNKNOWN_ARCH) [determined from \$$ARCH]" - @echo " IMAGE_NAME = $(if $(IMAGE_NAME),$(IMAGE_NAME),UNKNOWN_ARCH) [determined from \$$ARCH]" + @echo " QEMU_ARCH = $(if $(QEMU_ARCH),$(QEMU_ARCH),UNKNOWN_ARCH) [determined from \$$XARCH]" + @echo " IMAGE_NAME = $(if $(IMAGE_NAME),$(IMAGE_NAME),UNKNOWN_ARCH) [determined from \$$XARCH]" @echo "" all: run From patchwork Wed Jul 26 14:55:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 706800 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57998C001B0 for ; Wed, 26 Jul 2023 14:56:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233512AbjGZO4K (ORCPT ); Wed, 26 Jul 2023 10:56:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230274AbjGZO4J (ORCPT ); Wed, 26 Jul 2023 10:56:09 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CFC91FD5; Wed, 26 Jul 2023 07:56:08 -0700 (PDT) X-QQ-mid: bizesmtp76t1690383358tz8ei4fh Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 26 Jul 2023 22:55:57 +0800 (CST) X-QQ-SSF: 01200000000000D0X000000A0000000 X-QQ-FEAT: W+onFc5Tw4OVzwOJZm5k8KvxSkEsnsN64TsPpeacOKxaHhDocq9TXESBjekfN vU2q0QZz1FwB2jNfOli98ZbJKInV4BF7Wigi636UynLXTUKzM+2/RnEf2n79/Kt4/IVo4M7 Wc/4kyJ+2wGj8FVltALvEe+seAzgOpby4FMSsgz8bQsZQ3wsJoM6iyNhIa+r2zopvJZWYTk UykZ7ci4ixTIOWC7tzRLPEKzn81fkkb86VVowpHdQmlnVudhx2hHLdJEhNe3bqVzo5lau1F nTMRE1wvCHe9ERvCUBC77a0cTUkm9HMkJ/QDbK07SZF0s9mOWDn9P8UNQAzFw3N1E9J3waH tG0ytQQCCjLjxWTs5rApJZHIafBbeulj+bhTPZNczvjpA0NTAtEWrAbIlHQJa4QrTH1cpbF bJhyiS/urx8= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 14700450311433595248 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v2 5/7] selftests/nolibc: add test support for ppc Date: Wed, 26 Jul 2023 22:55:42 +0800 Message-Id: <55603bb4aecb20561e63f9ab10563c0c470300b1.1690373704.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org The default qemu-system-ppc g3beige machine [1] is used to run 32-bit powerpc kernel. The pmac32_defconfig is used with extra PMACZILOG console options to enable normal print. Note, zImage doesn't boot due to "qemu-system-ppc: Some ROM regions are overlapping" error, so, vmlinux is used instead. Kernel uses ARCH=powerpc for both 32-bit and 64-bit PowerPC, here adds a ppc variant for 32-bit PowerPC and use it as the default variant of powerpc architecture. Users can pass ARCH=powerpc or ARCH=ppc to test 32-bit PowerPC. [1]: https://qemu.readthedocs.io/en/latest/system/ppc/powermac.html Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index f04ec1cc132b..0e9abb7f3d4f 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -16,10 +16,12 @@ endif # XARCH is used to save user-input ARCH variant # allow configure default variant for target ARCH +XARCH_powerpc = ppc XARCH := $(or $(XARCH_$(ARCH)),$(ARCH)) # ARCH is supported by kernel # map from user-input variant to kernel-supported +ARCH_ppc = powerpc override ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) # kernel image names by architecture @@ -29,6 +31,7 @@ IMAGE_x86 = arch/x86/boot/bzImage IMAGE_arm64 = arch/arm64/boot/Image IMAGE_arm = arch/arm/boot/zImage IMAGE_mips = vmlinuz +IMAGE_ppc = vmlinux IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage IMAGE_loongarch = arch/loongarch/boot/vmlinuz.efi @@ -42,6 +45,7 @@ DEFCONFIG_x86 = defconfig DEFCONFIG_arm64 = defconfig DEFCONFIG_arm = multi_v7_defconfig DEFCONFIG_mips = malta_defconfig +DEFCONFIG_ppc = pmac32_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig @@ -60,6 +64,7 @@ QEMU_ARCH_x86 = x86_64 QEMU_ARCH_arm64 = aarch64 QEMU_ARCH_arm = arm QEMU_ARCH_mips = mipsel # works with malta_defconfig +QEMU_ARCH_ppc = ppc QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x QEMU_ARCH_loongarch = loongarch64 @@ -72,6 +77,7 @@ QEMU_ARGS_x86 = -M pc -append "console=ttyS0,9600 i8042.noaux panic=-1 $( QEMU_ARGS_arm64 = -M virt -cpu cortex-a53 -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_arm = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" +QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_loongarch = -M virt -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)" From patchwork Wed Jul 26 14:57:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 706799 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2F7CC001DC for ; Wed, 26 Jul 2023 14:57:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234236AbjGZO5b (ORCPT ); Wed, 26 Jul 2023 10:57:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234177AbjGZO5X (ORCPT ); Wed, 26 Jul 2023 10:57:23 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.54.12]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2124A1FD5; Wed, 26 Jul 2023 07:57:20 -0700 (PDT) X-QQ-mid: bizesmtp67t1690383431tm86lr8y Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 26 Jul 2023 22:57:10 +0800 (CST) X-QQ-SSF: 00200000000000D0X000000A0000000 X-QQ-FEAT: jGGC4gWX7WHeFWhwhxO3Hveq3sSjr6fZllCDxklwiYrc9nm4mcpNtQxmWWNBa VvxEPE5vMcFZi8n2pz211ZvCgbuMdXoDtN1TIF+hbVoO0gqzi7zEuwo04zinOGnmc6ZAnWu B+OZpH2mC/7Ck6Xsj8KxUBX+4wP3h7xrSUTMouTgr9FMVn5EeDhNkTsrTF2yb7Vm71h5IKD +wUZqPZsSlR7Fkrc4xA+MkzdJO6LNW6juDf33sLvj8SlpDLBrwOVaDhFW40rAWytkCBysno pIoPP4IgsZdjxs8uyuDY1YgwQLpD9cnYgpEM6GZPGHm9CI81f2ey66o1EGghsWzHH68Qmzz E60SNRWV6kbzFnlsMk11SNjUMhetbLU1HNIoaEZ0x2IZEXCk5ClFxHgrFb9XBQeHGSG2gzl Zef0r7fk1EM= X-QQ-GoodBg: 0 X-BIZMAIL-ID: 5434013922193432542 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v2 6/7] selftests/nolibc: add test support for ppc64le Date: Wed, 26 Jul 2023 22:57:05 +0800 Message-Id: <0466baf61a3d501870af172686f81e8d30f95849.1690373704.git.falcon@tinylab.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Here adds test support for little endian 64-bit PowerPC. The powernv machine of qemu-system-ppc64le is used for there is just a working powernv_defconfig. As the document [1] shows: PowerNV (as Non-Virtualized) is the “bare metal” platform using the OPAL firmware. It runs Linux on IBM and OpenPOWER systems and it can be used as an hypervisor OS, running KVM guests, or simply as a host OS. Kernel uses ARCH=powerpc for both 32-bit and 64-bit PowerPC, here adds a ppc64le variant for little endian 64-bit PowerPC, users can pass ARCH=ppc64le to test it. Note, since the VSX support may be disabled in kernel side, to avoid "illegal instruction" errors due to missing VSX kernel support, let's simply let compiler not generate vector/scalar (VSX) instructions via the '-mno-vsx' option. [1]: https://qemu.readthedocs.io/en/latest/system/ppc/powernv.html Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index 0e9abb7f3d4f..cd46b97983a4 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -22,6 +22,7 @@ XARCH := $(or $(XARCH_$(ARCH)),$(ARCH)) # ARCH is supported by kernel # map from user-input variant to kernel-supported ARCH_ppc = powerpc +ARCH_ppc64le = powerpc override ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) # kernel image names by architecture @@ -32,6 +33,7 @@ IMAGE_arm64 = arch/arm64/boot/Image IMAGE_arm = arch/arm/boot/zImage IMAGE_mips = vmlinuz IMAGE_ppc = vmlinux +IMAGE_ppc64le = arch/powerpc/boot/zImage IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage IMAGE_loongarch = arch/loongarch/boot/vmlinuz.efi @@ -46,6 +48,7 @@ DEFCONFIG_arm64 = defconfig DEFCONFIG_arm = multi_v7_defconfig DEFCONFIG_mips = malta_defconfig DEFCONFIG_ppc = pmac32_defconfig +DEFCONFIG_ppc64le = powernv_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig DEFCONFIG_loongarch = defconfig @@ -65,6 +68,7 @@ QEMU_ARCH_arm64 = aarch64 QEMU_ARCH_arm = arm QEMU_ARCH_mips = mipsel # works with malta_defconfig QEMU_ARCH_ppc = ppc +QEMU_ARCH_ppc64le = ppc64le QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x QEMU_ARCH_loongarch = loongarch64 @@ -78,6 +82,7 @@ QEMU_ARGS_arm64 = -M virt -cpu cortex-a53 -append "panic=-1 $(TEST:%=NOLIBC QEMU_ARGS_arm = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" +QEMU_ARGS_ppc64le = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_loongarch = -M virt -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)" @@ -93,6 +98,7 @@ else Q=@ endif +CFLAGS_ppc64le = -m64 -mlittle-endian -Wl,-EL,-melf64ppc -mno-vsx CFLAGS_s390 = -m64 CFLAGS_mips = -EL CFLAGS_STACKPROTECTOR ?= $(call cc-option,-mstack-protector-guard=global $(call cc-option,-fstack-protector-all)) From patchwork Wed Jul 26 14:58:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhangjin Wu X-Patchwork-Id: 706798 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D1D4C0015E for ; Wed, 26 Jul 2023 14:58:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234300AbjGZO6l (ORCPT ); Wed, 26 Jul 2023 10:58:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234303AbjGZO6i (ORCPT ); Wed, 26 Jul 2023 10:58:38 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.155.65.254]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C52322109; Wed, 26 Jul 2023 07:58:34 -0700 (PDT) X-QQ-mid: bizesmtp80t1690383504t6indi1o Received: from linux-lab-host.localdomain ( [61.141.78.189]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 26 Jul 2023 22:58:23 +0800 (CST) X-QQ-SSF: 00200000000000D0X000000A0000000 X-QQ-FEAT: 3M0okmaRx3gx1YD2Y2f418atJWwTGw4XT79+ZSinD1pcTvQdp5vp8yaZAPG+u 1dIO2RbMGkkhE3rpPrhTRe8MgIaCw8FPcA7QKZA+3UoqASQn50CYyKkYfKj8corHE2bYiJ4 eZ5R32XDCRLR9jJRb7Lpk5WsLdMhTcjw8Pf44ZYWJRfBUWXXjwUkj/viXBJmwL7i9WxornL VG6ITcNFaZOYzjgScvBG55cKoGz0B67RU1ySgAhU8t4w73cvXq/n2VioN83mwCEeaEvoGci vv7KwRuaFtHXrCaIVA9YNeRT7opgR2ixS1w+vAf96+EM1+yhBMQW2sP4OMxC8aOaC0/oxbm FZehGxrsrPsSk/QtgDnXG2VROmYHV6dXBAD4Siw1707Ovyf/+UQr0mZmbCKu4brxTRMwMu8 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 18102331507296563561 From: Zhangjin Wu To: w@1wt.eu Cc: falcon@tinylab.org, arnd@arndb.de, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, thomas@t-8ch.de, =?utf-8?q?Thomas_Wei?= =?utf-8?q?=C3=9Fschuh?= Subject: [PATCH v2 7/7] selftests/nolibc: add test support for ppc64 Date: Wed, 26 Jul 2023 22:58:18 +0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvrgz:qybglogicsvrgz5a-1 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Here adds test support for big endian 64-bit PowerPC. The powernv machine of qemu-system-ppc64 is used with powernv_be_defconfig. As the document [1] shows: PowerNV (as Non-Virtualized) is the “bare metal” platform using the OPAL firmware. It runs Linux on IBM and OpenPOWER systems and it can be used as an hypervisor OS, running KVM guests, or simply as a host OS. Kernel uses ARCH=powerpc for both 32-bit and 64-bit PowerPC, here adds a ppc64 variant for big endian 64-bit PowerPC, users can pass ARCH=ppc64 to test it. Notes, - differs from little endian 64-bit PowerPC, vmlinux is used instead of zImage, because big endian zImage [2] only boot on qemu with x-vof=on (added from qemu v7.0) and a fixup patch [3] for qemu v7.0.51: - since the VSX support may be disabled in kernel side, to avoid "illegal instruction" errors due to missing VSX kernel support, let's simply let compiler not generate vector/scalar (VSX) instructions via the '-mno-vsx' option. - as 'man gcc' shows, '-mmultiple' is used to generate code that uses the load multiple word instructions and the store multiple word instructions. those instructions do not work when the processor is in little-endian mode (except PPC740/PPC750), so, we only enable it for big endian powerpc. [1]: https://qemu.readthedocs.io/en/latest/system/ppc/powernv.html [2]: https://github.com/linuxppc/issues/issues/402 [3]: https://lore.kernel.org/qemu-devel/20220504065536.3534488-1-aik@ozlabs.ru/ Reviewed-by: Thomas Weißschuh Signed-off-by: Zhangjin Wu --- tools/testing/selftests/nolibc/Makefile | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tools/testing/selftests/nolibc/Makefile b/tools/testing/selftests/nolibc/Makefile index cd46b97983a4..b751e9fdf30d 100644 --- a/tools/testing/selftests/nolibc/Makefile +++ b/tools/testing/selftests/nolibc/Makefile @@ -22,6 +22,7 @@ XARCH := $(or $(XARCH_$(ARCH)),$(ARCH)) # ARCH is supported by kernel # map from user-input variant to kernel-supported ARCH_ppc = powerpc +ARCH_ppc64 = powerpc ARCH_ppc64le = powerpc override ARCH := $(or $(ARCH_$(XARCH)),$(XARCH)) @@ -33,6 +34,7 @@ IMAGE_arm64 = arch/arm64/boot/Image IMAGE_arm = arch/arm/boot/zImage IMAGE_mips = vmlinuz IMAGE_ppc = vmlinux +IMAGE_ppc64 = vmlinux IMAGE_ppc64le = arch/powerpc/boot/zImage IMAGE_riscv = arch/riscv/boot/Image IMAGE_s390 = arch/s390/boot/bzImage @@ -48,6 +50,7 @@ DEFCONFIG_arm64 = defconfig DEFCONFIG_arm = multi_v7_defconfig DEFCONFIG_mips = malta_defconfig DEFCONFIG_ppc = pmac32_defconfig +DEFCONFIG_ppc64 = powernv_be_defconfig DEFCONFIG_ppc64le = powernv_defconfig DEFCONFIG_riscv = defconfig DEFCONFIG_s390 = defconfig @@ -68,6 +71,7 @@ QEMU_ARCH_arm64 = aarch64 QEMU_ARCH_arm = arm QEMU_ARCH_mips = mipsel # works with malta_defconfig QEMU_ARCH_ppc = ppc +QEMU_ARCH_ppc64 = ppc64 QEMU_ARCH_ppc64le = ppc64le QEMU_ARCH_riscv = riscv64 QEMU_ARCH_s390 = s390x @@ -82,6 +86,7 @@ QEMU_ARGS_arm64 = -M virt -cpu cortex-a53 -append "panic=-1 $(TEST:%=NOLIBC QEMU_ARGS_arm = -M virt -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_mips = -M malta -append "panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_ppc = -M g3beige -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" +QEMU_ARGS_ppc64 = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_ppc64le = -M powernv -append "console=hvc0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_riscv = -M virt -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" QEMU_ARGS_s390 = -M s390-ccw-virtio -m 1G -append "console=ttyS0 panic=-1 $(TEST:%=NOLIBC_TEST=%)" @@ -98,6 +103,7 @@ else Q=@ endif +CFLAGS_ppc64 = -m64 -mbig-endian -Wl,-EB,-melf64ppc -mmultiple -mno-vsx CFLAGS_ppc64le = -m64 -mlittle-endian -Wl,-EL,-melf64ppc -mno-vsx CFLAGS_s390 = -m64 CFLAGS_mips = -EL