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[176.184.27.79]) by smtp.gmail.com with ESMTPSA id ja24-20020a170907989800b00992b8d56f3asm1429260ejc.105.2023.08.18.10.20.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Aug 2023 10:20:24 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Jiajie Chen , Song Gao Subject: [PATCH v2 1/8] target/loongarch: Log I/O write accesses to CSR registers Date: Fri, 18 Aug 2023 19:20:09 +0200 Message-ID: <20230818172016.24504-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230818172016.24504-1-philmd@linaro.org> References: <20230818172016.24504-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=philmd@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Various CSR registers have Read/Write fields. We might want to see guest trying to change such registers. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Song Gao --- target/loongarch/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index ad93ecac92..7107968699 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -544,6 +544,8 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) static void loongarch_qemu_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { + qemu_log_mask(LOG_UNIMP, "[%s]: Unimplemented reg 0x%" HWADDR_PRIx "\n", + __func__, addr); } static uint64_t loongarch_qemu_read(void *opaque, hwaddr addr, unsigned size) From patchwork Fri Aug 18 17:20:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 714677 Delivered-To: patch@linaro.org Received: by 2002:a5d:484e:0:b0:317:ecd7:513f with SMTP id n14csp632332wrs; Fri, 18 Aug 2023 10:21:07 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFWLRIAiSENuHyP/3EzoSDBeSoHEiXb+gxupslFw4A1nVNdWj5ECk2XeDUKbW7WjGfdlFbM X-Received: by 2002:a05:6870:1603:b0:1bb:b025:3e87 with SMTP id b3-20020a056870160300b001bbb0253e87mr3748233oae.58.1692379267431; Fri, 18 Aug 2023 10:21:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1692379267; cv=none; d=google.com; s=arc-20160816; b=a8qaVtzcJnzvHr08UL7qJwTXNLPmt27vW4Q5pfcLqzQ5Mknu47xMUc/vUJNyo2cBMv gZ+hwFQcm31jq2l3JHiwub4dMoANgQavatmiOuGwrrbficcYfTlvhRku3dhDQhvpXXZn 9y6qdEJLC020WK3zJeeTEyHM3am8mwQVbtlQoPisDzRku8GdMHahUpN9s9csL8jdpn1k +FSatRDQj9Rbc400N1vobeO8AGTQZonIiSLVc1+vAxkmNHyqITcOs3MHapTax+MpRWiK L0ts5IWtk/Z/X2Sxd6mDd8khuc7h+nEh54GvcF3lgADYpicK8GnQQRoVkm+hERviZXVp z4pQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=KDDiUObgQlqnPEjumWcjcKFBdygOD4fC1QpRcXk6j3k=; fh=r/JHKP8J9R2uTR7nHOCSLBWmfdDcyFCnoeAYTYM6zJY=; b=oKdzxE2k/TuyXzX2QjfIPLnhK057PRWmhO07FcOzkJRt4VxbM1pNAzOz0ww6y9sx0a JYRGr7GCmPSBzQTp4KKZArqNI9H/8bUvUrxHoZ8ENHph2sxkSYgpTuO9HvrLuvYQfxXh QCTznjyWvipmQ1PFRn3rXgrufhsJsLuweQk7HhpFjOC1x0l/8dj3agN07JQ1AvOYckYM Oo+ER69rdxVfZIr4k0Nxp1S1oNe+2cRpeHoL/xyU4i0TyDm06pvGSDfeIt/cekE2RUQ/ 2afO5fUCj7HA3J9cW8c5VHuZ0Yv+MfAAvOaASQxKupZZ6+fh6tlFxN0i7yGwIfZ5BTb7 yviA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tApuWAVl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.79]) by smtp.gmail.com with ESMTPSA id c17-20020a1709060fd100b0098ce63e36e9sm1444269ejk.16.2023.08.18.10.20.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Aug 2023 10:20:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Jiajie Chen , Song Gao , Richard Henderson Subject: [PATCH v2 2/8] target/loongarch: Remove duplicated disas_set_info assignment Date: Fri, 18 Aug 2023 19:20:10 +0200 Message-ID: <20230818172016.24504-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230818172016.24504-1-philmd@linaro.org> References: <20230818172016.24504-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Commit 228021f05e ("target/loongarch: Add core definition") sets disas_set_info to loongarch_cpu_disas_set_info. Probably due to a failed git-rebase, commit ca61e75071 ("target/loongarch: Add gdb support") also sets it to the same value. Remove the duplication. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Song Gao --- target/loongarch/cpu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 7107968699..dc617be36f 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -723,7 +723,6 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) cc->disas_set_info = loongarch_cpu_disas_set_info; cc->gdb_read_register = loongarch_cpu_gdb_read_register; cc->gdb_write_register = loongarch_cpu_gdb_write_register; - cc->disas_set_info = loongarch_cpu_disas_set_info; cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "loongarch-base64.xml"; cc->gdb_stop_before_watchpoint = true; From patchwork Fri Aug 18 17:20:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 714682 Delivered-To: patch@linaro.org Received: by 2002:a5d:484e:0:b0:317:ecd7:513f with SMTP id n14csp632628wrs; Fri, 18 Aug 2023 10:21:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHSwGASlxl8Tc79NXOYHpH50UKLO7dnXH5gCnqKVFQkdqlVsSFzmxQgxz73R1qgvGBzCIHp X-Received: by 2002:a0c:e050:0:b0:63d:6755:d1cd with SMTP id y16-20020a0ce050000000b0063d6755d1cdmr3368441qvk.16.1692379301151; Fri, 18 Aug 2023 10:21:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1692379301; cv=none; d=google.com; s=arc-20160816; b=lgkUPtpr1VnWJ0NDChV6wj+EJqcMKGE7G5wS08q/QBl6GGugItml+XKim3EJ5fghgP TvGCd/znw4DSLZO8T5hEW7KnbaDx4zIgZ6iZHM7ZEk51HakcBBNDOfualOgeSE6G7HsB NduyL87M5q2eZPvoCGwo+ktZtHF+oL7nUYiC8Wz5oL2Wt06fCQdFQRgrwsG8RCk8BP7+ 7t3aY21LjohkBBBva3gfMRjXvHGyDhVvDKpFOcl5JUzl7LyizA4WlxrVvcK/7HpOd+DI yavI1L6MY2XljJIyb9flZyoxYPgimA/lWyzazBuKKeRYzp9MMa/4pHul+OSDkfUNr+yM f3Bg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=BKQfb1Masg0LUXafLP8DDVqoNx75e63Lg2kg56KHPJU=; fh=r/JHKP8J9R2uTR7nHOCSLBWmfdDcyFCnoeAYTYM6zJY=; b=vek37CMNTduwWz1FupLLCqW54/7D/Q/VMo5WjL4rTlx+Vv8LgjF50v2WUTaeybDKO+ 90ceicIgdoLg7D19mBpDJlh0fz9L15ECYEGUKgkndfYtBezgCpE4j4aukYb+4IaDn8b8 bTBH+7LqyFP2U7bqvZuF5KrK0dVe5jeU8fzNK1tjChk8Zo/h02/sCWuNFud389Bwq7Vb H72pV9fLm0tcpWq8SSV/+itnPCaC3ox9NwBSl1a692swJcVFZaa0Tm8lINYds+5Q/F27 iU/1WSCHqSoKc3zIfeAksfPQG3ShqVzpDXCV54tegFvbm8oSQJxuPmnZs0s1R2ul6iM9 B+Lg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gAelpra3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.79]) by smtp.gmail.com with ESMTPSA id lg5-20020a170906f88500b009937dbabbd5sm1404250ejb.220.2023.08.18.10.20.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Aug 2023 10:20:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Jiajie Chen , Song Gao , Richard Henderson Subject: [PATCH v2 3/8] target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW Date: Fri, 18 Aug 2023 19:20:11 +0200 Message-ID: <20230818172016.24504-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230818172016.24504-1-philmd@linaro.org> References: <20230818172016.24504-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=philmd@linaro.org; helo=mail-lf1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Song Gao Reviewed-by: Richard Henderson Signed-off-by: Song Gao Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20230817093121.1053890-11-gaosong@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index dc617be36f..a1ebc20330 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -391,6 +391,7 @@ static void loongarch_la464_initfn(Object *obj) data = FIELD_DP32(data, CPUCFG2, LSX, 1), data = FIELD_DP32(data, CPUCFG2, LLFTP, 1); data = FIELD_DP32(data, CPUCFG2, LLFTP_VER, 1); + data = FIELD_DP32(data, CPUCFG2, LSPW, 1); data = FIELD_DP32(data, CPUCFG2, LAM, 1); env->cpucfg[2] = data; From patchwork Fri Aug 18 17:20:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 714679 Delivered-To: patch@linaro.org Received: by 2002:a5d:484e:0:b0:317:ecd7:513f with SMTP id n14csp632394wrs; Fri, 18 Aug 2023 10:21:17 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHeeaVfgR9pziY2i8Q/PZcpGlZ/3yjiiijGwD6BwQk4+AXyEkbbohBGfVCdGlQ1quBvHWyE X-Received: by 2002:a05:620a:280b:b0:76d:7a99:9e43 with SMTP id f11-20020a05620a280b00b0076d7a999e43mr3908478qkp.18.1692379276945; Fri, 18 Aug 2023 10:21:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1692379276; cv=none; d=google.com; s=arc-20160816; b=bAIjXV3gNuKMjDUk8J8dLHK4r8hHHVp0spKvofZRvTDCzIHKXSRgorereLxqj83EUx u/eK0O/usRk1dVflK4RXRLINPiFOElMCv2rka5GE5TN2GETos1gOd1bxMH8xh5R+WtG1 7dL4DiLEPTZ9xPVzcA2auR/KGFPZuwtcbKb183FjvdBdXPHPgsRmxGHsOeAfjVS/5Msb ir5M1OoDaasV1/ZV78Z+UNvZHMibXFit9n9XQeGy0D+f1RJ8idPLdCy1pwjjxADXiMC3 TOgZqSQ5pzKv0vb3W0ZX8hh7EsGfUFRqNv3L3mqwwlsL2Xw9cepgtznKZIFO5mNnmdKO rcmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=BYPEbS+9l3jGhhkth1Vm4/5ZlIy93oIVK2+Qb11CVCo=; fh=L83jzy0hhBVNaLcKX8Elyc9wPnQzNxExr67xNuVQva4=; b=CqYXsUwdcWiHCGt3hqVJl5Yg3fofKstNI9BMZ5G2okyIjxOK8/zMbQbyKjOcrD4gER DpUuV02QNy3vPkZbmf+CymetH6ROMQuK1XQIEPM9tREOTXfbIM+bYwfRxyRMx3eDuR73 bBX6zZFvULtCGu0ykemN+iScXZ1EsOl/YeASXUyjqajBgdYmwK2Lw/fHwQYLEb9HCHKX dKlGenFMy/RuRzIK7Hxv0X15f/eNr4IJ197pigqgubSTYMu2sVukzrt2f9oBoakjyNiQ hkfoLo0DT7vpHO19FgefCgYcEVAQ4TP1ARThaQw0k0Wjs4RbtaQ4OaCgRI0UIytYPVnd EZbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YHn+iG5u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.79]) by smtp.gmail.com with ESMTPSA id gq6-20020a170906e24600b0099c53c44083sm1411375ejb.79.2023.08.18.10.20.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Aug 2023 10:20:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Jiajie Chen , Song Gao Subject: [PATCH v2 4/8] target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPU Date: Fri, 18 Aug 2023 19:20:12 +0200 Message-ID: <20230818172016.24504-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230818172016.24504-1-philmd@linaro.org> References: <20230818172016.24504-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=philmd@linaro.org; helo=mail-lj1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In preparation of introducing TYPE_LOONGARCH32_CPU, introduce an abstract TYPE_LOONGARCH64_CPU. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/loongarch/cpu.h | 1 + target/loongarch/cpu.c | 12 +++++++++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index fa371ca8ba..c50b3a5ef3 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -377,6 +377,7 @@ struct ArchCPU { }; #define TYPE_LOONGARCH_CPU "loongarch-cpu" +#define TYPE_LOONGARCH64_CPU "loongarch64-cpu" OBJECT_DECLARE_CPU_TYPE(LoongArchCPU, LoongArchCPUClass, LOONGARCH_CPU) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index a1ebc20330..34d6c5a31d 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -734,9 +734,9 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) #endif } -#define DEFINE_LOONGARCH_CPU_TYPE(model, initfn) \ +#define DEFINE_LOONGARCH_CPU_TYPE(size, model, initfn) \ { \ - .parent = TYPE_LOONGARCH_CPU, \ + .parent = TYPE_LOONGARCH##size##_CPU, \ .instance_init = initfn, \ .name = LOONGARCH_CPU_TYPE_NAME(model), \ } @@ -752,7 +752,13 @@ static const TypeInfo loongarch_cpu_type_infos[] = { .class_size = sizeof(LoongArchCPUClass), .class_init = loongarch_cpu_class_init, }, - DEFINE_LOONGARCH_CPU_TYPE("la464", loongarch_la464_initfn), + { + .name = TYPE_LOONGARCH64_CPU, + .parent = TYPE_LOONGARCH_CPU, + + .abstract = true, + }, + DEFINE_LOONGARCH_CPU_TYPE(64, "la464", loongarch_la464_initfn), }; DEFINE_TYPES(loongarch_cpu_type_infos) From patchwork Fri Aug 18 17:20:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 714678 Delivered-To: patch@linaro.org Received: by 2002:a5d:484e:0:b0:317:ecd7:513f with SMTP id n14csp632342wrs; Fri, 18 Aug 2023 10:21:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IECKBJ7uP7xVj9wTq44xb2+bTH5tX6Xq2I1unx2IRpY6PybwQblIVG5HBJIqacCpvfkKxC1 X-Received: by 2002:a0c:f211:0:b0:63c:f630:8bba with SMTP id h17-20020a0cf211000000b0063cf6308bbamr3185894qvk.53.1692379269434; Fri, 18 Aug 2023 10:21:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1692379269; cv=none; d=google.com; s=arc-20160816; b=Gu8q+19M1JJiAzVV4SCgLmKZ6bS/qp9R1n/9znTZnLgTFe1LTdkLokoj5tfSxRimtD 5G+k1NHjR9a10beTMEzX9CQACOEey87RRal0pcnCHXtOfztZ56pf0AVn5JEDMpoT0+wM 4soemyWnZ3b79WRwlB7nt428ndouD4mr1iMs3CeARlIUtqHmliIGE8bv6BsIire1JJ2/ g6DPOKakuvLlH9p9j/g4WxRR/brwJcTywG++NEFEmhVyvEdY4gAKpS99Vx0AKDkKshsl mz2l+lb1m6Xp/Y76brnY4b9yIy0crYYJ/tpMF9JqtVmlJroxLkcVw8LqyC4fIwrCW1KI EMTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IoHDoN5cg3pTvtc6lY6oBNri3TvAxKVoaXExBdNi1sc=; fh=L83jzy0hhBVNaLcKX8Elyc9wPnQzNxExr67xNuVQva4=; b=eEDndozjGWaOrUxrpa9Iw10PorLvGGqyQ4jVldkxXIJMhD5q6K6plJafyiqKxLOLm1 PG5IQpB4BkO5jN4IY1ZLdrq4d2kj0j3s/219vIPa6LIzCChg1IpIObId2+tVhQP9mveX OecUA3ij90+naTE5vdO8ZaTR21edONDd96tXhEDj0O3KOxgQSVFYZVvLzaa2r8SUatbl /XvlWbxZ5gEiJFQD6jOFI3PQBcRW09VQJ/Bf4MtNfIcoRVMg2YRyQ56JS52MLwSBKZ7u yY8TnoQFYVZw65waw6MbAAhtMGILf+hYCqP5bUYT+mqyVlp0uF/YRORBEIdi5XOLexRd MPkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fKI3FbqM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.79]) by smtp.gmail.com with ESMTPSA id z14-20020a1709064e0e00b0099293cdbc98sm1427558eju.145.2023.08.18.10.20.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Aug 2023 10:20:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Jiajie Chen , Song Gao Subject: [PATCH v2 5/8] target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_init Date: Fri, 18 Aug 2023 19:20:13 +0200 Message-ID: <20230818172016.24504-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230818172016.24504-1-philmd@linaro.org> References: <20230818172016.24504-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=philmd@linaro.org; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Extract loongarch64 specific code from loongarch_cpu_class_init() to a new loongarch64_cpu_class_init(). In preparation of supporting loongarch32 cores, rename these functions using the '64' suffix. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/loongarch/cpu.c | 27 +++++++++++++++++---------- 1 file changed, 17 insertions(+), 10 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 34d6c5a31d..356d039560 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -356,7 +356,7 @@ static bool loongarch_cpu_has_work(CPUState *cs) #endif } -static void loongarch_la464_initfn(Object *obj) +static void loongarch64_la464_initfn(Object *obj) { LoongArchCPU *cpu = LOONGARCH_CPU(obj); CPULoongArchState *env = &cpu->env; @@ -695,11 +695,6 @@ static const struct SysemuCPUOps loongarch_sysemu_ops = { }; #endif -static gchar *loongarch_gdb_arch_name(CPUState *cs) -{ - return g_strdup("loongarch64"); -} - static void loongarch_cpu_class_init(ObjectClass *c, void *data) { LoongArchCPUClass *lacc = LOONGARCH_CPU_CLASS(c); @@ -724,16 +719,27 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) cc->disas_set_info = loongarch_cpu_disas_set_info; cc->gdb_read_register = loongarch_cpu_gdb_read_register; cc->gdb_write_register = loongarch_cpu_gdb_write_register; - cc->gdb_num_core_regs = 35; - cc->gdb_core_xml_file = "loongarch-base64.xml"; cc->gdb_stop_before_watchpoint = true; - cc->gdb_arch_name = loongarch_gdb_arch_name; #ifdef CONFIG_TCG cc->tcg_ops = &loongarch_tcg_ops; #endif } +static gchar *loongarch64_gdb_arch_name(CPUState *cs) +{ + return g_strdup("loongarch64"); +} + +static void loongarch64_cpu_class_init(ObjectClass *c, void *data) +{ + CPUClass *cc = CPU_CLASS(c); + + cc->gdb_num_core_regs = 35; + cc->gdb_core_xml_file = "loongarch-base64.xml"; + cc->gdb_arch_name = loongarch64_gdb_arch_name; +} + #define DEFINE_LOONGARCH_CPU_TYPE(size, model, initfn) \ { \ .parent = TYPE_LOONGARCH##size##_CPU, \ @@ -757,8 +763,9 @@ static const TypeInfo loongarch_cpu_type_infos[] = { .parent = TYPE_LOONGARCH_CPU, .abstract = true, + .class_init = loongarch64_cpu_class_init, }, - DEFINE_LOONGARCH_CPU_TYPE(64, "la464", loongarch_la464_initfn), + DEFINE_LOONGARCH_CPU_TYPE(64, "la464", loongarch64_la464_initfn), }; DEFINE_TYPES(loongarch_cpu_type_infos) From patchwork Fri Aug 18 17:20:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 714680 Delivered-To: patch@linaro.org Received: by 2002:a5d:484e:0:b0:317:ecd7:513f with SMTP id n14csp632567wrs; Fri, 18 Aug 2023 10:21:34 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF8AUm3XMnsS+80TSBpAS2aNFQ8bOe+HP7aIDInOV3qlsDyoHAb+smL8YrjKkYLSnxSayk8 X-Received: by 2002:ae9:e107:0:b0:767:6c4:add1 with SMTP id g7-20020ae9e107000000b0076706c4add1mr3252392qkm.45.1692379294755; Fri, 18 Aug 2023 10:21:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1692379294; cv=none; d=google.com; s=arc-20160816; b=WMwaaBRTNrS89NF8+7VJ+xzgmIOghZsEM/MZgvbTbhflEM3jCk+FobEf9rDTifX6te Zkcg2Zc56HrQepTfmrLJLYuBm7UpnN10PIgQm5a+rxs8VPCs8N1eBjN9E62ject7ZbJo swAGHr+QRUO83A3+nkvEUPDBF0s39Q0Jxx39/1EHF1t7XuAWan54FsCzouV5+LLxOojd XQbsge3BaVdX7phLOVGtdXnwuLuqTJZbHxNTKjBE4kpVhd+YK2Pu4dwHalWX8hjNruvM +7ty/v3kxwbyQ/DCWwKpnUawXZZe/8ZIjjZ/L+PNBUOqig+xfdjvk0UueaewZhbA4kQn +3+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9/is4OP2bMjv02N4bH1oF/ePbIH9KS0BSaVmzaTcaDA=; fh=r/JHKP8J9R2uTR7nHOCSLBWmfdDcyFCnoeAYTYM6zJY=; b=F2y8Pi/+SqKHV9MzrLvvmGV1DmZeemWa9N/xzKtjmBxr1BxyVjhXcX3chy6i7cUHBi fgBPggPTpyc2IJ+60LzEhJ5I6xpPFlajlseD45nGp3b4ma9euBrhDdE4U1Fyu2tWMXpA 4AWTz5VTK/+JOe+V9PLEqHBcU57Qnu/QYxhHvvmu3qnOTAgbU3RaewBYe5I4ZN4UOIxR VmRjUaemKhQBmv0p/B2Pr9meYgbfp49YoF3XF9bgO49s2gxBtPlD2rNriJc2syMz2GKJ 7x2z39K2Yqnb7RhV3iKChwqoU0Lo4j89f5PhUUvS4Zw8gW671KfewDzO/9iqfy3WGE36 OUgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dA5WUZ0S; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.79]) by smtp.gmail.com with ESMTPSA id w9-20020a056402070900b00525683f9b2fsm1289223edx.5.2023.08.18.10.20.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Aug 2023 10:20:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Jiajie Chen , Song Gao , Richard Henderson Subject: [PATCH v2 6/8] target/loongarch: Add function to check current arch Date: Fri, 18 Aug 2023 19:20:14 +0200 Message-ID: <20230818172016.24504-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230818172016.24504-1-philmd@linaro.org> References: <20230818172016.24504-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=philmd@linaro.org; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jiajie Chen Add is_la64 function to check if the current cpucfg[1].arch equals to 2(LA64). Signed-off-by: Jiajie Chen Co-authored-by: Richard Henderson Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-ID: <20230817093121.1053890-2-gaosong@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index c50b3a5ef3..3235ad081f 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -132,6 +132,11 @@ FIELD(CPUCFG1, HP, 24, 1) FIELD(CPUCFG1, IOCSR_BRD, 25, 1) FIELD(CPUCFG1, MSG_INT, 26, 1) +/* cpucfg[1].arch */ +#define CPUCFG1_ARCH_LA32R 0 +#define CPUCFG1_ARCH_LA32 1 +#define CPUCFG1_ARCH_LA64 2 + /* cpucfg[2] bits */ FIELD(CPUCFG2, FP, 0, 1) FIELD(CPUCFG2, FP_SP, 1, 1) @@ -421,6 +426,11 @@ static inline int cpu_mmu_index(CPULoongArchState *env, bool ifetch) #endif } +static inline bool is_la64(CPULoongArchState *env) +{ + return FIELD_EX32(env->cpucfg[1], CPUCFG1, ARCH) == CPUCFG1_ARCH_LA64; +} + /* * LoongArch CPUs hardware flags. */ From patchwork Fri Aug 18 17:20:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 714681 Delivered-To: patch@linaro.org Received: by 2002:a5d:484e:0:b0:317:ecd7:513f with SMTP id n14csp632582wrs; Fri, 18 Aug 2023 10:21:35 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEtrzkAAd2IV4AHparP9/NGPii0hY6x7Y+ZoLG8Ke1hmjSglpVlTgk5HF/mN6gTmjhDqv5y X-Received: by 2002:a05:622a:c1:b0:406:9466:6962 with SMTP id p1-20020a05622a00c100b0040694666962mr4926221qtw.61.1692379295339; Fri, 18 Aug 2023 10:21:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1692379295; cv=none; d=google.com; s=arc-20160816; b=Nku7fnVGrM7VqLsecNsp8qGOLubQnNPWNvPtoKSMMPVn2JVP43a1BOhSMkdaOhmckN y0YSJSd9t0MPn6BpKDJodDHedU7+7Su+548LG3uEQI1Gyr0Vbs1xU58oadB2qL7+sPJF smfRibziY2spjKKnrUB8wvbAtPgLmaNmpzVRxGHy7Yu4mkqHsICQ7zUo9/LU3Mh+FVgC 6dD8a7WlH7cqZJSDOeJp8hiSJgb/Spgy9vSdr7HaSKnfD+uUnRws6Pm9LMuRF7mU/kjE bEbWZ4e977KcVU9KxfWXk0J2FgSxLYpU1F6llyotQeQv3jxmNkTNzqPBCdHafI24BoKm QOXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uEMElgMvR1O3ZuyrTpBd0rfdnbX1M9RkvLN7Ub/Z4Dw=; fh=r/JHKP8J9R2uTR7nHOCSLBWmfdDcyFCnoeAYTYM6zJY=; b=rvQe7WgsT/jaVfJRG2Kwc40gfLYRdyBD2kryQquwbI84FbAagMJueRilrWuQDCwm1g NT1b3N3QbKLDBGHkw9zvmTV1DTDtw5lqRH/iF02b65eYDXcxweQAY+UbL5jU5l2mvv8P hac/Pz8LElpX+y8i41DOxfOag+ub6VrzohyzkQ5Yb1he6sSR7ke/M5URww5Tk1vOfxqm /zHvMPvLCXXEww9vJk/gB2fOfmJauwajgQyXCHfEFdJYNG4SYFmOaBXmEdRmnuJKKfiV jFa+P9lxMGeQ76VB1QEB/uNRip1m5rp/23NTdr10DS5spYE209mYrOUQiTNouRH7vy7H qOEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MuRNZy5W; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.79]) by smtp.gmail.com with ESMTPSA id yy10-20020a170906dc0a00b0099d02ca4327sm1411861ejb.54.2023.08.18.10.21.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Aug 2023 10:21:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Jiajie Chen , Song Gao , Richard Henderson Subject: [PATCH v2 7/8] target/loongarch: Add new object class for loongarch32 cpus Date: Fri, 18 Aug 2023 19:20:15 +0200 Message-ID: <20230818172016.24504-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230818172016.24504-1-philmd@linaro.org> References: <20230818172016.24504-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jiajie Chen Add object class stub for future loongarch32 cpus. Signed-off-by: Jiajie Chen Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-ID: <20230817093121.1053890-3-gaosong@loongson.cn> [Rebased on TYPE_LOONGARCH64_CPU introduction] Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 1 + target/loongarch/cpu.c | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 3235ad081f..b8af491041 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -382,6 +382,7 @@ struct ArchCPU { }; #define TYPE_LOONGARCH_CPU "loongarch-cpu" +#define TYPE_LOONGARCH32_CPU "loongarch32-cpu" #define TYPE_LOONGARCH64_CPU "loongarch64-cpu" OBJECT_DECLARE_CPU_TYPE(LoongArchCPU, LoongArchCPUClass, diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 356d039560..5082506f10 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -726,6 +726,10 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) #endif } +static void loongarch32_cpu_class_init(ObjectClass *c, void *data) +{ +} + static gchar *loongarch64_gdb_arch_name(CPUState *cs) { return g_strdup("loongarch64"); @@ -758,6 +762,13 @@ static const TypeInfo loongarch_cpu_type_infos[] = { .class_size = sizeof(LoongArchCPUClass), .class_init = loongarch_cpu_class_init, }, + { + .name = TYPE_LOONGARCH32_CPU, + .parent = TYPE_LOONGARCH_CPU, + + .abstract = true, + .class_init = loongarch32_cpu_class_init, + }, { .name = TYPE_LOONGARCH64_CPU, .parent = TYPE_LOONGARCH_CPU, From patchwork Fri Aug 18 17:20:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 714683 Delivered-To: patch@linaro.org Received: by 2002:a5d:484e:0:b0:317:ecd7:513f with SMTP id n14csp632701wrs; Fri, 18 Aug 2023 10:21:49 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH5NqiIFcPR0St+sH2HXESHsk0ocOlY9UMqhBncsZG7dY5CNOHKM/vamOBhkQNDOP+l2WMg X-Received: by 2002:a05:622a:60b:b0:410:2b87:7e6a with SMTP id z11-20020a05622a060b00b004102b877e6amr4261151qta.35.1692379308828; Fri, 18 Aug 2023 10:21:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1692379308; cv=none; d=google.com; s=arc-20160816; b=U88EclGaomsXSXkgDt7+CYoMNiH26Df+TkPuhLVDfv74w/Z6JW6YmHWW23wMWBAHG4 AoW3NiSvThYNYuvT3uuhmLC5yOlMmW+xfDq8vjH2wU2Zz1JHH7E3QoLnqiJ2L9DyfUQi sS5s66Z4Mv6zS6jy0HB4yw2mlEma5o0eQewdVBXwnWzln+hSDUtxjFbrbE4uq2OQPuwS fq+FkcHYc36bc5WsidnwAzD/ypTi2udwz+vMVJV8OCntxUPNQg06arQaDmRsarnqsVHu 6uFA2uMIzsymkmbL6b0TwazP7/ddfe9ZEBl3b2en/iV8pBNrvDHbKAtuKyhEDEjHnP6d 7Oqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=H2Fkk9ynZ3VBGOLEApNmPZej9m7TD3tkTeJS3zvlq3E=; fh=r/JHKP8J9R2uTR7nHOCSLBWmfdDcyFCnoeAYTYM6zJY=; b=F6VKXO0k+oQudlPoHJ2KxrEbL8PphYoIbJsHqTMjB4PhOn72rtfhLYtr8ej/YSBiD7 V8dWgXLJzDId5HQWCn83Pys4LnTyCeKwB4YCdn7FRg2RhIpy8HfJdk9BZxe17G7VqltV s4ivDvkv87JPYgRyyGtJ/u7bBVxqVc8CeDKsgdHDD/LXoRi6vELYfxCpOU6MfYzdQRUA sjASnV9/22oDyTUaZEHo6HLLcCs2FyIW0uiV7v5HCKRKSkReY5hUDOZTazTELOhWB5p9 QjgTl+MdZ9ViR1o8ClbEHTSL7+Al5RU44VMry3XKfjB9U8qWnkCsKfNWVx0IXXnWy/IK hxMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GOphneww; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.27.79]) by smtp.gmail.com with ESMTPSA id c4-20020aa7df04000000b00523b1335618sm1269391edy.97.2023.08.18.10.21.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 18 Aug 2023 10:21:10 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Huacai Chen , Xiaojuan Yang , =?utf-8?q?Alex_Benn=C3=A9e?= , Jiajie Chen , Song Gao , Richard Henderson Subject: [PATCH v2 8/8] target/loongarch: Add GDB support for loongarch32 mode Date: Fri, 18 Aug 2023 19:20:16 +0200 Message-ID: <20230818172016.24504-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230818172016.24504-1-philmd@linaro.org> References: <20230818172016.24504-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=philmd@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Jiajie Chen GPRs and PC are 32-bit wide in loongarch32 mode. Signed-off-by: Jiajie Chen Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-ID: <20230817093121.1053890-4-gaosong@loongson.cn> [PMD: Rebased, set gdb_num_core_regs] Signed-off-by: Philippe Mathieu-Daudé --- configs/targets/loongarch64-softmmu.mak | 2 +- target/loongarch/cpu.c | 10 ++++++ target/loongarch/gdbstub.c | 32 ++++++++++++++---- gdb-xml/loongarch-base32.xml | 45 +++++++++++++++++++++++++ 4 files changed, 81 insertions(+), 8 deletions(-) create mode 100644 gdb-xml/loongarch-base32.xml diff --git a/configs/targets/loongarch64-softmmu.mak b/configs/targets/loongarch64-softmmu.mak index 9abc99056f..f23780fdd8 100644 --- a/configs/targets/loongarch64-softmmu.mak +++ b/configs/targets/loongarch64-softmmu.mak @@ -1,5 +1,5 @@ TARGET_ARCH=loongarch64 TARGET_BASE_ARCH=loongarch TARGET_SUPPORTS_MTTCG=y -TARGET_XML_FILES= gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml +TARGET_XML_FILES= gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml TARGET_NEED_FDT=y diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 5082506f10..f42e8497d6 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -726,8 +726,18 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) #endif } +static gchar *loongarch32_gdb_arch_name(CPUState *cs) +{ + return g_strdup("loongarch32"); +} + static void loongarch32_cpu_class_init(ObjectClass *c, void *data) { + CPUClass *cc = CPU_CLASS(c); + + cc->gdb_num_core_regs = 35; + cc->gdb_core_xml_file = "loongarch-base32.xml"; + cc->gdb_arch_name = loongarch32_gdb_arch_name; } static gchar *loongarch64_gdb_arch_name(CPUState *cs) diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c index 0752fff924..a462e25737 100644 --- a/target/loongarch/gdbstub.c +++ b/target/loongarch/gdbstub.c @@ -34,16 +34,25 @@ int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = &cpu->env; + uint64_t val; if (0 <= n && n < 32) { - return gdb_get_regl(mem_buf, env->gpr[n]); + val = env->gpr[n]; } else if (n == 32) { /* orig_a0 */ - return gdb_get_regl(mem_buf, 0); + val = 0; } else if (n == 33) { - return gdb_get_regl(mem_buf, env->pc); + val = env->pc; } else if (n == 34) { - return gdb_get_regl(mem_buf, env->CSR_BADV); + val = env->CSR_BADV; + } + + if (0 <= n && n <= 34) { + if (is_la64(env)) { + return gdb_get_reg64(mem_buf, val); + } else { + return gdb_get_reg32(mem_buf, val); + } } return 0; } @@ -52,15 +61,24 @@ int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { LoongArchCPU *cpu = LOONGARCH_CPU(cs); CPULoongArchState *env = &cpu->env; - target_ulong tmp = ldtul_p(mem_buf); + target_ulong tmp; + int read_length; int length = 0; + if (is_la64(env)) { + tmp = ldq_p(mem_buf); + read_length = 8; + } else { + tmp = ldl_p(mem_buf); + read_length = 4; + } + if (0 <= n && n < 32) { env->gpr[n] = tmp; - length = sizeof(target_ulong); + length = read_length; } else if (n == 33) { env->pc = tmp; - length = sizeof(target_ulong); + length = read_length; } return length; } diff --git a/gdb-xml/loongarch-base32.xml b/gdb-xml/loongarch-base32.xml new file mode 100644 index 0000000000..af47bbd3da --- /dev/null +++ b/gdb-xml/loongarch-base32.xml @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +