From patchwork Fri Jul 19 07:09:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 169223 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp3459638ilk; Fri, 19 Jul 2019 00:09:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqywoYIQKH6LYTG5ENMMLxKPUVDIRrfsZEW8LxGvO6QR0xPWvCychUiRhpxdSY19z0lnDoBW X-Received: by 2002:a63:c106:: with SMTP id w6mr52834220pgf.422.1563520193339; Fri, 19 Jul 2019 00:09:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563520193; cv=none; d=google.com; s=arc-20160816; b=fd8Y6N6xgm1g8fP3dRq6iMDFLsj1fKaP/Jcc9ZZgBBJadwSeq3xdsFTvfX+gC1c84e Jy1JHtUbMVQwj6QuAgBO82BuorO2kVd4XM8BiZTq5EA9gw5h5kANUpr5Tv+xhT+fZjpX QL78W/y2onnUHUuMXgX6G5GipkW6ipEAztKNkyVL8eltv94ukqF1HppQUqR5maH0waOV 659RQHrDnHKDf2E2bQ/1rWY4D1eEahX29cHwFvnNhjzmh0KBt9mO8fACLFDkLq/HQ7Nv 56EYe5ZnrIY4cxMAsdflCsUeQ15dGdSZpGnLacGgccYg0HLtv9QGK44VNkbFo0nqQDIt JTLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=1bNSUve/pXrf+sup56CDnfI8ZoTKP2QzwnZv3hxzyr8=; b=Tvj/bIDlM7suJatTBda6xpfVkX25dLd2Kt+I0Uir/4SQcaHOVEjrzTTOmhOS4nyYpv FJdDyEsC7iwX0ADRK7nuvn+T4l7cqvyVlUVbLVyP+NXLCUHndzlXNvE2IYP4TDrP6zfK Iqt6LUB9hu+jvF5fgjski+h0cO8XqBnrqCezXI368N2Mjxt3WDOIdnihj9zJuls9NTOd GpixMVoftU5VdXVSyOyPOK9vXy3qjjx1uvKcjG/MNNh+pfwLP3Sp6LSna/e6YsCXRbp0 18m0Q+bGDLVagwyOak48BrLxPT52iPEaxm//W7Dhfykjg/M0GgpVS2u9JGOS3JjZR7cm OnLg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BMxm0rLn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i8si787106pgs.87.2019.07.19.00.09.53; Fri, 19 Jul 2019 00:09:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BMxm0rLn; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727522AbfGSHJw (ORCPT + 8 others); Fri, 19 Jul 2019 03:09:52 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:45802 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727519AbfGSHJw (ORCPT ); Fri, 19 Jul 2019 03:09:52 -0400 Received: by mail-pg1-f193.google.com with SMTP id o13so14028716pgp.12 for ; Fri, 19 Jul 2019 00:09:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1bNSUve/pXrf+sup56CDnfI8ZoTKP2QzwnZv3hxzyr8=; b=BMxm0rLneBaUzO6uvV2j7xck7bF6x09mf0F27/8TZc5OqqvBJtOMHyXj8lJt6CcjGp YEmWJIiAKK+KZi44BaBh0hKwOe6dFI6X+zUFBgrfzg28iOQyonY49DW8vA/iJ0dJJ8so FsbWxkFj5DJpVKqQe+gauBQmdulWsMWjm3hsHc6TAwXKIg/j5k8iYNRfVTXGDMPsF017 vJeTXco3N4/lj2kSI/nKzHBtknwSI2psj2LI5uHiGrvmk1YDx9cdxqz+nqEXG2f1U6ub WjEEe/y0/As5VuUtiZ2QvnZjgq0Egbgvs6B0iQXUMlccNSWb+eLxFIQeznF7LeUkqhBo SGmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1bNSUve/pXrf+sup56CDnfI8ZoTKP2QzwnZv3hxzyr8=; b=E011fH1wHEbTnxZeVKj/luC91LXByyhM1P78gWJGpWQBQP2c0DQ8E2QHQ5dOMrjJ0V ILqS3pH6WObQUuQOEFL9n1FF7iPhJsYtva6hJuSa6O+XjO2TeC6WEyGn+781smjOGVNO kNchlmylxY7aRKrC8vA/C1A/mJ+MFxMD+0pw9srCwV+1t7S8uP2vF8/QmPlOE6R3QD/a OuKYXCOom7ezp0xyBF1Pd6M4tYsci5jFl0iiUrpEoQMSbSu+JpQUG/Tp2a5geNbmaQ2B GWDhr7GlqSll7/V1Uj+M2lKOydZs+QaXbUNeWLaDTYE6DrUJaddx6DdzjQpExGuLxmqx M/2A== X-Gm-Message-State: APjAAAUQwWzWcr1h/81Pj17/HzZT20//tzqDrM593DzVq/uV3/PHlQWC 2G4NG02noj7FKJBjtGYzlZ74 X-Received: by 2002:a17:90a:2506:: with SMTP id j6mr20752744pje.129.1563520191528; Fri, 19 Jul 2019 00:09:51 -0700 (PDT) Received: from localhost.localdomain ([2405:204:730b:4a40:d09e:c7ec:fbb:1676]) by smtp.gmail.com with ESMTPSA id r6sm56259346pjb.22.2019.07.19.00.09.45 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 19 Jul 2019 00:09:50 -0700 (PDT) From: Manivannan Sadhasivam To: shawnguo@kernel.org, s.hauer@pengutronix.de, robh+dt@kernel.org Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Darshak.Patel@einfochips.com, kinjan.patel@einfochips.com, prajose.john@einfochips.com, Manivannan Sadhasivam Subject: [PATCH v2 1/3] dt-bindings: Add Vendor prefix for Einfochips Date: Fri, 19 Jul 2019 12:39:24 +0530 Message-Id: <20190719070926.29114-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190719070926.29114-1-manivannan.sadhasivam@linaro.org> References: <20190719070926.29114-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add devicetree vendor prefix for Einfochips. https://www.einfochips.com/ Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dong Aisheng --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 1acf806b62bf..9b74c4de5676 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -255,6 +255,8 @@ patternProperties: description: Emerging Display Technologies "^eeti,.*": description: eGalax_eMPIA Technology Inc + "^einfochips,.*": + description: Einfochips "^elan,.*": description: Elan Microelectronic Corp. "^elgin,.*": From patchwork Fri Jul 19 07:09:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 169224 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp3459749ilk; Fri, 19 Jul 2019 00:10:01 -0700 (PDT) X-Google-Smtp-Source: APXvYqxzTD3chRnK547vwkUZ9DALPz5eDIda4Mg75lqNTMqT7kvUpcGa5rHGxrJ0VZl/h4pDpLDC X-Received: by 2002:a63:fb43:: with SMTP id w3mr18710673pgj.403.1563520201289; Fri, 19 Jul 2019 00:10:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563520201; cv=none; d=google.com; s=arc-20160816; b=Def4RluDo3IdKqN/2qSznJzm7xSoSJhu6JPfk8oKgzx6RkzFRK+r1NFLG37DmUzsgo yJM2sawDPR5TpTlzukpWuYxHoGcDix8wPiRdycLJ41GKky/Qvrl7v/B5ngxZ66EvBMxz o2+hwqUSSrEVj95unR9igSyuqhWAJslBK+SCetl47NOy7oO91YIJgK6PhZEwLzNdTzhj QZ1H/tReRmtqBAF5u6ebZ90I8FkMrdDDLpf4ZBIygRohZMR3wudlFz7O5ejEEHnumAOb sFKmc3rYeXBHp1gY4Qtd5urIb4VevJG71Xbbpiwa3/W7YMVZhRBV4LLFOiIZfO0PQBz0 Ko6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=wejlJJPjvhTTbCNGB4VjnLtYjtQuI5s6iJfj743WH8I=; b=ftj7J5738twjbSbtywlS6NqqxvN9SSipL5c6yqX1lKLUhIULdoCtpTuWNcOBNzxn7Y Ul3Yo83ojnIwo5wDtf/gVwmp9/QU3t2TI7IIlfp+rni/OHeAHEVZVTu+j6bq4jnKSKn5 IT6JGlL715ZqorxneEsokse4Xpsooirl4pHOI/G4+R1c1L0CJk8ejVZXCpRsyHrlFht1 1eHnwJ02iTiak8BIygzuIJLJx8gkaEua4mf2lZkh/V1FUXoA2BNHxd+3rQz6o+TpygWz RVUfU+IDmwzcfTVQLENtlmUUbXiQRICMNGjdoM3V2qwTkW+nqh5Gi/674ndWHjLMhyIb xM+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lmu043Hz; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l28si7953090pgm.311.2019.07.19.00.10.01; Fri, 19 Jul 2019 00:10:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lmu043Hz; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727600AbfGSHKA (ORCPT + 8 others); Fri, 19 Jul 2019 03:10:00 -0400 Received: from mail-pl1-f174.google.com ([209.85.214.174]:45015 "EHLO mail-pl1-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727590AbfGSHKA (ORCPT ); Fri, 19 Jul 2019 03:10:00 -0400 Received: by mail-pl1-f174.google.com with SMTP id t14so15140385plr.11 for ; Fri, 19 Jul 2019 00:09:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wejlJJPjvhTTbCNGB4VjnLtYjtQuI5s6iJfj743WH8I=; b=lmu043Hz6zAVciotAIw/JtZ9gpdYGTWPlmxnLrJhHiguq63+npVZdwXC9Yq94o9dJF S4TYuKUcrC6nPnjd3BoJ26izYVnpbfMWHrQvcpxMsztSF9K7Kvnfu1Vdky+C9p+gB1Zp Oh98xM0LMQHYPgE5MPM55pH1qK/dWz/oMTk9FAQNd/n2TLrd4Zx4+cJg4skaK5RhkwQ5 mmYmxYJ+RsBdPoz6T2IK9wpbNw8VVu3BekgcTs1guzTY3y5zCFtFv1TktgnaCAkobBJR 6fZY01Q5OT7IG4FvrdcYcT6OueIt4s/UXex6ghjoDNm2sLmYY++Lg/bJlFs7dvfH+KVO RiHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wejlJJPjvhTTbCNGB4VjnLtYjtQuI5s6iJfj743WH8I=; b=hInx6VnjIjumDp77erVrBEW+1X3QY/6Rg4FvfBWmvKALsqQmUu/jSi4THZx8Q2b/Db ZiDVMZi6dX0vj2QK/Jnl6dTvwD6p33UfIocqABC6jNMO472fX/tuUjAZIprb4R6kTLFg P6VkIRaIwXvqLTIeoqvVXKOLLyDrF/UCEpQ2CTd56pasHOJpdW1O7K4WvOViNcJUOVm8 kffYCsecAIJjeFzacxmv/jsprd1eInXq9vLp1Z1asLiS2UNifYMbaOJmZBqohihGhuVU xaeHTHNNtTqPaijIJFKcDuQ1mjChYr+cT4v2u5+zW54buYbRyndgO0Fv4XLFVrYTDniD uomA== X-Gm-Message-State: APjAAAV+zMnaw1XBoe0iDCLaQUT95lOKQ/Xa2EPfIajypV4SJCuKPT9f cpo+vZemo9Jhx9lyYIZtfeBFQB3Q0Q== X-Received: by 2002:a17:902:7894:: with SMTP id q20mr53150658pll.339.1563520198971; Fri, 19 Jul 2019 00:09:58 -0700 (PDT) Received: from localhost.localdomain ([2405:204:730b:4a40:d09e:c7ec:fbb:1676]) by smtp.gmail.com with ESMTPSA id r6sm56259346pjb.22.2019.07.19.00.09.52 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 19 Jul 2019 00:09:58 -0700 (PDT) From: Manivannan Sadhasivam To: shawnguo@kernel.org, s.hauer@pengutronix.de, robh+dt@kernel.org Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Darshak.Patel@einfochips.com, kinjan.patel@einfochips.com, prajose.john@einfochips.com, Manivannan Sadhasivam Subject: [PATCH v2 2/3] dt-bindings: arm: Document i.MX8QXP AI_ML board binding Date: Fri, 19 Jul 2019 12:39:25 +0530 Message-Id: <20190719070926.29114-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190719070926.29114-1-manivannan.sadhasivam@linaro.org> References: <20190719070926.29114-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document devicetree binding of i.MX8QXP AI_ML board from Einfochips. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dong Aisheng --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 407138ebc0d0..8e9209a75478 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -180,6 +180,7 @@ properties: - description: i.MX8QXP based Boards items: - enum: + - einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board - fsl,imx8qxp-mek # i.MX8QXP MEK Board - const: fsl,imx8qxp From patchwork Fri Jul 19 07:09:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 169225 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp3459864ilk; Fri, 19 Jul 2019 00:10:07 -0700 (PDT) X-Google-Smtp-Source: APXvYqyGx3OB0VxE5OhsQz4wQV6bqNmOppA3pL2zY5I6JcrE6jNaV6K1lZb2B9Le/vrFgqu6riwe X-Received: by 2002:a63:6686:: with SMTP id a128mr45053596pgc.361.1563520207559; Fri, 19 Jul 2019 00:10:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563520207; cv=none; d=google.com; s=arc-20160816; b=WWtgsruUEHdbdZSaQ18Wav7WlsaNOB3a86GwYzDoYDJzOWNnszmZv9yd/lTvMduN0V uXkgH7zt3G4LU7HEU0BP9RveIL/CIgYAI2rj4R/tWUi0C7hjVBkpdswznoQYgIe4p4NZ vdKH9geZA0c4y4ADrjvEnvcRA7vBMJKfjVRx1avGJGjArjmQ1ZstFhoxnHftJPlUwTcH AM6DU1OYi+cVHws0WH5uc2Xhy+uCJZaEA6b0SFK6dsHouzVYl5ktOJAhUVjVg3U5WUqM eejVHpVSxzjldGBabrOifgYbEKpcGvpdqg2AHZpxSrGqR1dY0lLHYepees4+29b2ErPH 4msQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=5G4Tyl2pOOotPvE1eYgBn6NrePAGwj0dYpf/pn7Ku7I=; b=qTirgnNlY+UYwFA9KlEm/NYOyQE9xliL8CKCH6ggz21M5cuTIgH5kPbOp4gsR+gsPy Rx5yZth8cZ35jk3JcsB5dGStrXHMybGnOaYgUsjaKazeBqC114FTsf2HEPcu7ScUgleT 1Gc/dfP3gp5MXr3G/cNzAt8BdhkGpcBkcTSbdgK04Pq24DtWVig5U4jK5sU3gnJGO5E5 iiA43SxL5FbTmm9Wnqg/79tL4m8XHHh6DxUebhI0FR5oqvEQffz9K3qYj8zxdF5opCSU RJUtzAbfqwJnoGR63vOVmsEgILeo2ipZ2yUAPzdgCENLGtCV8Npf2c9Phu2PcU9Qm54S bWww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oUqwQm7n; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x24si5531056pfr.200.2019.07.19.00.10.07; Fri, 19 Jul 2019 00:10:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oUqwQm7n; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727637AbfGSHKG (ORCPT + 8 others); Fri, 19 Jul 2019 03:10:06 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:36144 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727535AbfGSHKG (ORCPT ); Fri, 19 Jul 2019 03:10:06 -0400 Received: by mail-pf1-f194.google.com with SMTP id r7so13766106pfl.3 for ; Fri, 19 Jul 2019 00:10:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5G4Tyl2pOOotPvE1eYgBn6NrePAGwj0dYpf/pn7Ku7I=; b=oUqwQm7n78sFhXBSVNQtD0r91V14LfgZCihH5PqfJkwGCExt/5650JHPnIVPR1wPHb AHxCYHtUIm9tjACwETUy8UYH72mXeTwtFwP6ajAZxJEzCZwkU24m3H4GbCOuiNKYgJpr 5ZhsAKNw/EtJyv4oPPtcWURkXGtFK9Fda3hVFZmKAWhof4fOxZqVgJJI+QzzspyG560n PWKkav5D0B7yHUEXEGE8aPFteWYGYXhf5PkvEvF/pNe39SjXcVnSW0XUI7UirBzSg79D AYQRp3bwR/X49t0MkM4fA/gStnF9cifRptNk/7sX8og2JLicjcJBICl86+GdWc8oFZe0 ragQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5G4Tyl2pOOotPvE1eYgBn6NrePAGwj0dYpf/pn7Ku7I=; b=nNMDItdywkpYqmGE1mnbrst/VRG3eMNEPBa6BHVHmH9qlT/8msYOyGDC9XJkiF6H9U +qHpOcOSrFsDn/BVQTGU/kuieXWuWd+xa23lMy0vbyHLXoWlppvPJvQbbhzDNy/YPz+o Fls/tc4HoYJvc01VM2sa/pGo0Pe89Ql3C7bje6GoYqOqsl5sozddKtjHfNcJ6XR7zDI1 n23OOHuqoCKvBtzja5iqufmHPX7AgWv170yaeo5VgLi8c7i6oSNPSATRlpxfQuDAp4hG 3XsMY6WYEnFtrIpJCY37MDA7mmFK0JSTiv7ycY3r1VV8P7M+jZ5PNcjOgDV0LDdT6UnK +bpA== X-Gm-Message-State: APjAAAUB1Gp+XRVXePNclZMJAIjmBJLmMO8IhXsGJ8WqaG/gehvE3eFD GUIHPmNZZuubV8o8+GgLlDVX X-Received: by 2002:a63:e54:: with SMTP id 20mr51366282pgo.244.1563520205685; Fri, 19 Jul 2019 00:10:05 -0700 (PDT) Received: from localhost.localdomain ([2405:204:730b:4a40:d09e:c7ec:fbb:1676]) by smtp.gmail.com with ESMTPSA id r6sm56259346pjb.22.2019.07.19.00.09.59 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 19 Jul 2019 00:10:05 -0700 (PDT) From: Manivannan Sadhasivam To: shawnguo@kernel.org, s.hauer@pengutronix.de, robh+dt@kernel.org Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Darshak.Patel@einfochips.com, kinjan.patel@einfochips.com, prajose.john@einfochips.com, Manivannan Sadhasivam Subject: [PATCH v2 3/3] arm64: dts: freescale: Add support for i.MX8QXP AI_ML board Date: Fri, 19 Jul 2019 12:39:26 +0530 Message-Id: <20190719070926.29114-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190719070926.29114-1-manivannan.sadhasivam@linaro.org> References: <20190719070926.29114-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for i.MX8QXP AI_ML board from Einfochips. This board is one of the Consumer Edition boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. The initial support includes following peripherals which are tested and known to be working: 1. Debug serial via UART2 2. uSD 3. WiFi 4. Ethernet More information about this board can be found in Arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam Reviewed-by: Dong Aisheng --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8qxp-ai_ml.dts | 249 ++++++++++++++++++ 2 files changed, 250 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts -- 2.17.1 diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 0bd122f60549..bd8460549d1a 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -24,4 +24,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts b/arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts new file mode 100644 index 000000000000..3dc8757d9c42 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 Einfochips + * Copyright 2019 Linaro Ltd. + */ + +/dts-v1/; + +#include "imx8qxp.dtsi" + +/ { + model = "Einfochips i.MX8QXP AI_ML"; + compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp"; + + aliases { + serial1 = &adma_lpuart1; + serial2 = &adma_lpuart2; + serial3 = &adma_lpuart3; + }; + + chosen { + stdout-path = &adma_lpuart2; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x80000000>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + + user_led1 { + label = "green:user1"; + gpios = <&lsio_gpio4 16 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + user_led2 { + label = "green:user2"; + gpios = <&lsio_gpio0 6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "none"; + }; + + user_led3 { + label = "green:user3"; + gpios = <&lsio_gpio0 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc1"; + default-state = "off"; + }; + + user_led4 { + label = "green:user4"; + gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>; + panic-indicator; + linux,default-trigger = "none"; + }; + + wlan_active_led { + label = "yellow:wlan"; + gpios = <&lsio_gpio4 17 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + bt_active_led { + label = "blue:bt"; + gpios = <&lsio_gpio4 18 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "hci0-power"; + default-state = "off"; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wifi_reg_on>; + reset-gpios = <&lsio_gpio3 24 GPIO_ACTIVE_LOW>; + }; +}; + +/* BT */ +&adma_lpuart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart0>; + uart-has-rtscts; + status = "okay"; +}; + +/* LS-UART0 */ +&adma_lpuart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart1>; + status = "okay"; +}; + +/* Debug */ +&adma_lpuart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart2>; + status = "okay"; +}; + +/* PCI-E UART */ +&adma_lpuart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart3>; + status = "okay"; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + }; +}; + +/* WiFi */ +&usdhc1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + bus-width = <4>; + no-sd; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + status = "okay"; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD */ +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&iomuxc { + pinctrl_fec1: fec1grp { + fsl,pins = < + IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 + IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 + IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 + IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 + IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 + IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 + IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 + IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 + IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 + IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 + IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 + IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 + IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 + IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 + >; + }; + + pinctrl_leds: ledsgrp{ + fsl,pins = < + IMX8QXP_ESAI0_TX2_RX3_LSIO_GPIO0_IO06 0x00000021 + IMX8QXP_ESAI0_TX3_RX2_LSIO_GPIO0_IO07 0x00000021 + IMX8QXP_EMMC0_DATA7_LSIO_GPIO4_IO16 0x00000021 + IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x00000021 + IMX8QXP_EMMC0_STROBE_LSIO_GPIO4_IO17 0x00000021 + IMX8QXP_EMMC0_RESET_B_LSIO_GPIO4_IO18 0x00000021 + >; + }; + + pinctrl_lpuart0: lpuart0grp { + fsl,pins = < + IMX8QXP_UART0_RX_ADMA_UART0_RX 0X06000020 + IMX8QXP_UART0_TX_ADMA_UART0_TX 0X06000020 + IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020 + IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020 + >; + }; + + pinctrl_lpuart1: lpuart1grp { + fsl,pins = < + IMX8QXP_UART1_RX_ADMA_UART1_RX 0X06000020 + IMX8QXP_UART1_TX_ADMA_UART1_TX 0X06000020 + >; + }; + + pinctrl_lpuart2: lpuart2grp { + fsl,pins = < + IMX8QXP_UART2_RX_ADMA_UART2_RX 0X06000020 + IMX8QXP_UART2_TX_ADMA_UART2_TX 0X06000020 + >; + }; + + pinctrl_lpuart3: lpuart3grp { + fsl,pins = < + IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0X06000020 + IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0X06000020 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 + IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 + IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 + IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 + IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 + IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 + IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 + IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 + IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 + IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 + IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 + IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 + IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x00000021 + >; + }; + + pinctrl_wifi_reg_on: wifiregongrp { + fsl,pins = < + IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x00000021 + >; + }; +};