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To fix below issue: "gpio@43820080: gpio-ranges: [[30, 0, 84, 8], [30, 8, 66, 18], [30, 26, 34, 2], [30, 28, 0, 4]] is too long" Update the gpio-ranges property Acked-by: Krzysztof Kozlowski Signed-off-by: Peng Fan --- Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml index 7c2d152e8617..59427d97adf5 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml @@ -59,7 +59,8 @@ properties: - const: port gpio-ranges: - maxItems: 1 + minItems: 1 + maxItems: 4 patternProperties: "^.+-hog(-[0-9]+)?$": From patchwork Mon Sep 18 08:16:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 724272 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 416EB13AFA for ; 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Add a new of_device_id entry for i.MX8ULP. But to make the driver could also support old bindings, check the compatible string first, before check the device data. Signed-off-by: Peng Fan --- drivers/gpio/gpio-vf610.c | 55 +++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 49 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c index dbc7ba0ee72c..ef2455093708 100644 --- a/drivers/gpio/gpio-vf610.c +++ b/drivers/gpio/gpio-vf610.c @@ -25,6 +25,7 @@ struct fsl_gpio_soc_data { /* SoCs has a Port Data Direction Register (PDDR) */ bool have_paddr; + bool is_imx8ulp; }; struct vf610_gpio_port { @@ -60,13 +61,22 @@ struct vf610_gpio_port { #define PORT_INT_EITHER_EDGE 0xb #define PORT_INT_LOGIC_ONE 0xc +#define IMX8ULP_GPIO_BASE_OFF 0x40 +#define IMX8ULP_BASE_OFF 0x80 + static const struct fsl_gpio_soc_data imx_data = { .have_paddr = true, }; +static const struct fsl_gpio_soc_data imx8ulp_data = { + .have_paddr = true, + .is_imx8ulp = true, +}; + static const struct of_device_id vf610_gpio_dt_ids[] = { { .compatible = "fsl,vf610-gpio", .data = NULL, }, { .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, }, + { .compatible = "fsl,imx8ulp-gpio", .data = &imx8ulp_data, }, { /* sentinel */ } }; @@ -255,6 +265,42 @@ static void vf610_gpio_disable_clk(void *data) clk_disable_unprepare(data); } +static int vf610_gpio_map_base(struct platform_device *pdev, struct vf610_gpio_port *port) +{ + struct device *dev = &pdev->dev; + bool dual_base; + + /* support old compatible strings */ + if (device_is_compatible(dev, "fsl,imx7ulp-gpio") && + (device_is_compatible(dev, "fsl,imx93-gpio") || + (device_is_compatible(dev, "fsl,imx8ulp-gpio")))) { + dual_base = true; + } else if (port->sdata && port->sdata->is_imx8ulp) { + dual_base = false; + } else { + dual_base = true; + }; + + if (dual_base) { + port->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(port->base)) + return PTR_ERR(port->base); + + port->gpio_base = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(port->gpio_base)) + return PTR_ERR(port->gpio_base); + } else { + port->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(port->base)) + return PTR_ERR(port->base); + + port->gpio_base = port->base + IMX8ULP_GPIO_BASE_OFF; + port->base = port->base + IMX8ULP_BASE_OFF; + } + + return 0; +} + static int vf610_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -269,13 +315,10 @@ static int vf610_gpio_probe(struct platform_device *pdev) return -ENOMEM; port->sdata = of_device_get_match_data(dev); - port->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(port->base)) - return PTR_ERR(port->base); - port->gpio_base = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(port->gpio_base)) - return PTR_ERR(port->gpio_base); + ret = vf610_gpio_map_base(pdev, port); + if (ret) + return ret; port->irq = platform_get_irq(pdev, 0); if (port->irq < 0) From patchwork Mon Sep 18 08:16:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peng Fan \(OSS\)" X-Patchwork-Id: 724273 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09B9F4C94 for ; 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The current fsl,imx7ulp-gpio compatible could work for i.MX93 in gpio-vf610.c driver, it is based on the base address are splited into two with offset added in device tree node. Now following hardware design, using one register base in device tree node. This may break users who use compatible fsl,imx7ulp-gpio to enable i.MX93 GPIO. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx93.dtsi | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 6f85a05ee7e1..4b111b8c1931 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -825,11 +825,12 @@ usdhc3: mmc@428b0000 { }; gpio2: gpio@43810080 { - compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio"; - reg = <0x43810080 0x1000>, <0x43810040 0x40>; + compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio"; + reg = <0x43810000 0x1000>; gpio-controller; #gpio-cells = <2>; - interrupts = ; + interrupts = , + ; interrupt-controller; #interrupt-cells = <2>; clocks = <&clk IMX93_CLK_GPIO2_GATE>, @@ -839,11 +840,12 @@ gpio2: gpio@43810080 { }; gpio3: gpio@43820080 { - compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio"; - reg = <0x43820080 0x1000>, <0x43820040 0x40>; + compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio"; + reg = <0x43820000 0x1000>; gpio-controller; #gpio-cells = <2>; - interrupts = ; + interrupts = , + ; interrupt-controller; #interrupt-cells = <2>; clocks = <&clk IMX93_CLK_GPIO3_GATE>, @@ -854,11 +856,12 @@ gpio3: gpio@43820080 { }; gpio4: gpio@43830080 { - compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio"; - reg = <0x43830080 0x1000>, <0x43830040 0x40>; + compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio"; + reg = <0x43830000 0x1000>; gpio-controller; #gpio-cells = <2>; - interrupts = ; + interrupts = , + ; interrupt-controller; #interrupt-cells = <2>; clocks = <&clk IMX93_CLK_GPIO4_GATE>, @@ -868,11 +871,12 @@ gpio4: gpio@43830080 { }; gpio1: gpio@47400080 { - compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio"; - reg = <0x47400080 0x1000>, <0x47400040 0x40>; + compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio"; + reg = <0x47400000 0x1000>; gpio-controller; #gpio-cells = <2>; - interrupts = ; + interrupts = , + ; interrupt-controller; #interrupt-cells = <2>; clocks = <&clk IMX93_CLK_GPIO1_GATE>,