From patchwork Wed Sep 20 22:46:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 725333 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52B19CD4934 for ; Wed, 20 Sep 2023 22:46:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229594AbjITWqR (ORCPT ); Wed, 20 Sep 2023 18:46:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229512AbjITWqR (ORCPT ); Wed, 20 Sep 2023 18:46:17 -0400 Received: from mail-ej1-x62e.google.com (mail-ej1-x62e.google.com [IPv6:2a00:1450:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80652D3 for ; Wed, 20 Sep 2023 15:46:10 -0700 (PDT) Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-9ae22bf33a0so325828166b.0 for ; Wed, 20 Sep 2023 15:46:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1695249969; x=1695854769; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=fEG5QbTle/wsryhp0cJXy9R4gVUkkTUcGpE6xI5qCmE=; b=cePh5Hz+BHbiiLOYiRopSbSf/v25ZrNmcgYLb+FWY1E97H6wlQD1GekL+QWLrxkftT oFwXDw5TDU6i/OtzniFhKygqFHjcepvI+CBJkRfTBnQvc+3L+fpGGrBGfkDNr9EdK44i SNXaVTkDbluKLusB4nPpXPYGtIXC5Mg96tcT1903XXEe0B9I1qrfmtBpwi5QbTVVkVh/ Hhoo8/F4BWXRQz+WZ3mhiRv0xTBpdVvLQAOSOPw4SvOqBfo457AvSamETzPKyyHDl4SS 1IalEmAaMNuSZs1h7ltVtu3s44B1FxWZMfbB/x/STeGIv4XZGaNXbP+hPTqnjadwFPDS CNvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695249969; x=1695854769; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fEG5QbTle/wsryhp0cJXy9R4gVUkkTUcGpE6xI5qCmE=; b=xHgmiGDEb0mwVojgaGoWHCLCPvfJqJ2U2EJ1T/w2u/PrG4qeVHchXQdunaMdKmzi5J cr7MTXrt+Yua5HJaaPjLQf3hsjytiip7+ax6lhqpn2tmwMRij9M5YISlaAnjuzFJ89Si eI5XFC6FBm7yMEN3QeO8KUw4krlQe5gObc7R3LL/hQObaVZ0jKTu81HIAxvZ+AyHK4g7 1YK9RogHPAq0HgDnMgP1qAV0HOufvSU7B/TkVsdk+cP0lhuuYLtqk5zPBJtmGcyAvaoI EcLEehoUeEny5F0MgeSFwnAO9zA8FB0gBgxW/vWZj2Oab7vNsZHvo+Sj/rvCW+JpmAfN zCxw== X-Gm-Message-State: AOJu0Yyg+HAA3q6gJRP4mykZfWRK9PzT3rkY7UylCoPRgHNKoMlR7ZQj T3gpwZhTugEIG4iz4+cyf/b1ow== X-Google-Smtp-Source: AGHT+IHA8VMEhO4O0eEpANFMtvmSJUNJ62SQx1MRheCQmJMRfCP3X2rdlzItwdFMdHhxB9Yv2ZNubQ== X-Received: by 2002:a17:906:739a:b0:9ae:37d9:8043 with SMTP id f26-20020a170906739a00b009ae37d98043mr5990977ejl.31.1695249969069; Wed, 20 Sep 2023 15:46:09 -0700 (PDT) Received: from [127.0.1.1] ([217.67.225.27]) by smtp.gmail.com with ESMTPSA id z23-20020a170906435700b00992f309cfe8sm118285ejm.178.2023.09.20.15.46.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 15:46:08 -0700 (PDT) From: Konrad Dybcio Date: Thu, 21 Sep 2023 00:46:06 +0200 Subject: [PATCH 1/3] drm/msm/dpu: Fix SC7280 PP length MIME-Version: 1.0 Message-Id: <20230921-topic-7280_dpu-v1-1-6912a97183d5@linaro.org> References: <20230921-topic-7280_dpu-v1-0-6912a97183d5@linaro.org> In-Reply-To: <20230921-topic-7280_dpu-v1-0-6912a97183d5@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.13-dev-0438c Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Commit 194347df5844 ("drm/msm/dpu: inline DSC_BLK and DSC_BLK_1_2 macros") unrolled a macro incorrectly. Fix that. Fixes: 194347df5844 ("drm/msm/dpu: inline DSC_BLK and DSC_BLK_1_2 macros") Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h index 3b5061c4402a..dc3198335164 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h @@ -126,7 +126,7 @@ static const struct dpu_dspp_cfg sc7280_dspp[] = { static const struct dpu_pingpong_cfg sc7280_pp[] = { { .name = "pingpong_0", .id = PINGPONG_0, - .base = 0x69000, .len = 0, + .base = 0x69000, .len = 0xd4, .features = BIT(DPU_PINGPONG_DITHER), .sblk = &sc7280_pp_sblk, .merge_3d = 0, @@ -134,7 +134,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { .intr_rdptr = -1, }, { .name = "pingpong_1", .id = PINGPONG_1, - .base = 0x6a000, .len = 0, + .base = 0x6a000, .len = 0xd4, .features = BIT(DPU_PINGPONG_DITHER), .sblk = &sc7280_pp_sblk, .merge_3d = 0, @@ -142,7 +142,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { .intr_rdptr = -1, }, { .name = "pingpong_2", .id = PINGPONG_2, - .base = 0x6b000, .len = 0, + .base = 0x6b000, .len = 0xd4, .features = BIT(DPU_PINGPONG_DITHER), .sblk = &sc7280_pp_sblk, .merge_3d = 0, @@ -150,7 +150,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { .intr_rdptr = -1, }, { .name = "pingpong_3", .id = PINGPONG_3, - .base = 0x6c000, .len = 0, + .base = 0x6c000, .len = 0xd4, .features = BIT(DPU_PINGPONG_DITHER), .sblk = &sc7280_pp_sblk, .merge_3d = 0, From patchwork Wed Sep 20 22:46:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 724699 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9C94CD4936 for ; Wed, 20 Sep 2023 22:46:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229611AbjITWqS (ORCPT ); Wed, 20 Sep 2023 18:46:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229468AbjITWqR (ORCPT ); Wed, 20 Sep 2023 18:46:17 -0400 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C21EDC for ; Wed, 20 Sep 2023 15:46:11 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-9aa2c6f0806so27118666b.3 for ; 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SC7280 is one of them. Add it. Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets") Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h index dc3198335164..b6a59d7b94c4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h @@ -164,7 +164,7 @@ static const struct dpu_dsc_cfg sc7280_dsc[] = { { .name = "dce_0_0", .id = DSC_0, .base = 0x80000, .len = 0x4, - .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN), + .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN) | BIT(DPU_DSC_OUTPUT_CTRL), .sblk = &dsc_sblk_0, }, }; From patchwork Wed Sep 20 22:46:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 724698 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CADDCD4931 for ; Wed, 20 Sep 2023 22:46:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229468AbjITWqT (ORCPT ); Wed, 20 Sep 2023 18:46:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229579AbjITWqR (ORCPT ); Wed, 20 Sep 2023 18:46:17 -0400 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA452DE for ; Wed, 20 Sep 2023 15:46:11 -0700 (PDT) Received: by mail-ej1-x62b.google.com with SMTP id a640c23a62f3a-9936b3d0286so32416366b.0 for ; Wed, 20 Sep 2023 15:46:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1695249970; x=1695854770; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=faQgYvcRr+Q8Wbd4/aYnbbCq/6v22SMhkw9gB15Q9b8=; b=JyXCh/FUNujP1rA9A/je9XH8U1OmARzlM2Bi9/rdS7y+Cr4ZK0Rv3626c5T2P9QHpU KDXTVb4MODnytmWPyYre6Q8E9MCijKPP0gh0wsoqBG0j1YiQwO7uvI23273xMTkBmG9z 6ix29KU2ROcoEc2mxL8ry0Wlju72RlAzSALwXx0OJUkRaygnhjOXnvu3f0A/cWu1FUTM JnqHpYPjgnT6r7w7NGr5wu0jBV08OS1n+4nF2RO7d9sSZasUIBW0F+IfxyhoGmF56DNv oV+ECSybbNScd+bqwOSGlVvMi4FnpXZuVrMgxjuEh/2pEDyhhgiAUr9TME7qBCZkT0fw 5rYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695249970; x=1695854770; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=faQgYvcRr+Q8Wbd4/aYnbbCq/6v22SMhkw9gB15Q9b8=; b=i7KTt/pdBQ+sdkBKCV6b1Fb3Kq5DT4aqd0lrElI/dTNYTXgFrOERXFJN881Eg02q9O uG/lYLkVLWJPn9+x+sn5IJYMEsDpFmQcDXZ3LgbkIDYZIgQadmwo/CVOEOyAMEO93qF6 LvyvIgFLBl+4xhMS4bzOFpO5utXWNYzv9+AMGX5BzBF6RuIamPUN6s3VutMqaD1M3oO/ d6DL/FFj8XFqd+KUt3339gi6uMDlb/bWZ/ja+u2mv8Q4gVH064oKTZCp+EEu01KNk0+i 7WORvn5W1FinonpqmO6vk/3j0T8p2bUP7cjtmD9GjxvpB7/Css0QJJ6LAVP7WQPi9qOp tp5A== X-Gm-Message-State: AOJu0YxYbyVrlJxU6DULTmLy28HoK13CVJkgIT6WGi6JGgQmsrfkN0z9 tAJvtgclAE4zg806bA71RJZBTg== X-Google-Smtp-Source: AGHT+IF/hPFX+k8aV648zOqgN0vtG3qxUC8bAz53xmMS3qD7B68OhuVS57Zh0nXLTxheIifi61yA+w== X-Received: by 2002:a17:906:3003:b0:9a5:d16b:6631 with SMTP id 3-20020a170906300300b009a5d16b6631mr3561901ejz.70.1695249970372; Wed, 20 Sep 2023 15:46:10 -0700 (PDT) Received: from [127.0.1.1] ([217.67.225.27]) by smtp.gmail.com with ESMTPSA id z23-20020a170906435700b00992f309cfe8sm118285ejm.178.2023.09.20.15.46.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 15:46:10 -0700 (PDT) From: Konrad Dybcio Date: Thu, 21 Sep 2023 00:46:08 +0200 Subject: [PATCH 3/3] drm/msm/dpu: Fix SC7280 DSC block length MIME-Version: 1.0 Message-Id: <20230921-topic-7280_dpu-v1-3-6912a97183d5@linaro.org> References: <20230921-topic-7280_dpu-v1-0-6912a97183d5@linaro.org> In-Reply-To: <20230921-topic-7280_dpu-v1-0-6912a97183d5@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.13-dev-0438c Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Commit e550ad0e5c3d ("drm/msm/dpu: fix DSC 1.2 block lengths") changed the block length from a wrong value to another wrong value. Use the correct one this time. Fixes: e550ad0e5c3d ("drm/msm/dpu: fix DSC 1.2 block lengths") Signed-off-by: Konrad Dybcio --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h index b6a59d7b94c4..de5e1a57a142 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h @@ -163,7 +163,7 @@ static const struct dpu_pingpong_cfg sc7280_pp[] = { static const struct dpu_dsc_cfg sc7280_dsc[] = { { .name = "dce_0_0", .id = DSC_0, - .base = 0x80000, .len = 0x4, + .base = 0x80000, .len = 0x10, .features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN) | BIT(DPU_DSC_OUTPUT_CTRL), .sblk = &dsc_sblk_0, },