From patchwork Tue Jul 30 05:43:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 170037 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp2184109ile; Mon, 29 Jul 2019 22:43:54 -0700 (PDT) X-Google-Smtp-Source: APXvYqwNgGMvHz0sgmquCd38nIECvzJiXTLNnrh0AiSXM2wLPEFrFK7YrxtPIBygpdfrX6dKKfyd X-Received: by 2002:a17:902:7686:: with SMTP id m6mr113477144pll.239.1564465434133; Mon, 29 Jul 2019 22:43:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564465434; cv=none; d=google.com; s=arc-20160816; b=PAF4KKfuVKr4TJkSd0uA9E9d8DQbKwlnOfT6GeFLWMWp6Uq9UVXxA0NgmTtctM3EF8 L2IM9S6HIc/ocyL0LwvxraN5Be9hpBsmRHqHAgy9Ye1HsEySumTay/6DUyjZWcblFawS cgNwvJ0PSPV3NNc/jlhSU2hLRIf+AFkC8/Jk66o2XAID9ccBu4hBBPWliX2An0z06Vmq q0OOmgUX5x7x2EtgKMH3GYjkWZjuOOOShE64iP5uzRLrr1OC/BZP65Xo0AuJQXNOkFWB 5lVjXdGC+w2mKaLEesYytx6EUaMPnhOU0uriZ/6lhELH83PJrPj+yfvatNxs420vzm15 dm1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=f586jVndMlgnJGnR+itN7rM5Dv/3u+FeVgmkdWGi0t4=; b=eUYduT8mkFsBIIUBmthiXtwpgzzl0FWSvtuN90/BkskDT1g4GD2uaRi2i2mDd9k1/l eugdcFGjzkRg1Zo1YcPU2RG1FY2xgV0tFwzuvb0mazerjO1dKY+dGMX0YR6si+J3C3Ma 6MW48Dd2qlwgAZ2wlm6gk02rLRnOvdQaRAkCvHrQVDfhVishhly0fx7hnIQb3MSI0OJu vtDkKI9Bv26GqMuXSYeXG2EmJFjZI7GEBgb1XBRx35co7uypYIn9+JXyJ1CwFmdVsa1c rJoxwsYXXjjvzdrDkJk+ceBcBFhYSgaW3iDa9IwfWaFMzjiBmie37QC64X8iW0LmoRgf OHtQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i133si28016151pgc.109.2019.07.29.22.43.53; Mon, 29 Jul 2019 22:43:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729498AbfG3Fnw (ORCPT + 29 others); Tue, 30 Jul 2019 01:43:52 -0400 Received: from mx.socionext.com ([202.248.49.38]:57333 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729383AbfG3Fnr (ORCPT ); Tue, 30 Jul 2019 01:43:47 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 30 Jul 2019 14:43:44 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id E5C3260629; Tue, 30 Jul 2019 14:43:44 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 30 Jul 2019 14:43:44 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 8AEA41A04FC; Tue, 30 Jul 2019 14:43:44 +0900 (JST) From: Kunihiko Hayashi To: Linus Walleij , Masahiro Yamada , linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH v2 3/5] pinctrl: uniphier: Add 5th LD20 MPEG2-TS input pin-mux setting Date: Tue, 30 Jul 2019 14:43:28 +0900 Message-Id: <1564465410-9165-4-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564465410-9165-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1564465410-9165-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The 5th serial TS interface uses the following pins: hscin4_s: PCA[11-14] Signed-off-by: Kunihiko Hayashi Acked-by: Masahiro Yamada --- drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.7.4 diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c index 8d4fb65..0a8b186 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c @@ -576,6 +576,8 @@ static const unsigned hscin2_s_pins[] = {124, 125, 126, 127}; static const int hscin2_s_muxvals[] = {3, 3, 3, 3}; static const unsigned hscin3_s_pins[] = {129, 130, 131, 132}; static const int hscin3_s_muxvals[] = {3, 3, 3, 3}; +static const unsigned hscin4_s_pins[] = {80, 81, 82, 83}; +static const int hscin4_s_muxvals[] = {3, 3, 3, 3}; static const unsigned hscout0_ci_pins[] = {113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123}; static const int hscout0_ci_muxvals[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; @@ -679,6 +681,7 @@ static const struct uniphier_pinctrl_group uniphier_ld20_groups[] = { UNIPHIER_PINCTRL_GROUP(hscin1_s), UNIPHIER_PINCTRL_GROUP(hscin2_s), UNIPHIER_PINCTRL_GROUP(hscin3_s), + UNIPHIER_PINCTRL_GROUP(hscin4_s), UNIPHIER_PINCTRL_GROUP(hscout0_ci), UNIPHIER_PINCTRL_GROUP(hscout0_p), UNIPHIER_PINCTRL_GROUP(hscout0_s), @@ -721,6 +724,7 @@ static const char * const hscin0_groups[] = {"hscin0_ci", static const char * const hscin1_groups[] = {"hscin1_p", "hscin1_s"}; static const char * const hscin2_groups[] = {"hscin2_s"}; static const char * const hscin3_groups[] = {"hscin3_s"}; +static const char * const hscin4_groups[] = {"hscin4_s"}; static const char * const hscout0_groups[] = {"hscout0_ci", "hscout0_p", "hscout0_s"}; @@ -757,6 +761,7 @@ static const struct uniphier_pinmux_function uniphier_ld20_functions[] = { UNIPHIER_PINMUX_FUNCTION(hscin1), UNIPHIER_PINMUX_FUNCTION(hscin2), UNIPHIER_PINMUX_FUNCTION(hscin3), + UNIPHIER_PINMUX_FUNCTION(hscin4), UNIPHIER_PINMUX_FUNCTION(hscout0), UNIPHIER_PINMUX_FUNCTION(hscout1), UNIPHIER_PINMUX_FUNCTION(i2c0), From patchwork Tue Jul 30 05:43:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 170039 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp2184245ile; Mon, 29 Jul 2019 22:44:04 -0700 (PDT) X-Google-Smtp-Source: APXvYqzFimzVKgIUTHlRDQuUXBcsAJJnMv0Ld8J7zQgJ4vX7zmVUGOpELUlN23jNjUFooXzLmGXs X-Received: by 2002:a17:90a:9301:: with SMTP id p1mr114999578pjo.22.1564465444099; Mon, 29 Jul 2019 22:44:04 -0700 (PDT) ARC-Seal: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id f74si28601874pfa.57.2019.07.29.22.44.03; Mon, 29 Jul 2019 22:44:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729542AbfG3FoD (ORCPT + 29 others); Tue, 30 Jul 2019 01:44:03 -0400 Received: from mx.socionext.com ([202.248.49.38]:57337 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729426AbfG3Fnr (ORCPT ); Tue, 30 Jul 2019 01:43:47 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 30 Jul 2019 14:43:46 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 33151180B6E; Tue, 30 Jul 2019 14:43:46 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Tue, 30 Jul 2019 14:43:46 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 94A731A04FC; Tue, 30 Jul 2019 14:43:45 +0900 (JST) From: Kunihiko Hayashi To: Linus Walleij , Masahiro Yamada , linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH v2 4/5] pinctrl: uniphier: Add Pro5 PCIe pin-mux settings Date: Tue, 30 Jul 2019 14:43:29 +0900 Message-Id: <1564465410-9165-5-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1564465410-9165-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1564465410-9165-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Pro5 PCIe interface uses the following pins: XPERST, XPEWAKE, XPECLKRQ Signed-off-by: Kunihiko Hayashi --- drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.7.4 diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 1d418e3..0c0af99 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -807,6 +807,8 @@ static const unsigned nand_pins[] = {19, 20, 21, 22, 23, 24, 25, 28, 29, 30, static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {26, 27}; static const int nand_cs1_muxvals[] = {0, 0}; +static const unsigned pcie_pins[] = {109, 110, 111}; +static const int pcie_muxvals[] = {0, 0, 0}; static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258}; static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned spi0_pins[] = {120, 121, 122, 123}; @@ -902,6 +904,7 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = { UNIPHIER_PINCTRL_GROUP(i2c5b), UNIPHIER_PINCTRL_GROUP(i2c5c), UNIPHIER_PINCTRL_GROUP(i2c6), + UNIPHIER_PINCTRL_GROUP(pcie), UNIPHIER_PINCTRL_GROUP(sd), UNIPHIER_PINCTRL_GROUP(spi0), UNIPHIER_PINCTRL_GROUP(spi1), @@ -936,6 +939,7 @@ static const char * const i2c3_groups[] = {"i2c3"}; static const char * const i2c5_groups[] = {"i2c5", "i2c5b", "i2c5c"}; static const char * const i2c6_groups[] = {"i2c6"}; static const char * const nand_groups[] = {"nand", "nand_cs1"}; +static const char * const pcie_groups[] = {"pcie"}; static const char * const sd_groups[] = {"sd"}; static const char * const spi0_groups[] = {"spi0"}; static const char * const spi1_groups[] = {"spi1"}; @@ -967,6 +971,7 @@ static const struct uniphier_pinmux_function uniphier_pro5_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c5), UNIPHIER_PINMUX_FUNCTION(i2c6), UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(pcie), UNIPHIER_PINMUX_FUNCTION(sd), UNIPHIER_PINMUX_FUNCTION(spi0), UNIPHIER_PINMUX_FUNCTION(spi1),