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Tue, 17 Oct 2023 03:40:11 -0500 Received: from xirengwts09.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Tue, 17 Oct 2023 03:40:09 -0500 From: Neal Frager To: , , CC: , , , , , , , , Neal Frager Subject: [PATCH v2 1/2] bfd: microblaze: Add 32_NONE reloc type Date: Tue, 17 Oct 2023 09:40:06 +0100 Message-ID: <20231017084007.229397-1-neal.frager@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EA:EE_|DM4PR12MB5868:EE_ X-MS-Office365-Filtering-Correlation-Id: f49b4a52-cdd2-4e0d-9569-08dbceecadd5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 4AZPRxoAeVVGISufDuNkCFXyXhjblhAxbrt9xLepB79zkFygBTLDZlu53KrP5Pxsugso60UDQH/BD+fcEXScUzl5UkcQAO3sTJ6Xk4/q1C0e9wY7+in7sGSAsJ3C/vjeFTMVZYSkzGzupCGvRcST0yxvp0D4m2WPd4hdtKTKmmWoGiUn84QGt7LSiwfkIn+T7QLH8Cx46gxf0h/1GHvV5cNd4BS6NWfXsadL/v/4Ygvnom73cb+vyPPRhl7d0+eydzGXNWriYdXfkCNUN9YhaSkAh0DHh98D3kC94236zFoLxc9HZmlzG4woKyD/iawXse6j24bfzVESFzlHU98IJKYbBLsuKTVCNcCnoCYzPdQHlpR/6LNLF37uG9W6V+7BhoR/Uel7/M7zug7t/2Tj6U7+oLCmrjw+Dz+2m7w3OZT4SxKY3/oyBq+0gbK2jjQGZVResj/hdnzAI73QPME4U+M82zBiNtvwCtfLDu16yC+tztwZSDpvbh/SjwFz3m6LGI5rhYP4sviiV9yfE+faD7hcalnsjI0k/RiRyxIIZ9Uk1Rv4/e5/fGgEQRXR+iyaLWoFHB1ePrhF59a2k8At3yd02Scv9dIzNkiDmcZ20NGelxSPq/neS8sgXpwgwa7X3W7I/uxrURRLcA8O9XCI59YeiL8+D/SrXx1w4mwDo+jYNGif4Ja625kWuNxFKHbsbYLSq0MqCTprp6VwO2W9LiWuvPs0IseLiqZn1vbyWzViBDLMugUPmgrAFdZKb6vfuyx4rUKRfScr6pdPpQUKN5Hu68U2M3j4S0KKFohm7so= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EA.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5868 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FORGED_SPF_HELO, GIT_PATCH_0, KAM_STOCKGEN, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patch=linaro.org@sourceware.org This patch adds the R_MICROBLAZE_32_NONE relocation type. This is a 32-bit reloc that stores the 32-bit pc relative value in two words (with an imm instruction). This patch does not cause any regressions. Below are the testsuite results before and after application of this patch: ./configure --disable-nls --disable-gdb --disable-gdbserver \ --disable-gprofng --disable-libbacktrace \ --disable-libdecnumber --disable-readline \ --disable-sim --enable-obsolete --enable-plugins \ --build=powerpc64le-linux --target=microblaze-xilinx-elf === binutils Summary === # of expected passes 220 # of expected failures 2 # of untested testcases 17 # of unsupported tests 14 === gas Summary === # of expected passes 272 # of unexpected failures 1 # of expected failures 1 # of unsupported tests 8 === ld Summary === # of expected passes 379 # of unexpected failures 4 # of expected failures 13 # of untested testcases 26 # of unsupported tests 217 === libctf Summary === # of expected passes 5 # of unsupported tests 3 === libsframe Summary === # of expected passes 57 Signed-off-by: Neal Frager --- bfd/bfd-in2.h | 5 +++++ bfd/elf32-microblaze.c | 25 +++++++++++++++++++++++-- bfd/libbfd.h | 1 + bfd/reloc.c | 6 ++++++ binutils/readelf.c | 4 ++++ gas/config/tc-microblaze.c | 3 +++ include/elf/microblaze.h | 1 + 7 files changed, 43 insertions(+), 2 deletions(-) diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index c1fe48bb2f1..fb0ead46aba 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -6463,6 +6463,11 @@ value relative to the read-write small data area anchor */ expressions of the form "Symbol Op Symbol" */ BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, +/* This is a 32 bit reloc that stores the 32 bit pc relative +value in two words (with an imm instruction).No relocation is +done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_32_NONE, + /* This is a 64 bit reloc that stores the 32 bit pc relative value in two words (with an imm instruction). No relocation is done here - only used for relaxing */ diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c index a7e81c70fc8..c10278cde31 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c @@ -174,6 +174,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = 0x0000ffff, /* Dest Mask. */ false), /* PC relative offset? */ + /* This reloc does nothing. Used for relaxation. */ + HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ + 0, /* Rightshift. */ + 2, /* Size (0 = byte, 1 = short, 2 = long). */ + 32, /* Bitsize. */ + true, /* PC_relative. */ + 0, /* Bitpos. */ + complain_overflow_bitfield, /* Complain on overflow. */ + NULL, /* Special Function. */ + "R_MICROBLAZE_32_NONE", /* Name. */ + false, /* Partial Inplace. */ + 0, /* Source Mask. */ + 0, /* Dest Mask. */ + false), /* PC relative offset? */ + /* This reloc does nothing. Used for relaxation. */ HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ 0, /* Rightshift. */ @@ -560,6 +575,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, case BFD_RELOC_NONE: microblaze_reloc = R_MICROBLAZE_NONE; break; + case BFD_RELOC_MICROBLAZE_32_NONE: + microblaze_reloc = R_MICROBLAZE_32_NONE; + break; case BFD_RELOC_MICROBLAZE_64_NONE: microblaze_reloc = R_MICROBLAZE_64_NONE; break; @@ -1954,6 +1972,7 @@ microblaze_elf_relax_section (bfd *abfd, } break; case R_MICROBLAZE_NONE: + case R_MICROBLAZE_32_NONE: { /* This was a PC-relative instruction that was completely resolved. */ @@ -2009,7 +2028,9 @@ microblaze_elf_relax_section (bfd *abfd, irelscanend = irelocs + o->reloc_count; for (irelscan = irelocs; irelscan < irelscanend; irelscan++) { - if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) + if ((ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) || + (ELF32_R_TYPE (irelscan->r_info) == + (int) R_MICROBLAZE_32_NONE)) { isym = isymbuf + ELF32_R_SYM (irelscan->r_info); @@ -2068,7 +2089,7 @@ microblaze_elf_relax_section (bfd *abfd, elf_section_data (o)->this_hdr.contents = ocontents; } } - irelscan->r_addend -= calc_fixup (irel->r_addend + irelscan->r_addend -= calc_fixup (irelscan->r_addend + isym->st_value, 0, sec); diff --git a/bfd/libbfd.h b/bfd/libbfd.h index d5f42f22c08..d729dc48e7c 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -3010,6 +3010,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_MICROBLAZE_32_ROSDA", "BFD_RELOC_MICROBLAZE_32_RWSDA", "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", + "BFD_RELOC_MICROBLAZE_32_NONE", "BFD_RELOC_MICROBLAZE_64_NONE", "BFD_RELOC_MICROBLAZE_64_GOTPC", "BFD_RELOC_MICROBLAZE_64_GOT", diff --git a/bfd/reloc.c b/bfd/reloc.c index 2ac883d0eac..3ea2afc0d4e 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -6694,6 +6694,12 @@ ENUM ENUMDOC This is a 32 bit reloc for the microblaze to handle expressions of the form "Symbol Op Symbol" +ENUM + BFD_RELOC_MICROBLAZE_32_NONE +ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). No relocation is + done here - only used for relaxing ENUM BFD_RELOC_MICROBLAZE_64_NONE ENUMDOC diff --git a/binutils/readelf.c b/binutils/readelf.c index c9b6210e229..17fd7066b83 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -15279,6 +15279,10 @@ is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) return reloc_type == 54; /* R_RISCV_SET8. */ case EM_Z80: return reloc_type == 1; /* R_Z80_8. */ + case EM_MICROBLAZE: + return reloc_type == 33 /* R_MICROBLAZE_32_NONE. */ + || reloc_type == 0 /* R_MICROBLAZE_NONE. */ + || reloc_type == 9; /* R_MICROBLAZE_64_NONE. */ default: return false; } diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c index b510da95024..604cc935da9 100644 --- a/gas/config/tc-microblaze.c +++ b/gas/config/tc-microblaze.c @@ -2290,6 +2290,8 @@ md_apply_fix (fixS * fixP, moves code around due to relaxing. */ if (fixP->fx_r_type == BFD_RELOC_64_PCREL) fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; + else if (fixP->fx_r_type == BFD_RELOC_32) + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; else fixP->fx_r_type = BFD_RELOC_NONE; fixP->fx_addsy = section_symbol (absolute_section); @@ -2513,6 +2515,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) switch (fixp->fx_r_type) { case BFD_RELOC_NONE: + case BFD_RELOC_MICROBLAZE_32_NONE: case BFD_RELOC_MICROBLAZE_64_NONE: case BFD_RELOC_32: case BFD_RELOC_MICROBLAZE_32_LO: diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h index fecdd7e4831..164b36d0978 100644 --- a/include/elf/microblaze.h +++ b/include/elf/microblaze.h @@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */ RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ + RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) END_RELOC_NUMBERS (R_MICROBLAZE_max) /* Global base address names. */ From patchwork Tue Oct 17 08:40:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neal Frager X-Patchwork-Id: 734367 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp366578wro; Tue, 17 Oct 2023 01:40:36 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFTkJwAI8s6460CvBzjfwzEXBdWimjmHQLgRX30RgiBhvdNd8nbAUmK3s8l4asCGogojYDC X-Received: by 2002:a05:620a:258a:b0:774:2203:8c56 with SMTP id x10-20020a05620a258a00b0077422038c56mr1823767qko.63.1697532036292; Tue, 17 Oct 2023 01:40:36 -0700 (PDT) ARC-Seal: i=3; a=rsa-sha256; t=1697532036; cv=pass; d=google.com; s=arc-20160816; b=DcEh4DHVsYCOrk04AKgQ7S6WK/27MWHcwmlaNG+xL0cPRNlKp3bTYvlMINldfivynd 1rOcl6bt556oaSnrQBE0/Im3npfbVF3J0N62U2HxAsywMVeW5nZ+SBP3drIox3OkekJA 3XRZLb6DWTGYYOcVk6LtHT1fgltCpLgujN/iLEFE7KNy1NZAuDcAXdF96hzAsx+/8Yoo n5oC+lEMMZvsZmFFNb4BjXd3mGbIWvV+ZbatlRiOIlw3AdFhu+19TwxGKJDILhgjEnC8 JTLVrDJRi+COUAVEBMw7yn9reZbAR0uZT0PbvFhdiyiq1AY5q/z1gvFgN4zAbE1k1exE lv8g== ARC-Message-Signature: i=3; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature:arc-filter:dmarc-filter:delivered-to; bh=UY7jGbiW8iDWThTMHeonGBS+Gg18e/Ve6+PBiVmw0E8=; fh=/0ocx1M6cHTR3KB+bGfXUXybkgXfoO1YLoV283rAUaA=; b=jyj5IHrUUpRHOvbzDwybIGWQD5YMf9xMcNlHhldbVCPOEpY+6Xz+ovQXM//p5MKpaO gx/K3C8i12COqUt3t0RM8Mt+fkH+zwINAnVboV7yDkfJ8RjtV6776AZNO1v2lRSLv9fd Xl7ClWdgWniiekDEZKXSUI+sHdqiXxwYYiITpJCiL231yuAe/RzFg5ofT/Y5F6G0xm7B FNW0AmB/9fpY0srRh46J8zJqHQvVUAqHpDWGI0NPvyB0vdrRkVO6lERNRMOqovhiJG2T vjqx37vO6lmocDzCM8MBe4DfCzbblrSnt85SPbsHWgXRaLMsKnLAY2Q/Zl+F/WMs3J0q ehEA== ARC-Authentication-Results: i=3; mx.google.com; dkim=pass header.i=@amd.com header.s=selector1 header.b=yEBX58RB; arc=pass (i=2); spf=pass (google.com: domain of binutils-bounces+patch=linaro.org@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+patch=linaro.org@sourceware.org"; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=amd.com Return-Path: Received: from server2.sourceware.org (server2.sourceware.org. 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Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4258 X-Spam-Status: No, score=-11.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FORGED_SPF_HELO, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+patch=linaro.org@sourceware.org This patch adds code to the gas/microblaze/reloc_sym.exp test to verify R_MICROBLAZE_32_NONE relocation type. Signed-off-by: Neal Frager --- gas/testsuite/gas/microblaze/reloc_sym.d | 5 +++++ gas/testsuite/gas/microblaze/reloc_weaksym.s | 5 ++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gas/testsuite/gas/microblaze/reloc_sym.d b/gas/testsuite/gas/microblaze/reloc_sym.d index 571ffe1bba8..cbc55633a2f 100644 --- a/gas/testsuite/gas/microblaze/reloc_sym.d +++ b/gas/testsuite/gas/microblaze/reloc_sym.d @@ -30,6 +30,11 @@ Disassembly of section .text: 100000a8: 30210020 addik r1, r1, 32 100000ac: b60f0008 rtsd r15, 8 100000b0: 80000000 or r0, r0, r0 +100000b4: 14422003 cmpu r2, r2, r4 +100000b8: be220004 bneid r2, 4 // 100000bc + +100000bc : +100000bc: a0630001 ori r3, r3, 1 Disassembly of section .testsection: diff --git a/gas/testsuite/gas/microblaze/reloc_weaksym.s b/gas/testsuite/gas/microblaze/reloc_weaksym.s index 7dd9b981462..44258093376 100644 --- a/gas/testsuite/gas/microblaze/reloc_weaksym.s +++ b/gas/testsuite/gas/microblaze/reloc_weaksym.s @@ -42,7 +42,8 @@ main: addik r1,r1,32 rtsd r15,8 nop # Unfilled delay slot - + cmpu r2,r2,r4 + BNEID r2,reloc_none_test .end main $Lfe2: .size main,$Lfe2-main @@ -50,3 +51,5 @@ $Lfe2: test_start = __def_start .globl test_start_strong test_start_strong = __def_start +reloc_none_test: + ori r3,r3,1