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[176.171.212.97]) by smtp.gmail.com with ESMTPSA id m19-20020a1709066d1300b0099bd453357esm1645245ejr.41.2023.10.20.08.06.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 08:06:36 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Laurent Vivier , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 1/6] hw/m68k/irqc: Pass CPU using QOM link property Date: Fri, 20 Oct 2023 17:06:21 +0200 Message-ID: <20231020150627.56893-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020150627.56893-1-philmd@linaro.org> References: <20231020150627.56893-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Avoid the interrupt controller directly access the 'first_cpu' global. Pass it from the board code. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- include/hw/intc/m68k_irqc.h | 1 + hw/intc/m68k_irqc.c | 10 +++++++++- hw/m68k/virt.c | 2 ++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/include/hw/intc/m68k_irqc.h b/include/hw/intc/m68k_irqc.h index ef91f21812..693e33b0aa 100644 --- a/include/hw/intc/m68k_irqc.h +++ b/include/hw/intc/m68k_irqc.h @@ -33,6 +33,7 @@ typedef struct M68KIRQCState { SysBusDevice parent_obj; uint8_t ipr; + ArchCPU *cpu; /* statistics */ uint64_t stats_irq_count[M68K_IRQC_LEVEL_NUM]; diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c index 0c515e4ecb..e09705eeaf 100644 --- a/hw/intc/m68k_irqc.c +++ b/hw/intc/m68k_irqc.c @@ -11,6 +11,7 @@ #include "cpu.h" #include "migration/vmstate.h" #include "monitor/monitor.h" +#include "hw/qdev-properties.h" #include "hw/nmi.h" #include "hw/intc/intc.h" #include "hw/intc/m68k_irqc.h" @@ -35,7 +36,7 @@ static void m68k_irqc_print_info(InterruptStatsProvider *obj, Monitor *mon) static void m68k_set_irq(void *opaque, int irq, int level) { M68KIRQCState *s = opaque; - M68kCPU *cpu = M68K_CPU(first_cpu); + M68kCPU *cpu = M68K_CPU(s->cpu); int i; if (level) { @@ -85,12 +86,19 @@ static const VMStateDescription vmstate_m68k_irqc = { } }; +static Property m68k_irqc_properties[] = { + DEFINE_PROP_LINK("m68k-cpu", M68KIRQCState, cpu, + TYPE_M68K_CPU, ArchCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void m68k_irqc_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); NMIClass *nc = NMI_CLASS(oc); InterruptStatsProviderClass *ic = INTERRUPT_STATS_PROVIDER_CLASS(oc); + device_class_set_props(dc, m68k_irqc_properties); nc->nmi_monitor_handler = m68k_nmi; dc->reset = m68k_irqc_reset; dc->vmsd = &vmstate_m68k_irqc; diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c index 2dd3c99894..da35e74bd9 100644 --- a/hw/m68k/virt.c +++ b/hw/m68k/virt.c @@ -155,6 +155,8 @@ static void virt_init(MachineState *machine) /* IRQ Controller */ irqc_dev = qdev_new(TYPE_M68K_IRQC); + object_property_set_link(OBJECT(irqc_dev), "m68k-cpu", + OBJECT(first_cpu), &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal); /* From patchwork Fri Oct 20 15:06:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 736251 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp353691wrl; Fri, 20 Oct 2023 08:07:37 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE9qfjkiCueBcmHbneNRDaZ5EaBxlXcmCq/Uv6iHb3r18+9BrFIPtKvSleRdgqtvMVZVF68 X-Received: by 2002:ad4:576e:0:b0:66d:1f0f:5fb6 with SMTP id r14-20020ad4576e000000b0066d1f0f5fb6mr2631908qvx.38.1697814456996; Fri, 20 Oct 2023 08:07:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697814456; cv=none; d=google.com; s=arc-20160816; b=UPTzeonCNGopISLyAJKeYLaTM1/rqHSsjrGLhGwmq9HN/qLyWLF206auCHNK2Oc094 D860Ssa3+dDhtzpNaZoikUlHMuthyJLwMoUUobWIA5KD+EMoHa0sy2YzoZE13v5DW0yM Z2ZN5bYPdhuELD1n1/O3xzgULefv+k2MZ69oaabs4+p8nEzddy+LqEaz7xvbOB2e+c8w AgYaWVPyYgNiwBr1CbAUzUoiIFhn1/bHYCOuviBLQ1yYZFK7ryPt4xg4YDzSvMPpP9A+ 6RwBJi/bLRCq90Lo57wvSP9h1dtvEsltSKpHACuWzhcat6m1fUbN2KLMjg2QTh2z17Q4 WmZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=68n6n0mII6+P8wsMRhocKE/9XK5lu0Lo0YDMzSDC/I4=; fh=6K1MWX6u3jkCueyV8jYuo9x2BPi9GJqFYEKyGoRKT0U=; b=RFzrp0ESZfwtOuHPl9W+uUP/mp46qOmL06JeQ+LnbbPuWP+EJ5eKK2gUOPUolU/ruW F1/MVSF/Mz31dvNaNdhku1xRLm6U156S8rj4ySURPnwSU9wabQIj7SreRC6vNeotKuPE D7mVv1539zTVWyU2n2Y5p3z0pcPnzRqE1Ve6I+0nrUNMCMnsiEQZcposgoBz4aIS01JP K/FKgMOSlf9pXJD95o3OPFUjapHdoNWQRYcrqcdFf2eVgU/oRyp7dQPvRuzYLL71GGie QWdgJV6fibroUExeAQLNFn5VxeNrrNo1MLantHZxnr8FTuKWVMt29oWo2gu0vOrjDZS5 fkvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xIl831Hh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.212.97]) by smtp.gmail.com with ESMTPSA id u10-20020a17090657ca00b009b8dbdd5203sm1666524ejr.107.2023.10.20.08.06.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 08:06:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Laurent Vivier , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 2/6] hw/m68k/mcf5206: Pass CPU using QOM link property Date: Fri, 20 Oct 2023 17:06:22 +0200 Message-ID: <20231020150627.56893-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020150627.56893-1-philmd@linaro.org> References: <20231020150627.56893-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Avoid the interrupt controller directly access the first cpu via the qemu_get_cpu() call. Pass it from the board code. Signed-off-by: Philippe Mathieu-Daudé Tested-by: Thomas Huth Reviewed-by: Thomas Huth --- hw/m68k/an5206.c | 2 ++ hw/m68k/mcf5206.c | 9 ++++++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index 11ae4c9795..f51c93088f 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -26,6 +26,8 @@ static void mcf5206_init(MemoryRegion *sysmem, uint32_t base) SysBusDevice *s; dev = qdev_new(TYPE_MCF5206_MBAR); + object_property_set_link(OBJECT(dev), "m68k-cpu", + OBJECT(first_cpu), &error_abort); s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c index 2ab1b4f059..f920ca2ceb 100644 --- a/hw/m68k/mcf5206.c +++ b/hw/m68k/mcf5206.c @@ -10,6 +10,7 @@ #include "qemu/error-report.h" #include "qemu/log.h" #include "cpu.h" +#include "hw/qdev-properties.h" #include "hw/boards.h" #include "hw/irq.h" #include "hw/m68k/mcf.h" @@ -601,13 +602,19 @@ static void mcf5206_mbar_realize(DeviceState *dev, Error **errp) s->timer[1] = m5206_timer_init(s->pic[10]); s->uart[0] = mcf_uart_init(s->pic[12], serial_hd(0)); s->uart[1] = mcf_uart_init(s->pic[13], serial_hd(1)); - s->cpu = M68K_CPU(qemu_get_cpu(0)); } +static Property mcf5206_mbar_properties[] = { + DEFINE_PROP_LINK("m68k-cpu", m5206_mbar_state, cpu, + TYPE_M68K_CPU, M68kCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void mcf5206_mbar_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + device_class_set_props(dc, mcf5206_mbar_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); dc->desc = "MCF5206 system integration module"; dc->realize = mcf5206_mbar_realize; From patchwork Fri Oct 20 15:06:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 736254 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp354249wrl; Fri, 20 Oct 2023 08:08:30 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHBMZkiPMhzr1h0TdF1rNJ9KdNgAfeqoY8BzzXpygVF3PDVHqVr3jtMuycPAzEeXzYsX0zO X-Received: by 2002:a05:620a:24cb:b0:777:2aeb:7dfa with SMTP id m11-20020a05620a24cb00b007772aeb7dfamr1923798qkn.38.1697814510530; Fri, 20 Oct 2023 08:08:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697814510; cv=none; d=google.com; s=arc-20160816; b=pBOLvtSHlLRCmiqqCvOO7p0aZNnzjwTsZfAgzSvEqyPfhLcjtphNepVxdudzSuxcRx 5ZhTDmj0HB+Dhsgvk+X8Hz5I+DA1dL9KQFovCYExjVSuwfxJvO1TCtQdWvhNBlFRoIKr E4nMlEiov1FxCehcWKzONVhn464JI558N6pRQghASnfv5VwZR661GcTLiWHtJD5Xt6Eo jlbawllbEs5ydUdPHoqmkCyJIv3LBvnO/p4jxP9HMTD0yEWaYTEMygl5uAOy0hb9n/HI y4xC4uRSWVklHD2wW0TnbH/795/Rm1u+CoJNcY+p/tPIre98i3I2Y0pEcBL2oXlugmGe Nl/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5z5NktVu9Z3pjJNFKKbdLfwCXi08dnJZpEWAcQaa1vg=; fh=6K1MWX6u3jkCueyV8jYuo9x2BPi9GJqFYEKyGoRKT0U=; b=PjgnbEQ2dGSWR3H3awI3vzqzbvThhjsqQdQB5g9Ek4r9hv8SjFfB69RxVbfMnZIWXL KLoB1T1/YFzbsA2QlP8HDssK+xqvu1udP4t5HkJDNxXqcLWsSKcdMbMEv5Kz7lYQUzZO 5wSNXuSeK/Ukey+2n6XZUlxWbBJxAOsSce8BpRlXzKo32LtrUAzzD3rqHbjgrnR+KWkk MYj/mgxZkWr3nFvdDp+Fsl24KlYsmBZjI5ztBUVcw6SNG8pgSYHT8JGBYHf73PMzty29 li/9+1AhbTCt5e5+e8krjzJYN/nJWED9jV1ANbpFMwA80FGhKGlB3qi4ulnlrkJMgmJO CEjg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=r1YIj93W; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.212.97]) by smtp.gmail.com with ESMTPSA id d11-20020a170906040b00b0099bd046170fsm1672198eja.104.2023.10.20.08.06.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 08:06:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Laurent Vivier , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 3/6] hw/m68k/mcf_intc: Expose MMIO region via SysBus API Date: Fri, 20 Oct 2023 17:06:23 +0200 Message-ID: <20231020150627.56893-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020150627.56893-1-philmd@linaro.org> References: <20231020150627.56893-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QOM objects shouldn't access each other internals fields except using the QOM API. Here the caller of mcf_intc_init() access the MMIO region from the MCF_INTC state. Avoid that by exposing that region via sysbus_init_mmio(), then get it with sysbus_mmio_get_region(). Signed-off-by: Philippe Mathieu-Daudé Tested-by: Thomas Huth Reviewed-by: Thomas Huth --- hw/m68k/mcf_intc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index 4cd30188c0..1f74ea0e14 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -173,6 +173,7 @@ static void mcf_intc_instance_init(Object *obj) mcf_intc_state *s = MCF_INTC(obj); memory_region_init_io(&s->iomem, obj, &mcf_intc_ops, s, "mcf", 0x100); + sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem); } static void mcf_intc_class_init(ObjectClass *oc, void *data) @@ -211,7 +212,8 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem, s = MCF_INTC(dev); s->cpu = cpu; - memory_region_add_subregion(sysmem, base, &s->iomem); + memory_region_add_subregion(sysmem, base, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); return qemu_allocate_irqs(mcf_intc_set_irq, s, 64); } From patchwork Fri Oct 20 15:06:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 736255 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp354263wrl; Fri, 20 Oct 2023 08:08:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHSj5SVZryx79Ug1ytsC3zJJVFAbZIR6mDVcG6leNm4WHnGCj8zLLD7+hnNX+nHpopuRZTu X-Received: by 2002:a05:620a:981:b0:778:8f98:96a with SMTP id x1-20020a05620a098100b007788f98096amr1997896qkx.21.1697814511834; Fri, 20 Oct 2023 08:08:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697814511; cv=none; d=google.com; s=arc-20160816; b=lYVwI91BGTTDnPRP7Ox+HSjZLVJYSOozbcvOoWe9BY0C5Rfc84OmlQip7ZI8aVWKa5 Y1t2CgzwQxtMq/P0Y9TDQbUgs6bT/fePjsKmKIO6ikWb/9k3gkn54Hppha8q4BGn9mkb GAXzQFVyQpnw4kPUqQofvkWfcRWftdBUIj0S/PdJfDmYwpOjMrjmcX4Ngb9njNxPBMNt afjbZB/BwFEINH/R0xSz2XNZ9SdW3cnepMaIlqRksPUkZLao1gI2MB6FTw6voCDgPqJp xtuxYaf8sUvgCmFckUjMJfAcGjMz0nQdwV74Ghhaj1YMUB9YUOumX39fqY07+emRE4/j geHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DGRPHT/WBPalUJTx91B3yYyqtqOtvzDargUZTDcy7QI=; fh=6K1MWX6u3jkCueyV8jYuo9x2BPi9GJqFYEKyGoRKT0U=; b=uiu5tiHB8X4WSQ2Y1tKrtJTLBJsS3BDBqlGyKLT3bUZl8b4Aw/xcvhREasThanGcrT izND2UNSERjDJvYwbuYYifZtnJnhDey3aN64UmbfDeOTjhd09Rrs+2BMOG7CNnjzOqB4 zmmGDSVZVI95RHyVmFvSRuUqAKM5kumZG5kC2/rHnXbYeTP5DpxCOAulSRFRV99zyR73 Nh+38tOVOBCOpy2lmBzjB2VAUIkaVVaZQtYpBmimWXVpbTGdfvhC42KZclNrHgvIDSyn EP4/LRlakFrkeovFyTY7ZYCaESYc/pbnX9a0T4YrTeiPXBHOgJUKT3nX4m+sSEuXLgYz IdjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SHEfxeky; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.212.97]) by smtp.gmail.com with ESMTPSA id xa17-20020a170907b9d100b009b913aa7cdasm1665815ejc.92.2023.10.20.08.06.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 08:06:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Laurent Vivier , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 4/6] hw/m68k/mcf_intc: Pass CPU using QOM link property Date: Fri, 20 Oct 2023 17:06:24 +0200 Message-ID: <20231020150627.56893-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020150627.56893-1-philmd@linaro.org> References: <20231020150627.56893-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QOM objects shouldn't access each other internals fields except using the QOM API. Signed-off-by: Philippe Mathieu-Daudé Tested-by: Thomas Huth Reviewed-by: Thomas Huth --- hw/m68k/mcf_intc.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c index 1f74ea0e14..1d3b34e18c 100644 --- a/hw/m68k/mcf_intc.c +++ b/hw/m68k/mcf_intc.c @@ -14,6 +14,7 @@ #include "hw/irq.h" #include "hw/sysbus.h" #include "hw/m68k/mcf.h" +#include "hw/qdev-properties.h" #include "qom/object.h" #define TYPE_MCF_INTC "mcf-intc" @@ -176,10 +177,17 @@ static void mcf_intc_instance_init(Object *obj) sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem); } +static Property mcf_intc_properties[] = { + DEFINE_PROP_LINK("m68k-cpu", mcf_intc_state, cpu, + TYPE_M68K_CPU, M68kCPU *), + DEFINE_PROP_END_OF_LIST(), +}; + static void mcf_intc_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + device_class_set_props(dc, mcf_intc_properties); set_bit(DEVICE_CATEGORY_MISC, dc->categories); dc->reset = mcf_intc_reset; } @@ -204,16 +212,13 @@ qemu_irq *mcf_intc_init(MemoryRegion *sysmem, M68kCPU *cpu) { DeviceState *dev; - mcf_intc_state *s; dev = qdev_new(TYPE_MCF_INTC); + object_property_set_link(OBJECT(dev), "m68k-cpu", + OBJECT(cpu), &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - - s = MCF_INTC(dev); - s->cpu = cpu; - memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); - return qemu_allocate_irqs(mcf_intc_set_irq, s, 64); + return qemu_allocate_irqs(mcf_intc_set_irq, dev, 64); } From patchwork Fri Oct 20 15:06:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 736250 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp353681wrl; Fri, 20 Oct 2023 08:07:36 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEs/uT/AuLLvIpfcIfqNFdXsMHgI06d7rU7X5fk6k1U47O8fltv4sQG3M0oNoyzOLR3gGO3 X-Received: by 2002:a05:6871:4684:b0:1ea:8b10:247a with SMTP id ni4-20020a056871468400b001ea8b10247amr2859126oab.42.1697814456417; Fri, 20 Oct 2023 08:07:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697814456; cv=none; d=google.com; s=arc-20160816; b=ZYItG4VYP0L/FCsdiAW43HAx1dEuqdmRNWc5/5rQnGnl2uc+DNclFHPotqEoDHor+q 1Mfxj4hFSboYmACoJGhwD5jcBJYITg6cKdT7C0MRTJU/Rzv1gHCqq27BYfz9CdWBfQEm /cJjBqwc1faRdbh8i7eHbe5BhL0Hcmsamt6GB5PoiSCgeczf6XHt7sdphqTOgwK4LOTK cZ9DZdZ7h2gvkGhZfiuPwjELACU+3biARPtDIVzWg07UE1/9rQqtpmos1l3cfx1KDtMq JlohYaaTv12NzyOhQ+KtKh1KiXExePyoUf8Q0IYMb4Ip69RTyrdWub4u10o2bPObgtGd nXvQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=c0zvSCA6AYDZV2ErRdt/jshRiMTPrawiKivetLDL0Ao=; fh=6K1MWX6u3jkCueyV8jYuo9x2BPi9GJqFYEKyGoRKT0U=; b=ZAV43Mwi0lSDsP/i9eV4p9fBXVL+O2XVbjDxk8pjlPOPDGYex/8VE1I8BJOMloy5bF dOmGZx0Wee+2fLZhATEmA/km7adyI7AgxvXIhX7Lgzx4SiSgbry6CCqzbNuESchX8YHt bqlFaltD1S4Awifw8BNEOOeSgXjpnZkahI0Q+OYWs1B5C3ZnLDMgFMLgpJ29n+wUQHJM 46gbJilfnvPVLScRj3E9y6ffFCYaRfbP+qhYwHuI/ZFwpmvYtEgkT9wr04XCVMmv4GNP ZRiYF1Kv1U/2xRTnKwTKZ83frj18Nj4adUjuVeYHCaCvXQmcYvlrUK43LqZEaJCWVraZ JqzQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qObmGYqp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.171.212.97]) by smtp.gmail.com with ESMTPSA id m10-20020a170906234a00b009b29668fce7sm1646701eja.113.2023.10.20.08.07.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 08:07:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Laurent Vivier , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 5/6] hw/m68k/next-cube: Do not open-code sysbus_create_simple() Date: Fri, 20 Oct 2023 17:06:25 +0200 Message-ID: <20231020150627.56893-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020150627.56893-1-philmd@linaro.org> References: <20231020150627.56893-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Mechanical change using the following coccinelle script: @@ identifier dev; identifier sbd; expression qom_type; expression addr; @@ - dev = qdev_new(qom_type); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); + dev = sysbus_create_simple(qom_type, addr, NULL); then manually removing the 'dev' variable to avoid: error: variable 'dev' set but not used [-Werror,-Wunused-but-set-variable] Signed-off-by: Philippe Mathieu-Daudé Tested-by: Thomas Huth Reviewed-by: Thomas Huth --- hw/m68k/next-cube.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 5d244b3b95..d17e6be8e1 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -950,7 +950,6 @@ static void next_cube_init(MachineState *machine) MemoryRegion *bmapm2 = g_new(MemoryRegion, 1); MemoryRegion *sysmem = get_system_memory(); const char *bios_name = machine->firmware ?: ROM_FILE; - DeviceState *dev; DeviceState *pcdev; /* Initialize the cpu core */ @@ -974,9 +973,7 @@ static void next_cube_init(MachineState *machine) memory_region_add_subregion(sysmem, 0x04000000, machine->ram); /* Framebuffer */ - dev = qdev_new(TYPE_NEXTFB); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0B000000); + sysbus_create_simple(TYPE_NEXTFB, 0x0B000000, NULL); /* MMIO */ sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 0, 0x02000000); @@ -993,9 +990,7 @@ static void next_cube_init(MachineState *machine) memory_region_add_subregion(sysmem, 0x820c0000, bmapm2); /* KBD */ - dev = qdev_new(TYPE_NEXTKBD); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0200e000); + sysbus_create_simple(TYPE_NEXTKBD, 0x0200e000, NULL); /* Load ROM here */ /* still not sure if the rom should also be mapped at 0x0*/ From patchwork Fri Oct 20 15:06:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 736253 Delivered-To: patch@linaro.org Received: by 2002:adf:dd81:0:b0:32d:baff:b0ca with SMTP id x1csp354108wrl; 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[176.171.212.97]) by smtp.gmail.com with ESMTPSA id j8-20020a50ed08000000b00533dad8a9c5sm1607276eds.38.2023.10.20.08.07.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Oct 2023 08:07:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Mark Cave-Ayland , Laurent Vivier , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 6/6] hw/m68k/virt: Do not open-code sysbus_create_simple() Date: Fri, 20 Oct 2023 17:06:26 +0200 Message-ID: <20231020150627.56893-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231020150627.56893-1-philmd@linaro.org> References: <20231020150627.56893-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52b; envelope-from=philmd@linaro.org; helo=mail-ed1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Mechanical change using the following coccinelle script: @@ identifier dev; expression qom_type; expression addr; expression irq; @@ - dev = qdev_new(qom_type); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); + dev = sysbus_create_simple(qom_type, addr, irq); Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- hw/m68k/virt.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/m68k/virt.c b/hw/m68k/virt.c index da35e74bd9..31038b8bb0 100644 --- a/hw/m68k/virt.c +++ b/hw/m68k/virt.c @@ -201,11 +201,8 @@ static void virt_init(MachineState *machine) sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE)); /* virt controller */ - dev = qdev_new(TYPE_VIRT_CTRL); - sysbus = SYS_BUS_DEVICE(dev); - sysbus_realize_and_unref(sysbus, &error_fatal); - sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE); - sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE)); + dev = sysbus_create_simple(TYPE_VIRT_CTRL, VIRT_CTRL_MMIO_BASE, + PIC_GPIO(VIRT_CTRL_IRQ_BASE)); /* virtio-mmio */ io_base = VIRT_VIRTIO_MMIO_BASE;