From patchwork Mon Nov 20 13:21:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 745444 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b="FCkZcHWk" Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9BD4B129 for ; Mon, 20 Nov 2023 05:21:28 -0800 (PST) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-4083dbc43cfso13087525e9.3 for ; Mon, 20 Nov 2023 05:21:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1700486487; x=1701091287; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BazhM/BZ03YE7Yt2JlSm/CTHrHyW7p3eEne03QtvrUU=; b=FCkZcHWkdl8nq2B09XOxJcXpdDL6TFmvWFR1nSJsX21yxJ0cXjkI95uJi3aGBrD82S +9Cb+zLiY9uNnQWu3yhTm6AYQVgUmjAkkLGcFHifUFFCvyB2vVJHw+dwuL4h7m5CU//2 t0RTd2cyE1EALA1D1DUoLzmbo0prHRHkXwfAQUu7M2D14fXxhiBJSZRSBr/KPbuZF5JT tcAp3b9Oq6JdYtBs0VqjKFQyGlpRqt9Cbtt3KhYcjcNOtxxhPK9fYwdbf7Yqs8ilKsPQ CRzVYsbaGNNJyz534VkVojp1I9WBm+erO2tUglIAJV++D08ifyQ60oSvlMQfVfs1t+NY 0rhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700486487; x=1701091287; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BazhM/BZ03YE7Yt2JlSm/CTHrHyW7p3eEne03QtvrUU=; b=XvO6l2a8pWo/MJXHhxxvkxRxUx2la3bZ2bJFdABfUS3yj9VWc5AezK0PyRiqngUmyj MIS6pF+JIDD+5p5vYmCEFJZh+S5Tny05bp5Y/fcOayUpZfwkjCygLNsJL6Pdq6Gn31Bc Y/1XDX0SKMpUm4pG2MEovK6XZwSruR+UsE0GjUcMQd89bncrZ5mYoEWLQX+Osx9Xxepb txuBQcu4/1LEV+WJzH/u2WxJlTDxvVqrjl96hur3rGyYgIAPgrRWs6bfkhlE8I742PRZ Yas8K3jn6Vvk2gMazcsMktTiVEfaY4H0xG1x3N3B943EpZy80coHvvSKuyIZE8DW02at 3vnQ== X-Gm-Message-State: AOJu0Yyc4wKuLN86CYWN7703FmHqgH2O2feWxvL2KBlPxGvkjyoCKM7L diyi7F0BRoj/Pjqm4lV+lb8R7w== X-Google-Smtp-Source: AGHT+IGqp3soO0FZm0RgdNiXSHhxG0m7AnvMFz2QFxG1h6Gyy6rPMhxdNSgWtKX3O7/jkcPNOBgI3A== X-Received: by 2002:a05:600c:4ecc:b0:406:5344:4212 with SMTP id g12-20020a05600c4ecc00b0040653444212mr5553894wmq.41.1700486487129; Mon, 20 Nov 2023 05:21:27 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:c590:a7ce:883:eba3]) by smtp.gmail.com with ESMTPSA id k18-20020a05600c0b5200b004065e235417sm17329192wmr.21.2023.11.20.05.21.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Nov 2023 05:21:26 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [RESEND PATCH v5 03/12] firmware: qcom: scm: smc: switch to using the SCM allocator Date: Mon, 20 Nov 2023 14:21:09 +0100 Message-Id: <20231120132118.30473-4-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231120132118.30473-1-brgl@bgdev.pl> References: <20231120132118.30473-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bartosz Golaszewski We need to allocate, map and pass a buffer to the trustzone if we have more than 4 arguments for a given SCM calls. Let's use the new TrustZone allocator for that memory and shrink the code in process. As this code lives in a different compilation unit than the rest of the SCM code, we need to provide a helper in the form of qcom_scm_get_tzmem_pool() that allows the SMC low-level routines to access the SCM memory pool. Signed-off-by: Bartosz Golaszewski Reviewed-by: Andrew Halaney Tested-by: Andrew Halaney # sc8280xp-lenovo-thinkpad-x13s --- drivers/firmware/qcom/qcom_scm-smc.c | 30 ++++++++-------------------- drivers/firmware/qcom/qcom_scm.c | 5 +++++ drivers/firmware/qcom/qcom_scm.h | 3 +++ 3 files changed, 16 insertions(+), 22 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm-smc.c b/drivers/firmware/qcom/qcom_scm-smc.c index 16cf88acfa8e..dca5f3f1883b 100644 --- a/drivers/firmware/qcom/qcom_scm-smc.c +++ b/drivers/firmware/qcom/qcom_scm-smc.c @@ -2,6 +2,7 @@ /* Copyright (c) 2015,2019 The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -9,6 +10,7 @@ #include #include #include +#include #include #include @@ -150,11 +152,10 @@ int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, enum qcom_scm_convention qcom_convention, struct qcom_scm_res *res, bool atomic) { + struct qcom_tzmem_pool *mempool = qcom_scm_get_tzmem_pool(); int arglen = desc->arginfo & 0xf; int i, ret; - dma_addr_t args_phys = 0; - void *args_virt = NULL; - size_t alloc_len; + void *args_virt __free(qcom_tzmem) = NULL; gfp_t flag = atomic ? GFP_ATOMIC : GFP_KERNEL; u32 smccc_call_type = atomic ? ARM_SMCCC_FAST_CALL : ARM_SMCCC_STD_CALL; u32 qcom_smccc_convention = (qcom_convention == SMC_CONVENTION_ARM_32) ? @@ -172,9 +173,9 @@ int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, smc.args[i + SCM_SMC_FIRST_REG_IDX] = desc->args[i]; if (unlikely(arglen > SCM_SMC_N_REG_ARGS)) { - alloc_len = SCM_SMC_N_EXT_ARGS * sizeof(u64); - args_virt = kzalloc(PAGE_ALIGN(alloc_len), flag); - + args_virt = qcom_tzmem_alloc(mempool, + SCM_SMC_N_EXT_ARGS * sizeof(u64), + flag); if (!args_virt) return -ENOMEM; @@ -192,25 +193,10 @@ int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, SCM_SMC_FIRST_EXT_IDX]); } - args_phys = dma_map_single(dev, args_virt, alloc_len, - DMA_TO_DEVICE); - - if (dma_mapping_error(dev, args_phys)) { - kfree(args_virt); - return -ENOMEM; - } - - smc.args[SCM_SMC_LAST_REG_IDX] = args_phys; + smc.args[SCM_SMC_LAST_REG_IDX] = qcom_tzmem_to_phys(args_virt); } - /* ret error check follows after args_virt cleanup*/ ret = __scm_smc_do(dev, &smc, &smc_res, atomic); - - if (args_virt) { - dma_unmap_single(dev, args_phys, alloc_len, DMA_TO_DEVICE); - kfree(args_virt); - } - if (ret) return ret; diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 0d4c028be0c1..71e98b666391 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -201,6 +201,11 @@ static void qcom_scm_bw_disable(void) enum qcom_scm_convention qcom_scm_convention = SMC_CONVENTION_UNKNOWN; static DEFINE_SPINLOCK(scm_query_lock); +struct qcom_tzmem_pool *qcom_scm_get_tzmem_pool(void) +{ + return __scm->mempool; +} + static enum qcom_scm_convention __get_convention(void) { unsigned long flags; diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_scm.h index 4532907e8489..aa7d06939f8e 100644 --- a/drivers/firmware/qcom/qcom_scm.h +++ b/drivers/firmware/qcom/qcom_scm.h @@ -5,6 +5,7 @@ #define __QCOM_SCM_INT_H struct device; +struct qcom_tzmem_pool; enum qcom_scm_convention { SMC_CONVENTION_UNKNOWN, @@ -78,6 +79,8 @@ int scm_legacy_call_atomic(struct device *dev, const struct qcom_scm_desc *desc, int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc, struct qcom_scm_res *res); +struct qcom_tzmem_pool *qcom_scm_get_tzmem_pool(void); + #define QCOM_SCM_SVC_BOOT 0x01 #define QCOM_SCM_BOOT_SET_ADDR 0x01 #define QCOM_SCM_BOOT_TERMINATE_PC 0x02 From patchwork Mon Nov 20 13:21:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 745443 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b="LDFugB4p" Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A75C9192 for ; Mon, 20 Nov 2023 05:21:29 -0800 (PST) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-408382da7f0so17136105e9.0 for ; Mon, 20 Nov 2023 05:21:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1700486488; x=1701091288; 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Mon, 20 Nov 2023 05:21:28 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:c590:a7ce:883:eba3]) by smtp.gmail.com with ESMTPSA id k18-20020a05600c0b5200b004065e235417sm17329192wmr.21.2023.11.20.05.21.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Nov 2023 05:21:27 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [RESEND PATCH v5 04/12] firmware: qcom: scm: make qcom_scm_assign_mem() use the TZ allocator Date: Mon, 20 Nov 2023 14:21:10 +0100 Message-Id: <20231120132118.30473-5-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231120132118.30473-1-brgl@bgdev.pl> References: <20231120132118.30473-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bartosz Golaszewski Let's use the new TZ memory allocator to obtain a buffer for this call instead of using dma_alloc_coherent(). Signed-off-by: Bartosz Golaszewski Reviewed-by: Andrew Halaney Tested-by: Andrew Halaney # sc8280xp-lenovo-thinkpad-x13s --- drivers/firmware/qcom/qcom_scm.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 71e98b666391..754f6056b99f 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -998,14 +999,13 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, struct qcom_scm_mem_map_info *mem_to_map; phys_addr_t mem_to_map_phys; phys_addr_t dest_phys; - dma_addr_t ptr_phys; + phys_addr_t ptr_phys; size_t mem_to_map_sz; size_t dest_sz; size_t src_sz; size_t ptr_sz; int next_vm; __le32 *src; - void *ptr; int ret, i, b; u64 srcvm_bits = *srcvm; @@ -1015,10 +1015,13 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, ptr_sz = ALIGN(src_sz, SZ_64) + ALIGN(mem_to_map_sz, SZ_64) + ALIGN(dest_sz, SZ_64); - ptr = dma_alloc_coherent(__scm->dev, ptr_sz, &ptr_phys, GFP_KERNEL); + void *ptr __free(qcom_tzmem) = qcom_tzmem_alloc(__scm->mempool, + ptr_sz, GFP_KERNEL); if (!ptr) return -ENOMEM; + ptr_phys = qcom_tzmem_to_phys(ptr); + /* Fill source vmid detail */ src = ptr; i = 0; @@ -1047,7 +1050,6 @@ int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, ret = __qcom_scm_assign_mem(__scm->dev, mem_to_map_phys, mem_to_map_sz, ptr_phys, src_sz, dest_phys, dest_sz); - dma_free_coherent(__scm->dev, ptr_sz, ptr, ptr_phys); if (ret) { dev_err(__scm->dev, "Assign memory protection call failed %d\n", ret); From patchwork Mon Nov 20 13:21:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 745442 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b="Po3/Amb7" Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05938139 for ; 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Mon, 20 Nov 2023 05:21:28 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [RESEND PATCH v5 05/12] firmware: qcom: scm: make qcom_scm_ice_set_key() use the TZ allocator Date: Mon, 20 Nov 2023 14:21:11 +0100 Message-Id: <20231120132118.30473-6-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231120132118.30473-1-brgl@bgdev.pl> References: <20231120132118.30473-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bartosz Golaszewski Let's use the new TZ memory allocator to obtain a buffer for this call instead of using dma_alloc_coherent(). Signed-off-by: Bartosz Golaszewski Reviewed-by: Andrew Halaney Tested-by: Andrew Halaney # sc8280xp-lenovo-thinkpad-x13s --- drivers/firmware/qcom/qcom_scm.c | 21 +++++---------------- 1 file changed, 5 insertions(+), 16 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 754f6056b99f..31071a714cf1 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -1197,32 +1197,21 @@ int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size, .args[4] = data_unit_size, .owner = ARM_SMCCC_OWNER_SIP, }; - void *keybuf; - dma_addr_t key_phys; + int ret; - /* - * 'key' may point to vmalloc()'ed memory, but we need to pass a - * physical address that's been properly flushed. The sanctioned way to - * do this is by using the DMA API. But as is best practice for crypto - * keys, we also must wipe the key after use. This makes kmemdup() + - * dma_map_single() not clearly correct, since the DMA API can use - * bounce buffers. Instead, just use dma_alloc_coherent(). Programming - * keys is normally rare and thus not performance-critical. - */ - - keybuf = dma_alloc_coherent(__scm->dev, key_size, &key_phys, - GFP_KERNEL); + void *keybuf __free(qcom_tzmem) = qcom_tzmem_alloc(__scm->mempool, + key_size, + GFP_KERNEL); if (!keybuf) return -ENOMEM; memcpy(keybuf, key, key_size); - desc.args[1] = key_phys; + desc.args[1] = qcom_tzmem_to_phys(keybuf); ret = qcom_scm_call(__scm->dev, &desc, NULL); memzero_explicit(keybuf, key_size); - dma_free_coherent(__scm->dev, key_size, keybuf, key_phys); return ret; } EXPORT_SYMBOL_GPL(qcom_scm_ice_set_key); From patchwork Mon Nov 20 13:21:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 745441 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b="BrwAdicZ" Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2579BD45 for ; Mon, 20 Nov 2023 05:21:35 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-408425c7c10so15958855e9.0 for ; Mon, 20 Nov 2023 05:21:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1700486493; x=1701091293; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W4078kP/f/V2Gky4lpqf6UFEH3ZYOdfKZS8n60prFLY=; b=BrwAdicZDi7QykoENutfcGs/CCA0+/YW0oC7LmKTtooHoqrpTuK8Q3W2ClCZ8BvU3z +WmojYXlZ/gNxJaB6xIOwSjPyr+JWIECbP4n15DDydQj4NUhwbTqOtKbrDTBN0xlPjkb LV+GqKkZzf1If4xW5pW7UIFLPFfpsX2OI/OIO5qLL5lj5zL49Urm/rpBEms6ypWmrgVm 0TMo3amL66x2miq3jjY5qbjsuJmumwFwWW0uCXs727dj0JypQhjLnF6WwPlpVMV4OGn4 hSoO8Ar4CtfL/kMMyAR45s89t02FWobFzHXPFA7c7RJPLnjw4qRGbO8YD5gsrqyO9J3J Jc5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700486493; x=1701091293; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W4078kP/f/V2Gky4lpqf6UFEH3ZYOdfKZS8n60prFLY=; b=sZ/qWvVj8cMnRoLP8CO+fg01u1WOHS7VefCbio5UAo6t/7Hd4WoHeLgkV0KQ9W9x7O 0KqTAAfQ61cRHveoweKxdQXEcRjcqU7Z171BqRboiGTK8Sdfz0INRCkY2amSSMD+K9EU u10AWcWlU3n/2Be1vyaEn8wdijY6lxR4YA7bOLEq+MHIje030q5b7dMiQUbsXHqqmTcR 4OB2NpiK8Ah5RMd5ydf+b7e0p271eqvH1NnLa2AQCAyfAwQppvFypZJYbA7ysudshg3x tC0qJR+H6l9pj0wgE0r0Ug5K6F4np6sXHCU7XTZBFYurwPepp+O5JiRlgOu5DF0fphHt uyng== X-Gm-Message-State: AOJu0YwNQGqopeAGKvFGgz0STj4gD4uTixM957AeTR+NSg6hd+epS5cL xM+Nr/TaFnkBX2F1JRBfL+5zOAqWTPQSpWYJVlI= X-Google-Smtp-Source: AGHT+IEW9+oYZLDFKZ4C93QxdzjhcY7Ub/vzYo+YP+VKq3+5Wkwc1YMOfcagUXkV9ajOJNBCfP72MQ== X-Received: by 2002:a05:600c:45d0:b0:408:41b4:7fe5 with SMTP id s16-20020a05600c45d000b0040841b47fe5mr6639859wmo.16.1700486493295; Mon, 20 Nov 2023 05:21:33 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:c590:a7ce:883:eba3]) by smtp.gmail.com with ESMTPSA id k18-20020a05600c0b5200b004065e235417sm17329192wmr.21.2023.11.20.05.21.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Nov 2023 05:21:32 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [RESEND PATCH v5 09/12] firmware: qcom: scm: add support for SHM bridge operations Date: Mon, 20 Nov 2023 14:21:15 +0100 Message-Id: <20231120132118.30473-10-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231120132118.30473-1-brgl@bgdev.pl> References: <20231120132118.30473-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bartosz Golaszewski Add low-level primitives for enabling SHM bridge support as well as creating and destroying SHM bridge pools to qcom-scm. Signed-off-by: Bartosz Golaszewski Acked-by: Andrew Halaney Tested-by: Andrew Halaney # sc8280xp-lenovo-thinkpad-x13s --- drivers/firmware/qcom/qcom_scm.c | 60 ++++++++++++++++++++++++++ drivers/firmware/qcom/qcom_scm.h | 3 ++ include/linux/firmware/qcom/qcom_scm.h | 6 +++ 3 files changed, 69 insertions(+) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 318d7d398e5f..839773270a21 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -1323,6 +1323,66 @@ bool qcom_scm_lmh_dcvsh_available(void) } EXPORT_SYMBOL_GPL(qcom_scm_lmh_dcvsh_available); +int qcom_scm_shm_bridge_enable(void) +{ + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_MP, + .cmd = QCOM_SCM_MP_SHM_BRIDGE_ENABLE, + .owner = ARM_SMCCC_OWNER_SIP + }; + + struct qcom_scm_res res; + + if (!__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_MP, + QCOM_SCM_MP_SHM_BRIDGE_ENABLE)) + return -EOPNOTSUPP; + + return qcom_scm_call(__scm->dev, &desc, &res) ?: res.result[0]; +} +EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_enable); + +int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags, + u64 ipfn_and_s_perm_flags, u64 size_and_flags, + u64 ns_vmids, u64 *handle) +{ + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_MP, + .cmd = QCOM_SCM_MP_SHM_BRIDGE_CREATE, + .owner = ARM_SMCCC_OWNER_SIP, + .args[0] = pfn_and_ns_perm_flags, + .args[1] = ipfn_and_s_perm_flags, + .args[2] = size_and_flags, + .args[3] = ns_vmids, + .arginfo = QCOM_SCM_ARGS(4, QCOM_SCM_VAL, QCOM_SCM_VAL, + QCOM_SCM_VAL, QCOM_SCM_VAL), + }; + + struct qcom_scm_res res; + int ret; + + ret = qcom_scm_call(__scm->dev, &desc, &res); + + if (handle && !ret) + *handle = res.result[1]; + + return ret ?: res.result[0]; +} +EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_create); + +int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle) +{ + struct qcom_scm_desc desc = { + .svc = QCOM_SCM_SVC_MP, + .cmd = QCOM_SCM_MP_SHM_BRIDGE_DELETE, + .owner = ARM_SMCCC_OWNER_SIP, + .args[0] = handle, + .arginfo = QCOM_SCM_ARGS(1, QCOM_SCM_VAL), + }; + + return qcom_scm_call(__scm->dev, &desc, NULL); +} +EXPORT_SYMBOL_GPL(qcom_scm_shm_bridge_delete); + int qcom_scm_lmh_profile_change(u32 profile_id) { struct qcom_scm_desc desc = { diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_scm.h index aa7d06939f8e..cb7273aa0a5e 100644 --- a/drivers/firmware/qcom/qcom_scm.h +++ b/drivers/firmware/qcom/qcom_scm.h @@ -116,6 +116,9 @@ struct qcom_tzmem_pool *qcom_scm_get_tzmem_pool(void); #define QCOM_SCM_MP_IOMMU_SET_CP_POOL_SIZE 0x05 #define QCOM_SCM_MP_VIDEO_VAR 0x08 #define QCOM_SCM_MP_ASSIGN 0x16 +#define QCOM_SCM_MP_SHM_BRIDGE_ENABLE 0x1c +#define QCOM_SCM_MP_SHM_BRIDGE_DELETE 0x1d +#define QCOM_SCM_MP_SHM_BRIDGE_CREATE 0x1e #define QCOM_SCM_SVC_OCMEM 0x0f #define QCOM_SCM_OCMEM_LOCK_CMD 0x01 diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h index ccaf28846054..9b6054813f59 100644 --- a/include/linux/firmware/qcom/qcom_scm.h +++ b/include/linux/firmware/qcom/qcom_scm.h @@ -115,6 +115,12 @@ int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, int qcom_scm_lmh_profile_change(u32 profile_id); bool qcom_scm_lmh_dcvsh_available(void); +int qcom_scm_shm_bridge_enable(void); +int qcom_scm_shm_bridge_create(struct device *dev, u64 pfn_and_ns_perm_flags, + u64 ipfn_and_s_perm_flags, u64 size_and_flags, + u64 ns_vmids, u64 *handle); +int qcom_scm_shm_bridge_delete(struct device *dev, u64 handle); + #ifdef CONFIG_QCOM_QSEECOM int qcom_scm_qseecom_app_get_id(const char *app_name, u32 *app_id); From patchwork Mon Nov 20 13:21:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 745440 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b="Ob7A1j+Z" Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 380A4D50 for ; Mon, 20 Nov 2023 05:21:36 -0800 (PST) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-40839652b97so14263975e9.3 for ; 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Mon, 20 Nov 2023 05:21:33 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [RESEND PATCH v5 10/12] firmware: qcom: tzmem: enable SHM Bridge support Date: Mon, 20 Nov 2023 14:21:16 +0100 Message-Id: <20231120132118.30473-11-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231120132118.30473-1-brgl@bgdev.pl> References: <20231120132118.30473-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bartosz Golaszewski Add a new Kconfig option for selecting the SHM Bridge mode of operation for the TrustZone memory allocator. If enabled at build-time, it will still be checked for availability at run-time. If the architecture doesn't support SHM Bridge, the allocator will work just like in the default mode. Signed-off-by: Bartosz Golaszewski Tested-by: Andrew Halaney # sc8280xp-lenovo-thinkpad-x13s --- drivers/firmware/qcom/Kconfig | 10 +++++ drivers/firmware/qcom/qcom_tzmem.c | 65 +++++++++++++++++++++++++++++- 2 files changed, 74 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index 237da40de832..e01407e31ae4 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -27,6 +27,16 @@ config QCOM_TZMEM_MODE_DEFAULT Use the default allocator mode. The memory is page-aligned, non-cachable and contiguous. +config QCOM_TZMEM_MODE_SHMBRIDGE + bool "SHM Bridge" + help + Use Qualcomm Shared Memory Bridge. The memory has the same alignment as + in the 'Default' allocator but is also explicitly marked as an SHM Bridge + buffer. + + With this selected, all buffers passed to the TrustZone must be allocated + using the TZMem allocator or else the TrustZone will refuse to use them. + endchoice config QCOM_SCM_DOWNLOAD_MODE_DEFAULT diff --git a/drivers/firmware/qcom/qcom_tzmem.c b/drivers/firmware/qcom/qcom_tzmem.c index 68ca59c5598e..8010af80fd59 100644 --- a/drivers/firmware/qcom/qcom_tzmem.c +++ b/drivers/firmware/qcom/qcom_tzmem.c @@ -55,7 +55,70 @@ static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) } -#endif /* CONFIG_QCOM_TZMEM_MODE_DEFAULT */ +#elif IS_ENABLED(CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE) + +#include + +#define QCOM_SHM_BRIDGE_NUM_VM_SHIFT 9 + +static bool qcom_tzmem_using_shm_bridge; + +static int qcom_tzmem_init(void) +{ + int ret; + + ret = qcom_scm_shm_bridge_enable(); + if (ret == -EOPNOTSUPP) { + dev_info(qcom_tzmem_dev, "SHM Bridge not supported\n"); + return 0; + } + + if (!ret) + qcom_tzmem_using_shm_bridge = true; + + return ret; +} + +static int qcom_tzmem_init_pool(struct qcom_tzmem_pool *pool) +{ + u64 pfn_and_ns_perm, ipfn_and_s_perm, size_and_flags, ns_perms; + int ret; + + if (!qcom_tzmem_using_shm_bridge) + return 0; + + ns_perms = (QCOM_SCM_PERM_WRITE | QCOM_SCM_PERM_READ); + pfn_and_ns_perm = (u64)pool->pbase | ns_perms; + ipfn_and_s_perm = (u64)pool->pbase | ns_perms; + size_and_flags = pool->size | (1 << QCOM_SHM_BRIDGE_NUM_VM_SHIFT); + + u64 *handle __free(kfree) = kzalloc(sizeof(*handle), GFP_KERNEL); + if (!handle) + return -ENOMEM; + + ret = qcom_scm_shm_bridge_create(qcom_tzmem_dev, pfn_and_ns_perm, + ipfn_and_s_perm, size_and_flags, + QCOM_SCM_VMID_HLOS, handle); + if (ret) + return ret; + + pool->priv = no_free_ptr(handle); + + return 0; +} + +static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) +{ + u64 *handle = pool->priv; + + if (!qcom_tzmem_using_shm_bridge) + return; + + qcom_scm_shm_bridge_delete(qcom_tzmem_dev, *handle); + kfree(handle); +} + +#endif /* CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE */ /** * qcom_tzmem_pool_new() - Create a new TZ memory pool. From patchwork Mon Nov 20 13:21:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartosz Golaszewski X-Patchwork-Id: 745439 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bgdev-pl.20230601.gappssmtp.com header.i=@bgdev-pl.20230601.gappssmtp.com header.b="iWKVhgP0" Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CA8BD61 for ; Mon, 20 Nov 2023 05:21:37 -0800 (PST) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2c59a4dd14cso52556321fa.2 for ; Mon, 20 Nov 2023 05:21:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1700486495; x=1701091295; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M4fo0VIV7uqzpyPDAWdX5Jk/6XQkZo9JW17PTbGLI2E=; b=iWKVhgP076gRs6u8mUnAthn3b+GbXzgyQq5/RZYt6OLIwMKauhpxdm78RN051Dmf7x QGJB+ouz5PCIozPqN17L2wBwF+Pp5HRyRj9XppfvUX0T3yqEKbSnOUT+12FEvC6+T2Dg c3qS+Sf73T49xawNZoLtGXnZuy7qVdsJEbZxk1/TctVOfXG5VWnDz1UTHGMXPHhks+Lz QG9m0rcCEIEtQ5Jwj9JD9JmS/59MihtOFZkvd4tIShke4r89BIiW18RnyedYTuC0zjHJ f+RfBGYfl4NVHz4elGxDsLZDa0Pp6xydLvQq51FAP36/iOSedfB+1Oudch0PBa9N61Ck HueA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1700486495; x=1701091295; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M4fo0VIV7uqzpyPDAWdX5Jk/6XQkZo9JW17PTbGLI2E=; b=auswKLIRhWfdozGHhEEEANF/7pDY14YbmoDrIFlpVfMHyoWb+oC8jbwOw4hbwOXFbO YOD8aNaO05TBmFcgmA3f8yCRqdK3WLfPUlMXC5nE2NMB2foi99IVku+/doco3Nx7EvJa EQvjomanU/M40JJQ+MDrBod4Obq7zVZvfFOY/e+tE6lrPGNxzWIO35KTwl3GVd9+rznk rCpILgE7dN4Sk9VQVsSHpPlzlA7RpanjIrQl/FrXS4rcFYs+Rx1Yg6g1aggy2oy9ryTv RZ+3NhlSH27JhUsuF3VtJrVz0n+fPPvUeY5Vb3nf6FX7RGxs5FXuH+c8RbqIr3WpO5uG IPwQ== X-Gm-Message-State: AOJu0YxqmnxZmXhJdJk84BB7Y0v77SCnsRZyaXJCiqu5+dkWwJ2lerQJ 8Vcy0oAkrDaEzLEzAxOtAUJOXA== X-Google-Smtp-Source: AGHT+IFXdb7gzI4IMHiMj9vg7v37YVPJ3yyM6zb9TaX7RJaZc8/c+c1k+S0o3wgmpurQ4luAiGdbmQ== X-Received: by 2002:a2e:9e02:0:b0:2c8:7130:c6e5 with SMTP id e2-20020a2e9e02000000b002c87130c6e5mr4656583ljk.6.1700486495208; Mon, 20 Nov 2023 05:21:35 -0800 (PST) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:c590:a7ce:883:eba3]) by smtp.gmail.com with ESMTPSA id k18-20020a05600c0b5200b004065e235417sm17329192wmr.21.2023.11.20.05.21.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Nov 2023 05:21:34 -0800 (PST) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [RESEND PATCH v5 11/12] firmware: qcom: scm: clarify the comment in qcom_scm_pas_init_image() Date: Mon, 20 Nov 2023 14:21:17 +0100 Message-Id: <20231120132118.30473-12-brgl@bgdev.pl> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231120132118.30473-1-brgl@bgdev.pl> References: <20231120132118.30473-1-brgl@bgdev.pl> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Bartosz Golaszewski The "memory protection" mechanism mentioned in the comment is the SHM Bridge. This is also the reason why we do not convert this call to using the TZ memory allocator. Signed-off-by: Bartosz Golaszewski Tested-by: Andrew Halaney # sc8280xp-lenovo-thinkpad-x13s --- drivers/firmware/qcom/qcom_scm.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 839773270a21..7ba5cff6e4e7 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -563,9 +563,13 @@ int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size, struct qcom_scm_res res; /* - * During the scm call memory protection will be enabled for the meta - * data blob, so make sure it's physically contiguous, 4K aligned and - * non-cachable to avoid XPU violations. + * During the SCM call the hypervisor will make the buffer containing + * the program data into an SHM Bridge. This is why we exceptionally + * must not use the TrustZone memory allocator here as - depending on + * Kconfig - it may already use the SHM Bridge mechanism internally. + * + * If we pass a buffer that is already part of an SHM Bridge to this + * call, it will fail. */ mdata_buf = dma_alloc_coherent(__scm->dev, size, &mdata_phys, GFP_KERNEL);