From patchwork Wed Dec 6 14:41:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frieder Schrempf X-Patchwork-Id: 751338 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="JrKJwofq" Received: from mail.fris.de (mail.fris.de [116.203.77.234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49025D4B; Wed, 6 Dec 2023 06:44:27 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 2C388C0131; Wed, 6 Dec 2023 15:44:24 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1701873864; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=ZNb5mGtHz1UeWfUC79dgVMDzRbY7b/tvjIXIDYkEZss=; b=JrKJwofqVfNgFuFtuUXKuPJizfwinPAMvh+r6cvsIHCksvxfV2eQ983vVXcNeqoIChyMyz KaeRn08igBAvXK2tqgTlsgeENTx7n1HuVdTN7YCm2EaChInWi7NOf9vEfdGzoFRBwFBBUb BWHxUl8FzybRLpg33dY+PHnduCYypZAYHZwOl9uJBmptwp3HLxSymat9S5vZzSkVjtWrEL B6Umf1omFpwYjEgcD+Z1TRWy8xzaBkRsjNKbDw2zqdBicjckNpM2j40Nt41bF/twSij/qH ROmTAcvgP8PPdIa6OImesReRjojxA1OLm5FEgGfA0KDhCG3D59+QYkIJ+6wDTA== From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Frieder Schrempf , Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team Subject: [PATCH v3 01/14] arm64: dts: imx8mm-kontron: Add support for display bridges on BL i.MX8MM Date: Wed, 6 Dec 2023 15:41:04 +0100 Message-ID: <20231206144201.46911-2-frieder@fris.de> In-Reply-To: <20231206144201.46911-1-frieder@fris.de> References: <20231206144201.46911-1-frieder@fris.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 From: Frieder Schrempf The Kontron Electronics BL i.MX8MM has oboard disply bridges for DSI->HDMI and DSI->LVDS conversion. The DSI interface is muxed by a GPIO-controlled switch to one of these two bridges. By default the HDMI bridge is enabled. The LVDS bridge can be selected by loading an additional (panel-specific) overlay. Signed-off-by: Frieder Schrempf --- Changes for v3: * Address Shawn's review comments (thanks!) Changes for v2: * Rework DSI mux GPIO logic to be compatible with overlay * Switch from 4 to 2 DSI lanes for LVDS bridge to fix non-working display --- .../boot/dts/freescale/imx8mm-kontron-bl.dts | 160 ++++++++++++++++++ 1 file changed, 160 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts index dcec57c20399e..a0f0be3f104fb 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts @@ -25,6 +25,17 @@ osc_can: clock-osc-can { clock-output-names = "osc-can"; }; + hdmi-out { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_in_conn: endpoint { + remote-endpoint = <&bridge_out_conn>; + }; + }; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -132,6 +143,104 @@ ethphy: ethernet-phy@0 { }; }; +&gpio4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio4>; + + dsi_mux_sel_hdmi: dsi-mux-sel-hdmi-hog { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "dsi-mux-sel"; + }; + + dsi_mux_sel_lvds: dsi-mux-sel-lvds-hog { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "dsi-mux-sel"; + status = "disabled"; + }; + + dsi-mux-oe-hog { + gpio-hog; + gpios = <15 GPIO_ACTIVE_LOW>; + output-high; + line-name = "dsi-mux-oe"; + }; +}; + +&i2c3 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + hdmi: hdmi@39 { + compatible = "adi,adv7535"; + reg = <0x39>; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_adv7535>; + + interrupt-parent = <&gpio4>; + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; + + adi,dsi-lanes = <4>; + + a2vdd-supply = <®_vdd_1v8>; + avdd-supply = <®_vdd_1v8>; + dvdd-supply = <®_vdd_1v8>; + pvdd-supply = <®_vdd_1v8>; + v1p2-supply = <®_vdd_1v8>; + v3p3-supply = <®_vdd_3v3>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_in_dsi_hdmi: endpoint { + remote-endpoint = <&dsi_out_bridge>; + }; + }; + + port@1 { + reg = <1>; + + bridge_out_conn: endpoint { + remote-endpoint = <&hdmi_in_conn>; + }; + }; + }; + }; + + lvds: bridge@2c { + compatible = "ti,sn65dsi84"; + reg = <0x2c>; + enable-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sn65dsi84>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_in_dsi_lvds: endpoint { + remote-endpoint = <&dsi_out_bridge>; + data-lanes = <1 2>; + }; + }; + }; + }; +}; + &i2c4 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -144,6 +253,30 @@ rx8900: rtc@32 { }; }; +&lcdif { + status = "okay"; +}; + +&mipi_dsi { + samsung,esc-clock-frequency = <54000000>; + /* + * Let the driver calculate an appropriate clock rate based on the pixel + * clock instead of using the fixed value from imx8mm.dtsi. + */ + /delete-property/ samsung,pll-clock-frequency; + status = "okay"; + + ports { + port@1 { + reg = <1>; + + dsi_out_bridge: endpoint { + remote-endpoint = <&bridge_in_dsi_hdmi>; + }; + }; + }; +}; + &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; @@ -207,6 +340,12 @@ &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio>; + pinctrl_adv7535: adv7535grp { + fsl,pins = < + MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x19 + >; + }; + pinctrl_can: cangrp { fsl,pins = < MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 @@ -277,6 +416,20 @@ MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 >; }; + pinctrl_gpio4: gpio4grp { + fsl,pins = < + MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x19 + MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x19 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000083 + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000083 + >; + }; + pinctrl_i2c4: i2c4grp { fsl,pins = < MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 @@ -290,6 +443,13 @@ MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19 >; }; + pinctrl_sn65dsi84: sn65dsi84grp { + fsl,pins = < + MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x19 + MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x19 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 From patchwork Wed Dec 6 14:41:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frieder Schrempf X-Patchwork-Id: 751337 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="diSwOy9y" Received: from mail.fris.de (unknown [IPv6:2a01:4f8:c2c:390b::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80AA0D50; Wed, 6 Dec 2023 06:44:32 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 9839DBFD15; Wed, 6 Dec 2023 15:44:30 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1701873871; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=NkMKnEjwIGTkVluEw4nFhKYXxAKXw2JtUmP+2W0Q83E=; b=diSwOy9yZUei6M299O6MJLnYq/3SMDZOXAmm4xLzGKAe/JdM01/CeKDps0p5yJtcHKhiFn NHBAK8c5nSUdra3bC9w7amclupXt4LnH2EyR8BewvOqbXR7sOFteNJUxguwSgCcpB3td2B qPPAfLqQ1KrAkQrmcUGSF1ddRmHvZKhk7NWEin6yj+0sHONdg0fDzU+IcwG+crA0jwUeT6 BtbZ1Z4zVVHd8dYwunnrMVY8Zzcp/UhQoar/bUNy4795aKCkTELOGHNki8TbuVt63GXh3a XKx4rvgQ62KLEdCm1V01sdFriQSq48T8kYJ41Xuc74986uMw66RMGI+5F2po9g== From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Frieder Schrempf , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team Subject: [PATCH v3 03/14] arm64: dts: imx8mm-kontron: Disable pullups for I2C signals on OSM-S i.MX8MM Date: Wed, 6 Dec 2023 15:41:06 +0100 Message-ID: <20231206144201.46911-4-frieder@fris.de> In-Reply-To: <20231206144201.46911-1-frieder@fris.de> References: <20231206144201.46911-1-frieder@fris.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 From: Frieder Schrempf There are external pullup resistors on the board and due to silicon errata ERR050080 let's disable the internal ones to prevent any unwanted behavior in case they wear out. Fixes: de9618e84f76 ("arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-S") Signed-off-by: Frieder Schrempf --- Changes for v3: * none Changes for v2: * none --- arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts | 4 ++-- arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts index 8b16bd68576c0..0730c22e5b6b9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts @@ -294,8 +294,8 @@ MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 pinctrl_i2c4: i2c4grp { fsl,pins = < - MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 - MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000083 + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000083 >; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi index 6e75ab879bf59..3e7db968f7e64 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi @@ -252,8 +252,8 @@ MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19 pinctrl_i2c1: i2c1grp { fsl,pins = < - MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 - MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000083 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000083 >; }; From patchwork Wed Dec 6 14:41:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frieder Schrempf X-Patchwork-Id: 751336 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="zX6fAcHq" Received: from mail.fris.de (unknown [IPv6:2a01:4f8:c2c:390b::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D329D62; Wed, 6 Dec 2023 06:44:38 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 02823C0191; Wed, 6 Dec 2023 15:44:35 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1701873876; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=QLCjnonuAbegej4DQkbKP3MHbkGcNHZPvf2RlTiENxo=; b=zX6fAcHqiFqB0GVbo5b3W1dFBicZS3zkQ/aOxZnb1ZpTMGtjdv36CtG0aVNhQ6Dy3ktN02 AOt+dd/kdhxHnXQtI0a8lmuSyjkmmYYNoFO5ruqXYsmfwo0j8mFLxx7mRPQYXle/sO0AMP 82D4LLWvAkyhzZZ2RU8p97tkCYnX7tY0upljLEQF0+ciRnhpzV2XHRS2sSUN9dR6CQG/Vn BCz2lVjnZ7+th+mNQ2bnG89ElJjNwR4Uk/D2eRga8b5fMxti4fNbUDFDxRsvxh6cViVOlO F7VW0qvcpY/AsdaQIArg1+L/d/YFN1l09fJvZUCl0fdkZF928Girpc7RIdlz6Q== From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Frieder Schrempf , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team Subject: [PATCH v3 06/14] arm64: dts: imx8mm-kontron: Disable pullups for onboard UART signals on BL board Date: Wed, 6 Dec 2023 15:41:09 +0100 Message-ID: <20231206144201.46911-7-frieder@fris.de> In-Reply-To: <20231206144201.46911-1-frieder@fris.de> References: <20231206144201.46911-1-frieder@fris.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 From: Frieder Schrempf These signals are actively driven by the SoC or by the onboard transceiver. There's no need to enable the internal pull resistors and due to silicon errata ERR050080 let's disable the internal ones to prevent any unwanted behavior in case they wear out. Fixes: 8668d8b2e67f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards") Signed-off-by: Frieder Schrempf --- Changes for v3: * none Changes for v2: * none --- .../boot/dts/freescale/imx8mm-kontron-bl.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts index 866f35d1633d4..767012661bfca 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts @@ -452,19 +452,19 @@ MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x19 pinctrl_uart1: uart1grp { fsl,pins = < - MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 - MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140 - MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140 + MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x0 + MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x0 + MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x0 + MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x0 >; }; pinctrl_uart2: uart2grp { fsl,pins = < - MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 - MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 - MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 - MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 + MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x0 + MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x0 + MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x0 + MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x0 >; }; From patchwork Wed Dec 6 14:41:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frieder Schrempf X-Patchwork-Id: 751335 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="UCYx6MrK" Received: from mail.fris.de (mail.fris.de [116.203.77.234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 690B6D59; Wed, 6 Dec 2023 06:44:39 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 7D5BBC0131; Wed, 6 Dec 2023 15:44:37 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1701873877; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=tMSX8hysbUP88C2UKn2uKuZ0nkUjhmVSfTTqVo0O4Rk=; b=UCYx6MrKF2ksjayBn+9pCB7GcXteUArdpZEbvpemiq9EoFtB6F5KJRTOLoLDrDgHkUaaQ2 a2ZGwYnDTiBDr8feqKWexaJe2ecbJLgR9FP4nyvd7UD3VtXyFCHbqLPYlsQhi5UkffJKhf AXMrdK8+JGZE+0yoLXIEZKTRh7Vc7GXoQIoPJDGQ1+gMuNWnCvRZCa8gKt802Bg0MmquVf Icd+IEfeP/6sXRwds38WlNLlpxqWzSFW3Vz4vKrvyyaWiHfO50ZkwBfGRcek7Iy4LtfGdE 8yy66P5hCkEfJlolNgJoem27FilAp9hrz+Li+K51jgvCfYREqHS4gFqPBUQF3g== From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Frieder Schrempf , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team Subject: [PATCH v3 07/14] arm64: dts: imx8mm-kontron: Disable pull resistors for SD card signals on BL OSM-S board Date: Wed, 6 Dec 2023 15:41:10 +0100 Message-ID: <20231206144201.46911-8-frieder@fris.de> In-Reply-To: <20231206144201.46911-1-frieder@fris.de> References: <20231206144201.46911-1-frieder@fris.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 From: Frieder Schrempf Some signals have external pullup resistors on the board and don't need the internal ones to be enabled. Due to silicon errata ERR050080 let's disable the internal pull resistors whererever possible and prevent any unwanted behavior in case they wear out. Fixes: de9618e84f76 ("arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-S") Signed-off-by: Frieder Schrempf --- Changes for v3: * none Changes for v2: * none --- .../dts/freescale/imx8mm-kontron-bl-osm-s.dts | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts index 1dd03ef0a7835..d9fa0deea7002 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts @@ -337,40 +337,40 @@ MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19 pinctrl_usdhc2: usdhc2grp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; }; From patchwork Wed Dec 6 14:41:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frieder Schrempf X-Patchwork-Id: 751334 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="TWBfRiIB" Received: from mail.fris.de (unknown [IPv6:2a01:4f8:c2c:390b::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE61210EB; Wed, 6 Dec 2023 06:44:42 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 64F7BC00E1; Wed, 6 Dec 2023 15:44:40 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1701873880; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=wTGxRgaKGKupnoXw4GHvrCi9OifBL1yEtA/OEf2ONgk=; b=TWBfRiIBUbghnDgwE6d1IzO6XlWafpLVCkuR6KMgN+kNwUHDqJPLimKn8F1FVJnCCoYkN3 W94CGtzWTunAH9KCbNyhHMy0yNv527Xl275PT3Jv6xiHRztSb7jUU/9qqQsdkxbaA2CWC1 O8z89qFUm2lZk6XkgYtq75H5WWbzquHgO9PLnZroDLFqHrJfyfjVTc4oAElz38ln2BboQ7 jEn9HLmND3tCxX6Fh516MO2bXQ8NA8hCAR/qsd9/q2j5aYnLVUVA7ijS9Xb4CbaJjHNsz0 9xv52VscFsHuGqouMDk7hHo5a6PQkqyxazDgzuAgRWLeEC4xUCb3zNnNyMlF/Q== From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Frieder Schrempf , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team Subject: [PATCH v3 09/14] arm64: dts: imx8mm-kontron: Fix interrupt for RTC on OSM-S i.MX8MM module Date: Wed, 6 Dec 2023 15:41:12 +0100 Message-ID: <20231206144201.46911-10-frieder@fris.de> In-Reply-To: <20231206144201.46911-1-frieder@fris.de> References: <20231206144201.46911-1-frieder@fris.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 From: Frieder Schrempf The level of the interrupt signal is active low instead. Fix this. Fixes: de9618e84f76 ("arm64: dts: Add support for Kontron SL/BL i.MX8MM OSM-S") Signed-off-by: Frieder Schrempf --- Changes for v3: * none Changes for v2: * none --- arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi index 3e7db968f7e64..60abcb636cedf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi @@ -210,7 +210,7 @@ rv3028: rtc@52 { reg = <0x52>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rtc>; - interrupts-extended = <&gpio4 1 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&gpio4 1 IRQ_TYPE_LEVEL_LOW>; trickle-diode-disable; }; }; From patchwork Wed Dec 6 14:41:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frieder Schrempf X-Patchwork-Id: 751333 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="HP+2WGA2" Received: from mail.fris.de (mail.fris.de [116.203.77.234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53C2CD44; Wed, 6 Dec 2023 06:44:45 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 77FDEC0191; Wed, 6 Dec 2023 15:44:43 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1701873883; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=9tDzhWrZuTaKInW57NumdE7scux5IsL/tfSmFVPexRg=; b=HP+2WGA2lTX9jZ7iMu98kMGZJuLSt65SAea3jw+Y9GRJdLiEi6UwcYJMo8bEyFNtjwjvF0 mJ2fG1aUu2/otSybMa6d1TCki1S1qd9df9PUeO5+sDHKbjB1YHbSJ64ragM0jC7JExkkGM cZKYMQ9L4Y736vH91Onffn3MLduwcjXCSkxjUk3mBJSbLDZ0vc66R7BFQBFdwnELt8zGhj zUIZCRa67B4MoRkDVN3l1KnJ66Ue8keV8JfHwYi/cwGCRte4KPuAvNcw0G4Fj/q6DpMsEP DlS6xtaB1wU0TvTYHJ9WX1AworZDJ/JAROnrnlPslaatNsHnNM89Qc1tp5EKWQ== From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Frieder Schrempf , Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team Subject: [PATCH v3 11/14] arm64: dts: imx8mm-kontron: Disable uneffective PUE bit in SDIO IOMUX Date: Wed, 6 Dec 2023 15:41:14 +0100 Message-ID: <20231206144201.46911-12-frieder@fris.de> In-Reply-To: <20231206144201.46911-1-frieder@fris.de> References: <20231206144201.46911-1-frieder@fris.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 From: Frieder Schrempf The PUE bit is only effective if the PE bit is also set. To avoid confusion, disable the PUE bit if it is not needed. Signed-off-by: Frieder Schrempf --- Changes for v3: * none Changes for v2: * none --- arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts index 7c5586efccc59..12f786a72fbd5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts @@ -362,7 +362,7 @@ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x90 >; }; @@ -375,7 +375,7 @@ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x90 >; }; @@ -388,7 +388,7 @@ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x90 >; }; }; From patchwork Wed Dec 6 14:41:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frieder Schrempf X-Patchwork-Id: 751332 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="Qei/bilb" Received: from mail.fris.de (unknown [IPv6:2a01:4f8:c2c:390b::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9E901725; Wed, 6 Dec 2023 06:44:48 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 56B03C0128; Wed, 6 Dec 2023 15:44:46 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1701873886; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=kx4/WNwSRtSkIKBw7sjNm52ZpZ7M2ZKDAMkBQh2uf30=; b=Qei/bilbQZvonf/vDhu6vrfBzQHNyoukyPFVD7Vi/C1ZxfOJFMZRwQQOWHN+nzz51iSXnZ rU65UBsTvs2JwfTVukbGLFhuH4iYsdKia/PL+L4hl1t9IF7KKZWV4mwPgaZH7WmUKwaQjI OSkKUY1IWRv3yXzqj7HvgdzTomrZnWYRUfrpvdNFJS45cqrLqwxU7bF+oCyolfe5dBJc92 AgcwvaB3e7FSQtLruxveBQS5lDCFT3BHuWRjj072vI7Y+EG95LZyT845On2I65nAPV40+X gE145IroEnL0pmt3l9bdyilJ0/Z7fOymjOsK/OPs6BjjStlColR7q6Wx75JqZA== From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Frieder Schrempf , Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team Subject: [PATCH v3 13/14] arm64: dts: imx8mm-kontron: Add I2C EEPROM on OSM-S Kontron i.MX8MM Date: Wed, 6 Dec 2023 15:41:16 +0100 Message-ID: <20231206144201.46911-14-frieder@fris.de> In-Reply-To: <20231206144201.46911-1-frieder@fris.de> References: <20231206144201.46911-1-frieder@fris.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Last-TLS-Session-Version: TLSv1.3 From: Frieder Schrempf There is an EEPROM on the SoM module. Add it to the description. Signed-off-by: Frieder Schrempf --- Changes for v3: * none Changes for v2: * none --- arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi index b161b0c85d61e..6b9058fc53332 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-osm-s.dtsi @@ -205,6 +205,14 @@ reg_nvcc_sd: LDO5 { }; }; + eeprom: eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + address-width = <16>; + pagesize = <32>; + size = <8192>; + }; + rv3028: rtc@52 { compatible = "microcrystal,rv3028"; reg = <0x52>;