From patchwork Wed Aug 28 06:59:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 172320 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp347005ily; Tue, 27 Aug 2019 23:59:42 -0700 (PDT) X-Google-Smtp-Source: APXvYqx6PfIaZ5tIk16ktfTzcWpINiByk/CA+VhwxhMEpTACbQO+WTKWI7OFByGwCC6T9igrnQYf X-Received: by 2002:aa7:991a:: with SMTP id z26mr2921063pff.43.1566975582444; Tue, 27 Aug 2019 23:59:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566975582; cv=none; d=google.com; s=arc-20160816; b=p7TiK+SPBg05yLQuKSe0rzxp0RH5fXiiY0bsF0edI2SxwEb4KqSom/kUmUqAprxJkN ifXYVfJgGOMYck1qx4DwPeiEv6vf/ObIjR/INSxWWqUJ50YAKAjmRst6McKs/wBmuzi3 pB0van8frW+Oc7q7+2gSkaSSvgVUZoYFcylQ2ex1uP876a0RqBJuk2b7ase4qaSTtNQC Orh+8ENAAxZHllVO6pSxAjqp2iOuPBUjApGwHY0FYnWZX0bvhlL8lU7sSOFuDZ0bUdv4 wzpEM9M+/dN/qa2gEL+EkcCMjm/JKwLyorRz0aU5JMLCS19MmnlUoapRlwqMx+/L6Lja /kWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=ZhhtgfHz1PpryANYuepNGwQFWlONDXmjaSxUGLbbF0g=; b=W7liLhproqz/FkmOYYuCorfTaNt83dv0PJXi0rZ9AYwoN2Ma6gqHrvzpoI/l70EGC/ j6NN9M3EZ+YZJW6WMKBmjlq3iun+8MsQ1jngcziZw//rJpbZCAGA69l6vW1upOv2PhZj 1JHxqqSN/APpG11DerE+PqZHOuUIIIw/cV+ALtTp/4UWy7MhWjRuhVHMsRnOvrzEszG6 wtLgWGkG/m5X897CdD1dpw+/6wZkGpUdFO50rVs2EZ0pF+Tq/Tsc41OWIYNYDn7G6O18 POQmr6ieXIS2Y9h8BbM3+FSV6GUt+8G1EFcx7SJs7to/cfoXVkndm0uhwr1UPQJZ4Cu3 EyYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Z12Q2RER; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d3si1739135pfq.7.2019.08.27.23.59.42; Tue, 27 Aug 2019 23:59:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Z12Q2RER; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726169AbfH1G7l (ORCPT + 5 others); Wed, 28 Aug 2019 02:59:41 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:58026 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726339AbfH1G7l (ORCPT ); Wed, 28 Aug 2019 02:59:41 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xcro120622; Wed, 28 Aug 2019 01:59:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1566975578; bh=ZhhtgfHz1PpryANYuepNGwQFWlONDXmjaSxUGLbbF0g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Z12Q2RERnKXNOgXtBbbO/p6iGfCzVBkcF0MGAoJWTbcM65ofZaB5ZuYKeiCipyeca RjH5lCa14VehLjy/pQEy980VJT/ZANwHqgGjJ3jllo82JMpbo0QelLbvgsLpgrZZiL OUcZLYO2dI9CF4bru+qy2ekA5fofjRsKsVyYUtZw= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x7S6xcs0052329 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Aug 2019 01:59:38 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 28 Aug 2019 01:59:37 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 28 Aug 2019 01:59:37 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xXVB074399; Wed, 28 Aug 2019 01:59:36 -0500 From: Tero Kristo To: , , CC: , , Subject: [PATCHv2 1/6] clk: ti: clkctrl: fix setting up clkctrl clocks Date: Wed, 28 Aug 2019 09:59:24 +0300 Message-ID: <20190828065929.32150-2-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190828065929.32150-1-t-kristo@ti.com> References: <20190828065929.32150-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Apply the proper register function for clkctrl clocks, so they get registered under the clk_hw_omap list also. This allows checking their type runtime. Signed-off-by: Tero Kristo --- drivers/clk/ti/clkctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c index 975995eea15c..a914df2e9e1b 100644 --- a/drivers/clk/ti/clkctrl.c +++ b/drivers/clk/ti/clkctrl.c @@ -622,7 +622,7 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node) init.ops = &omap4_clkctrl_clk_ops; hw->hw.init = &init; - clk = ti_clk_register(NULL, &hw->hw, init.name); + clk = ti_clk_register_omap_hw(NULL, &hw->hw, init.name); if (IS_ERR_OR_NULL(clk)) goto cleanup; From patchwork Wed Aug 28 06:59:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 172322 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp347025ily; Tue, 27 Aug 2019 23:59:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqx5DpYGRKJigATAq59O3mw3HnQ9nZAWwi14mZwjyXgdvcPgigMKkwaQNQlRe8FvCKqRubrG X-Received: by 2002:a63:2b0c:: with SMTP id r12mr2158405pgr.206.1566975583939; Tue, 27 Aug 2019 23:59:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566975583; cv=none; d=google.com; s=arc-20160816; b=WNmpm8bp8AjKRQOZEOSDokM8Ssu4cbx3UTmrURHNKShGHJ9jT9yk4atnl/RKrd/BVW 9s/BX7kKRBADps5XOBtegabxQ7jLsTGSF4AScpR1GnYNl8xiTQcfJBOsz38E5OiChqgt rzk3FeVvFB5PgTzY7sfLJln/cLbOuVJZ6Ckh/ZbSls6BIG5kp/pXZrzEre5WmDlVIuT/ acsyBf9K33POt+ySOExqy0gPGPLaHeIKmKkQYCIE+THNEw5rJ9cLtTtQ9DXsj3rU6Qr6 IKs1sJ/Gm5Xpt/BrZGBSUqdijAKyEK2LnkeSqXqc6+tGuAIxc4HafrLFjiQ7VVsQ1GUt +fIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=CA2p2SsjZBiZ+CVSDGSdF5T0f2itSmxPDgeQXhbNBGw=; b=xFnIBKtQguRLjiIwt4oV7xNx4T1cR4JEDvMyxPJzz9EDrItycijHBCRbkn0yLmFqfD bp4+7iXlNtkfo/oGrc6hWNpKqELi3JDn4ifp4+FFGeZHUVIsLZGNJRpxgDolEIFgptpk gE08H/PHiME0QllB/hWFvDZAegFWebh0uYWiPIrIdnQogX2cl/gARzvWXgVIE7zMmbMH ypAdcbp5hxHEM8Wa/wj5nrWaKa/Aq5DoR8e9IWrEbZBbWqARrKhTP0hwDWoz/24xUM3S JPRbmCtk+KMIcrLp21fP8vRoZYn5l8GY4kpCnXx+tCvi1bLJ1WHSgAWogzKHTVe4lbd1 a46w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=g2DE3ZVa; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d3si1739135pfq.7.2019.08.27.23.59.43; Tue, 27 Aug 2019 23:59:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=g2DE3ZVa; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726571AbfH1G7n (ORCPT + 5 others); Wed, 28 Aug 2019 02:59:43 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:58032 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726394AbfH1G7m (ORCPT ); Wed, 28 Aug 2019 02:59:42 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xd8u120626; Wed, 28 Aug 2019 01:59:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1566975579; bh=CA2p2SsjZBiZ+CVSDGSdF5T0f2itSmxPDgeQXhbNBGw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=g2DE3ZVaRj7PYe/aBAiixh42hQEr8B7mqZkEdnWGLFAnaqBfj1OaCTFuRttc9fx5J ve0Wh8BkoxQR/S8S5lc7AG51A1jFc1Gv1bO1dGpVxAiSM7lICA9+o3X2dVzunLjtgd FXIoTaoofQrZdAiIN+sW6eTMLhXmUxRMkJAA/OoM= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x7S6xdBA052339 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Aug 2019 01:59:39 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 28 Aug 2019 01:59:39 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 28 Aug 2019 01:59:39 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xXVC074399; Wed, 28 Aug 2019 01:59:37 -0500 From: Tero Kristo To: , , CC: , , Subject: [PATCHv2 2/6] clk: ti: clkctrl: convert to use bit helper macros instead of bitops Date: Wed, 28 Aug 2019 09:59:25 +0300 Message-ID: <20190828065929.32150-3-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190828065929.32150-1-t-kristo@ti.com> References: <20190828065929.32150-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org This improves the readibility of the code slightly, and makes modifying the flags bit simpler. Signed-off-by: Tero Kristo --- drivers/clk/ti/clkctrl.c | 8 ++++---- include/linux/clk/ti.h | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c index a914df2e9e1b..d904a9a7626a 100644 --- a/drivers/clk/ti/clkctrl.c +++ b/drivers/clk/ti/clkctrl.c @@ -24,7 +24,7 @@ #include #include "clock.h" -#define NO_IDLEST 0x1 +#define NO_IDLEST 0 #define OMAP4_MODULEMODE_MASK 0x3 @@ -158,7 +158,7 @@ static int _omap4_clkctrl_clk_enable(struct clk_hw *hw) ti_clk_ll_ops->clk_writel(val, &clk->enable_reg); - if (clk->flags & NO_IDLEST) + if (test_bit(NO_IDLEST, &clk->flags)) return 0; /* Wait until module is enabled */ @@ -187,7 +187,7 @@ static void _omap4_clkctrl_clk_disable(struct clk_hw *hw) ti_clk_ll_ops->clk_writel(val, &clk->enable_reg); - if (clk->flags & NO_IDLEST) + if (test_bit(NO_IDLEST, &clk->flags)) goto exit; /* Wait until module is disabled */ @@ -596,7 +596,7 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node) if (reg_data->flags & CLKF_HW_SUP) hw->enable_bit = MODULEMODE_HWCTRL; if (reg_data->flags & CLKF_NO_IDLEST) - hw->flags |= NO_IDLEST; + set_bit(NO_IDLEST, &hw->flags); if (reg_data->clkdm_name) hw->clkdm_name = reg_data->clkdm_name; diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index 1e8ef96555ce..bb2c5af9082a 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -153,7 +153,7 @@ struct clk_hw_omap { u8 fixed_div; struct clk_omap_reg enable_reg; u8 enable_bit; - u8 flags; + unsigned long flags; struct clk_omap_reg clksel_reg; struct dpll_data *dpll_data; const char *clkdm_name; From patchwork Wed Aug 28 06:59:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 172323 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp347065ily; Tue, 27 Aug 2019 23:59:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqwqHqVrgOa6dV2D/jQS3OmCQ8t3pVRGMPB7tLWOd9+zEpBtLwsViEoCiIzr/GEy2JzM/0/M X-Received: by 2002:aa7:8a98:: with SMTP id a24mr47936pfc.101.1566975586244; Tue, 27 Aug 2019 23:59:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566975586; cv=none; d=google.com; s=arc-20160816; b=PU9S8+DocAy3TePLmlvTaB8vn2IcbVxGdUO301pRdK6ooOE8bRld/mh7bnQue9Fu64 2rZopFNAKBZHEn+CGg0P9NAxomlILPm3q3UbecpMPvFpGlytw0eQgC8LSBKx0laqk5g0 jXVPiM1O47GN/vW6y+w57Z7wwLmfP4ifxoEdU+nrMzEFodCDkQJyuBzJsChnurBHX2gI a7Q2BeQqfIcn4pmugDhEZofVIzcFnTu7s3ac/1USdNrjztOf4IEHDdcxqyRlX3JZcfsr MO7ekBOb9563wW/sUJzbXvwNpvW2VBJYvn0gBbzitdqcJ/eDbhm8doZGOFV5I8EGsDuW ByKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=+qrcnaR3a/pZ4OviE1ZKc8IWLJlt6Yebqe6i5IEbb64=; b=PBtJD9b29IROBQCxCsSs7yDATTiVV9vJP2ujw4LNEfjZZ6gdgs9vCtYfKXQlA13v8X MTygFywylj1BI2EkRWkfa4zI6L4e7EyVJifRQprPTprXKXZtUITMYBbdBd0vZufmIkJi bj4e8kkY+ujeZ+IQ61B081O5O7+tkurLrQZ465umYIddRIEworwgdLsSH+A/m+hPQqe1 GDL4Hqayl0VrMFT/fKROWhLk6TptYo3wwnuvUkG/aeuVRfd71vnYXGzBAoKvTqcA5XlQ HpzlvPbGyyo0g5AtvlCMNkCOos1GKaBZkuVS2lXqJmKRRzDpRNMzSAghjifcC7Zi/bT/ NJow== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aiKB1b+h; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d3si1739135pfq.7.2019.08.27.23.59.46; Tue, 27 Aug 2019 23:59:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aiKB1b+h; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726583AbfH1G7p (ORCPT + 5 others); Wed, 28 Aug 2019 02:59:45 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:58044 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726340AbfH1G7p (ORCPT ); Wed, 28 Aug 2019 02:59:45 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xgRN120632; Wed, 28 Aug 2019 01:59:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1566975582; bh=+qrcnaR3a/pZ4OviE1ZKc8IWLJlt6Yebqe6i5IEbb64=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aiKB1b+hoLadlo/Pbo47IaGcDNhCLTUj+VEmgIzMSnjuOXWKixxAa+sFlElu5LM4y +ElQHLaAaPyNUPSHIFm088xr3aCa1aItjDfIfjP7R8GUjLKJAqKr7517G4fmYtgrBP 43MkSf0QTnTzJ/vaK6sN8xCkOobiz+piraLdytQg= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x7S6xg2J056136 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Aug 2019 01:59:42 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 28 Aug 2019 01:59:41 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 28 Aug 2019 01:59:40 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xXVD074399; Wed, 28 Aug 2019 01:59:39 -0500 From: Tero Kristo To: , , CC: , , Subject: [PATCHv2 3/6] clk: ti: clkctrl: add new exported API for checking standby info Date: Wed, 28 Aug 2019 09:59:26 +0300 Message-ID: <20190828065929.32150-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190828065929.32150-1-t-kristo@ti.com> References: <20190828065929.32150-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Standby status is provided for certain clkctrl clocks to see if the given module has entered standby or not. This is mostly needed by remoteproc code to see if the remoteproc has entered standby and the clock can be turned off safely. Signed-off-by: Tero Kristo --- drivers/clk/ti/clkctrl.c | 33 +++++++++++++++++++++++++++++++++ include/linux/clk/ti.h | 1 + 2 files changed, 34 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c index d904a9a7626a..e3e0a66a6ce2 100644 --- a/drivers/clk/ti/clkctrl.c +++ b/drivers/clk/ti/clkctrl.c @@ -34,6 +34,9 @@ #define OMAP4_IDLEST_MASK (0x3 << 16) #define OMAP4_IDLEST_SHIFT 16 +#define OMAP4_STBYST_MASK BIT(18) +#define OMAP4_STBYST_SHIFT 18 + #define CLKCTRL_IDLEST_FUNCTIONAL 0x0 #define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 #define CLKCTRL_IDLEST_DISABLED 0x3 @@ -647,3 +650,33 @@ static void __init _ti_omap4_clkctrl_setup(struct device_node *node) } CLK_OF_DECLARE(ti_omap4_clkctrl_clock, "ti,clkctrl", _ti_omap4_clkctrl_setup); + +/** + * ti_clk_is_in_standby - Check if clkctrl clock is in standby or not + * @clk: clock to check standby status for + * + * Finds whether the provided clock is in standby mode or not. Returns + * true if the provided clock is a clkctrl type clock and it is in standby, + * false otherwise. + */ +u32 ti_clk_is_in_standby(struct clk *clk) +{ + struct clk_hw *hw; + struct clk_hw_omap *hwclk; + u32 val; + + hw = __clk_get_hw(clk); + + if (!omap2_clk_is_hw_omap(hw)) + return false; + + hwclk = to_clk_hw_omap(hw); + + val = ti_clk_ll_ops->clk_readl(&hwclk->enable_reg); + + if (val & OMAP4_STBYST_MASK) + return true; + + return false; +} +EXPORT_SYMBOL_GPL(ti_clk_is_in_standby); diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index bb2c5af9082a..3fb777f7103a 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -298,6 +298,7 @@ struct ti_clk_features { void ti_clk_setup_features(struct ti_clk_features *features); const struct ti_clk_features *ti_clk_get_features(void); +u32 ti_clk_is_in_standby(struct clk *clk); int omap3_noncore_dpll_save_context(struct clk_hw *hw); void omap3_noncore_dpll_restore_context(struct clk_hw *hw); From patchwork Wed Aug 28 06:59:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 172325 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp347126ily; Tue, 27 Aug 2019 23:59:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqwZh8bihaYtIkSaafplewjw67l0dpvcCRQrY0Zyr31JVzrtIYkJHwE7xWyE1qT+sLhg1mkF X-Received: by 2002:aa7:9682:: with SMTP id f2mr2900092pfk.256.1566975589927; Tue, 27 Aug 2019 23:59:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566975589; cv=none; d=google.com; s=arc-20160816; b=TBOmOMuzNa1CWqwXq36D6zLsiwhej0sa3rs5TtPiU7+OpWD2xdvxdFcblRzGYbEORN Tz18/w45UZ6S7hLYG6rYKf5ThbWodbnFuB6smFqEhVPeJhxp3GJcVohcJ/nEWIG2UGmp 7boqYvtM4JonUSxRgVXY6lmukgj/wts0lLDr6Wcu+n77erf+XQkEhUmToRAMUiaOZ7uI u7Ts1ppvsSDd6Qr5rr+JUmRIP9Susd7hQkf5GpokIzyGqAEBYAp5sQx6cGwsqiCsF9Ja bF0hGJnostWNXsllwnjrBHCsq9jY839eN9liSm2a4MgNzeYY9U5DMJ/83fE+HIxYwECm /Xhw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=qDyLnl7yPSergL60Z2V5myEyuBh2Q6HeNjKi9knaQGM=; b=U5WQ1qgVNCncttaqhivo8E4Cs1/z/qH/ihTLDuoMKUWkJiJWNGSxrxiCY+ldIspOhz I7/2+ZPvZR8Qt8k8TL70q+xdgDr5wo5p7/blHBwFGdjrNAZEtIcboFC5oS9ClEPOCScK oW9W3ekj2T2fgiyNM28zRmueyxfQzldytbnVwGSiHWeaEmRCSZp1s9OmGgufChOnt4BA rbHXC7rFqt7ZLb3PXF2HNIdVsT10zvX37JPJNkyW3jH+/T8y3S3beIbhwmEgAv3Qakzu mtPwIuAUDlpqaWa5PYZmOxeVNqRjZ6GSkVeNFgCuBnjwBZ+ung9q0MK+bQ77L92Cxalh tcCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=l2SiluSj; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d3si1739135pfq.7.2019.08.27.23.59.49; Tue, 27 Aug 2019 23:59:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=l2SiluSj; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726591AbfH1G7t (ORCPT + 5 others); Wed, 28 Aug 2019 02:59:49 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49218 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726340AbfH1G7t (ORCPT ); Wed, 28 Aug 2019 02:59:49 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xh44106188; Wed, 28 Aug 2019 01:59:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1566975583; bh=qDyLnl7yPSergL60Z2V5myEyuBh2Q6HeNjKi9knaQGM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=l2SiluSjGWCeE14lKpeZkuEZ00I7d2jP6a7wuAzALzf+nrn9F+/7u0ibcI7fq+R+d dX2kNHYwD60fUP7kXtm94Ow4+4/rI150z33+41gt11LSoxSwk5NtN+k55RAR/LA1wD u3a9n9QFQk6SDWQH1DpMfey6ZOKgTG6X1Ce+VY7E= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x7S6xh5G057525 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Aug 2019 01:59:43 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 28 Aug 2019 01:59:42 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 28 Aug 2019 01:59:42 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xXVE074399; Wed, 28 Aug 2019 01:59:41 -0500 From: Tero Kristo To: , , CC: , , Subject: [PATCHv2 4/6] clk: ti: clkctrl: add API to notify reset status Date: Wed, 28 Aug 2019 09:59:27 +0300 Message-ID: <20190828065929.32150-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190828065929.32150-1-t-kristo@ti.com> References: <20190828065929.32150-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org When an IP has both a clkctrl clock being fed into it and has hardware reset lines, the control for these must be synced against each other. While disabling a clock, all the hardware reset lines must be asserted at the same time, and while enabling, resets must be deasserted. Otherwise, the IP module fails to transition from to idle/active. To handle this situation properly, a callback is added for clkctrl clocks which is used by the PRM reset driver to tell the status of the reset lines. This info is then used to sync state. Signed-off-by: Tero Kristo --- drivers/clk/ti/clkctrl.c | 44 ++++++++++++++++++++++++++++++++++++++++ include/linux/clk/ti.h | 1 + 2 files changed, 45 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clkctrl.c b/drivers/clk/ti/clkctrl.c index e3e0a66a6ce2..47a0d1398c6f 100644 --- a/drivers/clk/ti/clkctrl.c +++ b/drivers/clk/ti/clkctrl.c @@ -25,6 +25,8 @@ #include "clock.h" #define NO_IDLEST 0 +#define HAS_RESET 1 +#define RESET_ASSERTED 2 #define OMAP4_MODULEMODE_MASK 0x3 @@ -164,6 +166,9 @@ static int _omap4_clkctrl_clk_enable(struct clk_hw *hw) if (test_bit(NO_IDLEST, &clk->flags)) return 0; + if (test_bit(RESET_ASSERTED, &clk->flags)) + return 0; + /* Wait until module is enabled */ while (!_omap4_is_ready(ti_clk_ll_ops->clk_readl(&clk->enable_reg))) { if (_omap4_is_timeout(&timeout, OMAP4_MAX_MODULE_READY_TIME)) { @@ -193,6 +198,10 @@ static void _omap4_clkctrl_clk_disable(struct clk_hw *hw) if (test_bit(NO_IDLEST, &clk->flags)) goto exit; + if (test_bit(HAS_RESET, &clk->flags) && + !test_bit(RESET_ASSERTED, &clk->flags)) + goto exit; + /* Wait until module is disabled */ while (!_omap4_is_idle(ti_clk_ll_ops->clk_readl(&clk->enable_reg))) { if (_omap4_is_timeout(&timeout, @@ -680,3 +689,38 @@ u32 ti_clk_is_in_standby(struct clk *clk) return false; } EXPORT_SYMBOL_GPL(ti_clk_is_in_standby); + +/** + * ti_clk_notify_resets - Notify the clock driver associated reset status + * @clk: clock to notify reset status for + * @asserted: true if all HW reset lines are asserted + * + * Some clkctrl clocks have associated resets for them which effectively + * prevent the clock to transition from/to idle if the reset state is not + * in sync. For the clock to transition to idle properly, all associated + * resets must be asserted, and to leave idle, vice versa. To provide the + * current reset status, the reset driver should issue this callback. + */ +void ti_clk_notify_resets(struct clk *clk, bool asserted) +{ + struct clk_hw *hw; + struct clk_hw_omap *hwclk; + + if (!clk) + return; + + hw = __clk_get_hw(clk); + + if (!omap2_clk_is_hw_omap(hw)) + return; + + hwclk = to_clk_hw_omap(hw); + + set_bit(HAS_RESET, &hwclk->flags); + + if (asserted) + set_bit(RESET_ASSERTED, &hwclk->flags); + else + clear_bit(RESET_ASSERTED, &hwclk->flags); +} +EXPORT_SYMBOL_GPL(ti_clk_notify_resets); diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index 3fb777f7103a..ae34e3f5cf7a 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -299,6 +299,7 @@ struct ti_clk_features { void ti_clk_setup_features(struct ti_clk_features *features); const struct ti_clk_features *ti_clk_get_features(void); u32 ti_clk_is_in_standby(struct clk *clk); +void ti_clk_notify_resets(struct clk *clk, bool asserted); int omap3_noncore_dpll_save_context(struct clk_hw *hw); void omap3_noncore_dpll_restore_context(struct clk_hw *hw); From patchwork Wed Aug 28 06:59:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 172324 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp347091ily; Tue, 27 Aug 2019 23:59:48 -0700 (PDT) X-Google-Smtp-Source: APXvYqzKFJm1vp3uPtZcwMCcCkOMrOvDi2I4LIhBLpCbO0QxwX2072aEOHRc29nkrDjG48TjUbT1 X-Received: by 2002:a63:1b66:: with SMTP id b38mr2195264pgm.54.1566975588385; Tue, 27 Aug 2019 23:59:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566975588; cv=none; d=google.com; s=arc-20160816; b=x85MapUlxibdkdRUh7qe1MPOZsJIG4LNQUwG9XmgMRHMkJWQX15v1rlKPmsoQkUjLp GsUmMvxoMkW1M9J9uxoWCaTH2LBh4eYt1ev6P/jgap/3RPM59IdIPDVe2eq6su+2GErX LQB9Ef0EptOptxX2AR/ZWEfEFgoK2MirgWniH+vtgEyD19X8r81CQsv1i5mhwNPH+bqG RAFo+Lbxig+GcGLdmmjbSobG+4IWpJhgOorKJWqkElq1zHIS2ODdmYKHSpVNrx/VlcFu 79AR4Km3qM5CQH0TdJ7ok8kSSSAOi0X4ZvSZGYitkCSAkZa7YS+rIBQE03jUAfPIK29u TMrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=lAooCRUVMyzHhADwC9qZkva36ihXtVfNEPnWC8n4rlE=; b=cgb1z2CNrHdT60Im21hlQat46pYZcOqorzbCCbqgmMpYoLG4CSmrUcPVUHVoV5MDSv fdsDN0Eof44kKnAWDku/KMfNQNQwp6qU/KocgoH9m6wyd4aqbr7vTw3xxaxpulNWTbRd skU76ECiYzaJkEzNXqNGUiHEJur9No1ViE24oARi0XSpqWk4Z1bb1LskiKfa4VVQYxok gv2nnxCeAYHwZBSlsrz1o+kME5dYbpXH+6xz/fBHnAw06kY1H/tGX8BuSbQ/07JJon8h Y8Ux4CJjHSbpgRF7eIqduzND35UkIp0sK/6SBgXEpMnSg0BCLdkpX9muc2phXU1/qUvP P8zQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=e5olAih1; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d3si1739135pfq.7.2019.08.27.23.59.48; Tue, 27 Aug 2019 23:59:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=e5olAih1; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726446AbfH1G7r (ORCPT + 5 others); Wed, 28 Aug 2019 02:59:47 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:58060 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726340AbfH1G7r (ORCPT ); Wed, 28 Aug 2019 02:59:47 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xjQi120643; Wed, 28 Aug 2019 01:59:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1566975585; bh=lAooCRUVMyzHhADwC9qZkva36ihXtVfNEPnWC8n4rlE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=e5olAih1m1iQQE+2h+LNUNaAgqigAaR3xF01rYn6Ydqvm9rDs7pLgENyculJOhx31 A0J+o+zvCNSm18rg/TM+Av0/xkvyVuBiEeZL8SPUyEfAWZ9mO7+M/KEUrPuDB5y6c3 5mhwH+lGTEZJRycz27ec7sYYB6R7AcGGfn3CMq0g= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x7S6xiJm129571 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Aug 2019 01:59:45 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 28 Aug 2019 01:59:44 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 28 Aug 2019 01:59:44 -0500 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x7S6xXVF074399; Wed, 28 Aug 2019 01:59:43 -0500 From: Tero Kristo To: , , CC: , , Subject: [PATCHv2 5/6] dt-bindings: clk: add omap5 iva clkctrl definitions Date: Wed, 28 Aug 2019 09:59:28 +0300 Message-ID: <20190828065929.32150-6-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190828065929.32150-1-t-kristo@ti.com> References: <20190828065929.32150-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org OMAP5 device contains an IVA subsystem (Image and Video Accelerator.) IVA subsystem clkctrl definitions are currently missing, so add them. Signed-off-by: Tero Kristo --- include/dt-bindings/clock/omap5.h | 4 ++++ 1 file changed, 4 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/include/dt-bindings/clock/omap5.h b/include/dt-bindings/clock/omap5.h index f3283957f48d..eb6d2fbe78f9 100644 --- a/include/dt-bindings/clock/omap5.h +++ b/include/dt-bindings/clock/omap5.h @@ -86,6 +86,10 @@ #define OMAP5_UART5_CLKCTRL OMAP5_CLKCTRL_INDEX(0x170) #define OMAP5_UART6_CLKCTRL OMAP5_CLKCTRL_INDEX(0x178) +/* iva clocks */ +#define OMAP5_IVA_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) +#define OMAP5_SL2IF_CLKCTRL OMAP5_CLKCTRL_INDEX(0x28) + /* dss clocks */ #define OMAP5_DSS_CORE_CLKCTRL OMAP5_CLKCTRL_INDEX(0x20) From patchwork Wed Aug 28 06:59:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 172326 Delivered-To: patch@linaro.org Received: by 2002:a92:d204:0:0:0:0:0 with SMTP id y4csp347132ily; Tue, 27 Aug 2019 23:59:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqxBfMYpg//7DyfxSSwxIguXC0Js8PiWCX3d7uUKf8qa5nQjcrrh/EZ/rJ9moNYFUVKTYfmI X-Received: by 2002:a17:902:248:: with SMTP id 66mr2843190plc.19.1566975590182; Tue, 27 Aug 2019 23:59:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566975590; cv=none; d=google.com; s=arc-20160816; b=IX7sTBMWpJrBwIkeZse4vjNC7v8Ep3AkkQ2ifGz8T9wbRupJOKI9cI/QgVZZqM7kkv XgPMU94wW92GECmduD9nYLUcJyiN93ZK/+l+SbbyvtNhFEr2Fyv/xxW38sL4s2Mkw/jo ewBjvfflcy8/j5/QuNZwQ8CudFuYSuNtP8l6ArxPi6d36LanTmwsa81ZG1t9mBN3QUZU DroLQwnTF8ky2o7ZLI0Hxx48EDqzBTRpTs/HQMUSWLHUZsYYUfWKRCVEPIjzEaDdFVsF vQfc7RSv+WHlsM9McRYwR/WCnBPndl/RP2npdxWMRdslCmw3pJgUtSsxghXtuVBEmUEx T1Hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=+wJjCWfQrTgNasnwgKOhFijISSbGmcAqlzAKHLVv0jA=; b=O5Ik3m5cTt+vw3ZJas+ERdA+93YFgx0RSIyh2kePWPobDdYOgHsvO/DOcJ7yWWKFOp JvII5oIAhKBW0mb1H8d8XxdhyPvw61Qlqvm/+tklkb0sgzebXM9JQGGgzD2+/07UQ0Ke E3uMTPV1E6UT3clS+RhOaCFbEDFdrfPvR+bgoB+BP9T0tR/818tlqztFpqk9++Q6jh4G 1wiUWQ0RVkk6I7c1bY9/GGUBeQEkGyqA6lJKl9wt1PnaruGAm/xXrqKKjgqdfF/JNhnq K7PIIqO+7a9tNb3ocucgUNQeydybFsykY5KCLEo/RqlkpfW7Nya8ihMBDwUPRk0PzEdn gTkw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=h+koDJRC; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Tero Kristo --- drivers/clk/ti/clk-54xx.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.17.1 -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c index dafef7e70ba8..f63871dac600 100644 --- a/drivers/clk/ti/clk-54xx.c +++ b/drivers/clk/ti/clk-54xx.c @@ -286,6 +286,12 @@ static const struct omap_clkctrl_reg_data omap5_l4per_clkctrl_regs[] __initconst { 0 }, }; +static const struct omap_clkctrl_reg_data omap5_iva_clkctrl_regs[] __initconst = { + { OMAP5_IVA_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_h12x2_ck" }, + { OMAP5_SL2IF_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_h12x2_ck" }, + { 0 }, +}; + static const char * const omap5_dss_dss_clk_parents[] __initconst = { "dpll_per_h12x2_ck", NULL, @@ -469,6 +475,7 @@ const struct omap_clkctrl_data omap5_clkctrl_data[] __initconst = { { 0x4a008d20, omap5_l4cfg_clkctrl_regs }, { 0x4a008e20, omap5_l3instr_clkctrl_regs }, { 0x4a009020, omap5_l4per_clkctrl_regs }, + { 0x4a009220, omap5_iva_clkctrl_regs }, { 0x4a009420, omap5_dss_clkctrl_regs }, { 0x4a009620, omap5_l3init_clkctrl_regs }, { 0x4ae07920, omap5_wkupaon_clkctrl_regs },