From patchwork Thu Jan 4 02:42:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenhua Lin X-Patchwork-Id: 760574 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C56C64C7D for ; Thu, 4 Jan 2024 02:43:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=unisoc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=unisoc.com Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 4042h8JW001784; Thu, 4 Jan 2024 10:43:08 +0800 (+08) (envelope-from Wenhua.Lin@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx06.spreadtrum.com [10.0.1.11]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4T59h7758Yz2Qby50; Thu, 4 Jan 2024 10:36:23 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx06.spreadtrum.com (10.0.1.11) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Thu, 4 Jan 2024 10:43:06 +0800 From: Wenhua Lin To: Linus Walleij , Andy Shevchenko , Bartosz Golaszewski CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , wenhua lin , Wenhua Lin , Xiongpeng Wu Subject: [PATCH V3 1/4] gpio: eic-sprd: Keep the clock rtc_1k on Date: Thu, 4 Jan 2024 10:42:41 +0800 Message-ID: <20240104024244.12163-2-Wenhua.Lin@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240104024244.12163-1-Wenhua.Lin@unisoc.com> References: <20240104024244.12163-1-Wenhua.Lin@unisoc.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To shmbx06.spreadtrum.com (10.0.1.11) X-MAIL: SHSQR01.spreadtrum.com 4042h8JW001784 The eic debounce does not have a clock of rtc_1k in the sleep state, but the eic debounce will be used to wake up the system, therefore the clock of rtc_1k needs to be kept open. Signed-off-by: Wenhua Lin --- drivers/gpio/gpio-eic-sprd.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c index be7f2fa5aa7b..bdcb3510a208 100644 --- a/drivers/gpio/gpio-eic-sprd.c +++ b/drivers/gpio/gpio-eic-sprd.c @@ -24,6 +24,7 @@ #define SPRD_EIC_DBNC_IC 0x24 #define SPRD_EIC_DBNC_TRIG 0x28 #define SPRD_EIC_DBNC_CTRL0 0x40 +#define SPRD_EIC_DBNC_FORCE_CLK 0x8000 #define SPRD_EIC_LATCH_INTEN 0x0 #define SPRD_EIC_LATCH_INTRAW 0x4 @@ -223,6 +224,7 @@ static int sprd_eic_set_debounce(struct gpio_chip *chip, unsigned int offset, u32 value = readl_relaxed(base + reg) & ~SPRD_EIC_DBNC_MASK; value |= (debounce / 1000) & SPRD_EIC_DBNC_MASK; + value |= SPRD_EIC_DBNC_FORCE_CLK; writel_relaxed(value, base + reg); return 0; From patchwork Thu Jan 4 02:42:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenhua Lin X-Patchwork-Id: 760063 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F1432103 for ; Thu, 4 Jan 2024 02:43:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=unisoc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=unisoc.com Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 4042h96C001861; Thu, 4 Jan 2024 10:43:09 +0800 (+08) (envelope-from Wenhua.Lin@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx06.spreadtrum.com [10.0.1.11]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4T59h866YQz2Qby5B; Thu, 4 Jan 2024 10:36:24 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx06.spreadtrum.com (10.0.1.11) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Thu, 4 Jan 2024 10:43:07 +0800 From: Wenhua Lin To: Linus Walleij , Andy Shevchenko , Bartosz Golaszewski CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , wenhua lin , Wenhua Lin , Xiongpeng Wu Subject: [PATCH V3 2/4] gpio: eic-sprd: Clear interrupt after set the interrupt type Date: Thu, 4 Jan 2024 10:42:42 +0800 Message-ID: <20240104024244.12163-3-Wenhua.Lin@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240104024244.12163-1-Wenhua.Lin@unisoc.com> References: <20240104024244.12163-1-Wenhua.Lin@unisoc.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To shmbx06.spreadtrum.com (10.0.1.11) X-MAIL: SHSQR01.spreadtrum.com 4042h96C001861 The initialization state of the eic module is a high level trigger. If it is currently a high level, the interrupt condition is met at this time, and the eic interrupt has a latch capability, which will cause an interrupt to occur after booting. To avoid this, When setting the eic interrupt trigger type, clear the interrupt once. Signed-off-by: Wenhua Lin --- drivers/gpio/gpio-eic-sprd.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c index bdcb3510a208..e492157e5154 100644 --- a/drivers/gpio/gpio-eic-sprd.c +++ b/drivers/gpio/gpio-eic-sprd.c @@ -384,29 +384,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1); + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); irq_set_handler_locked(data, handle_edge_irq); break; case IRQ_TYPE_EDGE_FALLING: sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0); + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); irq_set_handler_locked(data, handle_edge_irq); break; case IRQ_TYPE_EDGE_BOTH: sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1); + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); irq_set_handler_locked(data, handle_edge_irq); break; case IRQ_TYPE_LEVEL_HIGH: sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1); + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); irq_set_handler_locked(data, handle_level_irq); break; case IRQ_TYPE_LEVEL_LOW: sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1); sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0); + sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1); irq_set_handler_locked(data, handle_level_irq); break; default: @@ -419,29 +424,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type) sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1); + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); irq_set_handler_locked(data, handle_edge_irq); break; case IRQ_TYPE_EDGE_FALLING: sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0); + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); irq_set_handler_locked(data, handle_edge_irq); break; case IRQ_TYPE_EDGE_BOTH: sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1); + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); irq_set_handler_locked(data, handle_edge_irq); break; case IRQ_TYPE_LEVEL_HIGH: sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1); + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); irq_set_handler_locked(data, handle_level_irq); break; case IRQ_TYPE_LEVEL_LOW: sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1); sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0); + sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1); irq_set_handler_locked(data, handle_level_irq); break; default: From patchwork Thu Jan 4 02:42:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenhua Lin X-Patchwork-Id: 760573 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A43B8185B for ; Thu, 4 Jan 2024 02:43:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=unisoc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=unisoc.com Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 4042h9eS001917; Thu, 4 Jan 2024 10:43:09 +0800 (+08) (envelope-from Wenhua.Lin@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx06.spreadtrum.com [10.0.1.11]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4T59h94VLzz2Qby50; Thu, 4 Jan 2024 10:36:25 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx06.spreadtrum.com (10.0.1.11) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Thu, 4 Jan 2024 10:43:07 +0800 From: Wenhua Lin To: Linus Walleij , Andy Shevchenko , Bartosz Golaszewski CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , wenhua lin , Wenhua Lin , Xiongpeng Wu Subject: [PATCH V3 3/4] gpio: eic-sprd: Modify the calculation method of eic number Date: Thu, 4 Jan 2024 10:42:43 +0800 Message-ID: <20240104024244.12163-4-Wenhua.Lin@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240104024244.12163-1-Wenhua.Lin@unisoc.com> References: <20240104024244.12163-1-Wenhua.Lin@unisoc.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To shmbx06.spreadtrum.com (10.0.1.11) X-MAIL: SHSQR01.spreadtrum.com 4042h9eS001917 When the soc changes, the corresponding gpio-eic-sprd.c code needs to be modified, and the corresponding Document must also be modified, which is quite troublesome. To avoid modifying the driver file, the number of eics is automatically calculated by matching dts nodes. Signed-off-by: Wenhua Lin --- drivers/gpio/gpio-eic-sprd.c | 45 ++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c index e492157e5154..1ca3c444957c 100644 --- a/drivers/gpio/gpio-eic-sprd.c +++ b/drivers/gpio/gpio-eic-sprd.c @@ -109,34 +109,32 @@ static struct sprd_eic *to_sprd_eic(struct notifier_block *nb) struct sprd_eic_variant_data { enum sprd_eic_type type; - u32 num_eics; }; +#define SPRD_EIC_VAR_DATA(soc_name) \ +static const struct sprd_eic_variant_data soc_name##_eic_dbnc_data = { \ + .type = SPRD_EIC_DEBOUNCE, \ +}; \ + \ +static const struct sprd_eic_variant_data soc_name##_eic_latch_data = { \ + .type = SPRD_EIC_LATCH, \ +}; \ + \ +static const struct sprd_eic_variant_data soc_name##_eic_async_data = { \ + .type = SPRD_EIC_ASYNC, \ +}; \ + \ +static const struct sprd_eic_variant_data soc_name##_eic_sync_data = { \ + .type = SPRD_EIC_SYNC, \ +} + +SPRD_EIC_VAR_DATA(sc9860); + static const char *sprd_eic_label_name[SPRD_EIC_MAX] = { "eic-debounce", "eic-latch", "eic-async", "eic-sync", }; -static const struct sprd_eic_variant_data sc9860_eic_dbnc_data = { - .type = SPRD_EIC_DEBOUNCE, - .num_eics = 8, -}; - -static const struct sprd_eic_variant_data sc9860_eic_latch_data = { - .type = SPRD_EIC_LATCH, - .num_eics = 8, -}; - -static const struct sprd_eic_variant_data sc9860_eic_async_data = { - .type = SPRD_EIC_ASYNC, - .num_eics = 8, -}; - -static const struct sprd_eic_variant_data sc9860_eic_sync_data = { - .type = SPRD_EIC_SYNC, - .num_eics = 8, -}; - static inline void __iomem *sprd_eic_offset_base(struct sprd_eic *sprd_eic, unsigned int bank) { @@ -607,6 +605,7 @@ static int sprd_eic_probe(struct platform_device *pdev) struct gpio_irq_chip *irq; struct sprd_eic *sprd_eic; struct resource *res; + u16 num_banks = 0; int ret, i; pdata = of_device_get_match_data(dev); @@ -640,10 +639,12 @@ static int sprd_eic_probe(struct platform_device *pdev) sprd_eic->base[i] = devm_ioremap_resource(dev, res); if (IS_ERR(sprd_eic->base[i])) return PTR_ERR(sprd_eic->base[i]); + + num_banks++; } sprd_eic->chip.label = sprd_eic_label_name[sprd_eic->type]; - sprd_eic->chip.ngpio = pdata->num_eics; + sprd_eic->chip.ngpio = num_banks * SPRD_EIC_PER_BANK_NR; sprd_eic->chip.base = -1; sprd_eic->chip.parent = dev; sprd_eic->chip.direction_input = sprd_eic_direction_input; From patchwork Thu Jan 4 02:42:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenhua Lin X-Patchwork-Id: 760062 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F880185B for ; Thu, 4 Jan 2024 02:43:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=unisoc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=unisoc.com Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 4042hAVP001950; Thu, 4 Jan 2024 10:43:10 +0800 (+08) (envelope-from Wenhua.Lin@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx06.spreadtrum.com [10.0.1.11]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4T59hB2vDtz2Qby5B; Thu, 4 Jan 2024 10:36:26 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx06.spreadtrum.com (10.0.1.11) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Thu, 4 Jan 2024 10:43:08 +0800 From: Wenhua Lin To: Linus Walleij , Andy Shevchenko , Bartosz Golaszewski CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , wenhua lin , Wenhua Lin , Xiongpeng Wu Subject: [PATCH V3 4/4] gpio: eic-sprd: Support 8 banks EIC controller Date: Thu, 4 Jan 2024 10:42:44 +0800 Message-ID: <20240104024244.12163-5-Wenhua.Lin@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240104024244.12163-1-Wenhua.Lin@unisoc.com> References: <20240104024244.12163-1-Wenhua.Lin@unisoc.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To shmbx06.spreadtrum.com (10.0.1.11) X-MAIL: SHSQR01.spreadtrum.com 4042hAVP001950 In order to solve the problem of insufficient eic, it supports 8 banks of eic controller, each bank contains 8 eic. Signed-off-by: Wenhua Lin --- drivers/gpio/gpio-eic-sprd.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c index 1ca3c444957c..715c7d581d7f 100644 --- a/drivers/gpio/gpio-eic-sprd.c +++ b/drivers/gpio/gpio-eic-sprd.c @@ -52,10 +52,10 @@ #define SPRD_EIC_SYNC_DATA 0x1c /* - * The digital-chip EIC controller can support maximum 3 banks, and each bank + * The digital-chip EIC controller can support maximum 8 banks, and each bank * contains 8 EICs. */ -#define SPRD_EIC_MAX_BANK 3 +#define SPRD_EIC_MAX_BANK 8 #define SPRD_EIC_PER_BANK_NR 8 #define SPRD_EIC_DATA_MASK GENMASK(7, 0) #define SPRD_EIC_BIT(x) ((x) & (SPRD_EIC_PER_BANK_NR - 1)) @@ -627,9 +627,9 @@ static int sprd_eic_probe(struct platform_device *pdev) for (i = 0; i < SPRD_EIC_MAX_BANK; i++) { /* - * We can have maximum 3 banks EICs, and each EIC has + * We can have maximum 8 banks EICs, and each EIC has * its own base address. But some platform maybe only - * have one bank EIC, thus base[1] and base[2] can be + * have one bank EIC, thus base[1] to base[7] can be * optional. */ res = platform_get_resource(pdev, IORESOURCE_MEM, i);