From patchwork Thu Jan 11 09:30:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 762732 Received: from mail-pj1-f48.google.com (mail-pj1-f48.google.com [209.85.216.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F2F912E6A for ; Thu, 11 Jan 2024 09:31:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="mFCO27Jq" Received: by mail-pj1-f48.google.com with SMTP id 98e67ed59e1d1-28bcc273833so4495972a91.1 for ; Thu, 11 Jan 2024 01:31:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1704965472; x=1705570272; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3co2sOHjGX4HJhNcpLPUh7fyfRHhZQUX9e33G8U5XOw=; b=mFCO27JqMW7qG7prHgGKDSJD9JAD2BLjWZzyChAaf6BY1Lj1bQJos0Qpy9QB5cLeNb JlqKP6vT9s2mOqrpRQPf8NbXVWytgMF0HOPJM4/wE2jhkMLomMk3GFMUJVstgt4N4Wl3 rWdsFpt2lWlUrtkfMtAjEaA7EMiOC8H8JEQgK6JsSDbqu/ca2gHQtvGzA2vK0PSzmlFu g4TKrW7tuQrYG079Ws4GRzSFV5Z9bjAEmTwHLBDktK7PfGDVHRTN3USO4H0hac0/f/X0 /r8JAJJgWeNXiSZRLVcKjNiSnfL2eFg4CPrcCoxqNys0KLeTjmAuRsS3MFaohK7UsCrG aNHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704965472; x=1705570272; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3co2sOHjGX4HJhNcpLPUh7fyfRHhZQUX9e33G8U5XOw=; b=LxY43Zuiec3OhIArVPJbCD2hgk2/maNicpOrlq520W0Mp3eKgR49G7iRMc6DO3nMWF b+Ghn8eLQbRnMIpBwFf3B9BsdnsEO+01PEXA/4jdlkqKyF/XfLp6q4IduHuQRsrSNi26 nALxy2o+wjtoo+G3hwWjoEzImQ5a7pYAGhuJoAiyyfYsLpMpqiUcJ7ube+hahDrrUXvT gFQEbTHX7/O2F/TesQgr6D5YPRSHia8Y16JzhBhV6KK2SbtOHYS9G/FOXewEJklRFzqO tvOozVnRBWN12/RvCK8Cy8C8bJ2FyUJiVSx4vwOkKu034pyPolxD1Ymmg9yJgkkk9BS8 YmrQ== X-Gm-Message-State: AOJu0Yx3U6h4jNKhz4HfEFr3vHayCehMRSrsStwwuOGQeSsuRmyatmfC +QUJI9k99w6aWzos68qyd5ckCz7wgSGGmpG0T1fF9V/4OWvFaA== X-Google-Smtp-Source: AGHT+IFssiCK0JYjvHueFW2PMxwnkSqT3RYbMAUksprK2TkSi5cy8rguDn4ZmzMpW2QBoaX72pMGgA== X-Received: by 2002:a17:90a:2e82:b0:28c:134d:fca1 with SMTP id r2-20020a17090a2e8200b0028c134dfca1mr786132pjd.16.1704965471988; Thu, 11 Jan 2024 01:31:11 -0800 (PST) Received: from sunil-laptop.. ([106.51.188.200]) by smtp.gmail.com with ESMTPSA id jd2-20020a170903260200b001d4a7cf0673sm730566plb.117.2024.01.11.01.31.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 01:31:11 -0800 (PST) From: Sunil V L To: linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org Cc: "Rafael J . Wysocki" , Len Brown , Anup Patel , Daniel Lezcano , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Andrew Jones , Atish Kumar Patra , Sunil V L Subject: [PATCH -next 1/2] ACPI: Enable ACPI_PROCESSOR for RISC-V Date: Thu, 11 Jan 2024 15:00:57 +0530 Message-Id: <20240111093058.121838-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240111093058.121838-1-sunilvl@ventanamicro.com> References: <20240111093058.121838-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The ACPI processor driver is not currently enabled for RISC-V. This is required to enable CPU related functionalities like LPI and CPPC. Hence, enable ACPI_PROCESSOR for RISC-V. Signed-off-by: Sunil V L --- drivers/acpi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index f819e760ff19..9a920752171c 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -282,7 +282,7 @@ config ACPI_CPPC_LIB config ACPI_PROCESSOR tristate "Processor" - depends on X86 || ARM64 || LOONGARCH + depends on X86 || ARM64 || LOONGARCH || RISCV select ACPI_PROCESSOR_IDLE select ACPI_CPU_FREQ_PSS if X86 || LOONGARCH select THERMAL From patchwork Thu Jan 11 09:30:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 761877 Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92A3F14A92 for ; Thu, 11 Jan 2024 09:31:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="aAhgOOjr" Received: by mail-pf1-f182.google.com with SMTP id d2e1a72fcca58-6d9b5c4f332so2967223b3a.3 for ; Thu, 11 Jan 2024 01:31:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1704965477; x=1705570277; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cUtZ/fl35OGrV0n4xrT7BhxLu5Q7HTfNcZ5vLHqEvsY=; b=aAhgOOjriQGmuzcaLibbZYF/b0kB2ZBDGRV4mR9LeIBAz8s51PwlgJF50yUhIXudLl Y43c9cI3Og7sdQ/hmDFoV2RDzcw/XfQMWsJhfMMKbkdA7D1S5HfdGI+dS98i+cpg8rfn FnME2T9wGG2g4qhaWz7MOSO3uKp/G26iAek3FvUj5GGqAo11UFehInxOgoLb4Ypc3MBq 0sJhgef9UnXBfDc4/9Je0klHvh0MUwOE+DxaiD+xbcVwnRWR5yY8bGJoM6kbw1gyGxaj uY9EZ0RI50vYjHGvLcjNmuq2v+5URsYtBfDFp/l7JdzR2sU02C1M88u2FaVvT24V5FCF lJkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704965477; x=1705570277; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cUtZ/fl35OGrV0n4xrT7BhxLu5Q7HTfNcZ5vLHqEvsY=; b=RiUsp6vudH4fuTuQvaeckvj+ZYghog3ouEJppjQECsYsiVTA4U9O1tDgBk+e9FwIuN F7KVXxqPpbbQRnsAWp9p5TkyqwH0Qw/8VIM+0cRo5mubjOyINkvORAYKCaldKytt1eK3 pxrhql4DKkZB8LASOXubim8pTXaLHAZxpB1YUgez4YcCQ5uZyRwAV1WIkZbeLpNcbGzR Z3etWVGjXSqC/WxflVUTbAblFeIxCgdThsYF2wADBrOeiSvGRoitiKr7OKHOKP7btiA3 0SUbqRgXuSWQV/IQbpUAAy1+2JjcPspD2xVb/Biv3AjSbsrcvXX287sOh5tN7CHjcvnK B7wg== X-Gm-Message-State: AOJu0Yw5l3fMy+N2jnHttxjpD5a25es+LQOgIKc2gzZBkS+99BQRhqMA fbWUQrrTaiVx1fICB0pdo35lDiOmyJRiEv1V3qmqYHJ6SaoMlg== X-Google-Smtp-Source: AGHT+IF4264zzKBNpeub4VH/x1A2zu/MAt7+saMEpmuhHRaKZH8w152mN6eN2xwM9KYg/qXnJMYHcw== X-Received: by 2002:a05:6a21:32aa:b0:19a:1719:8cd4 with SMTP id yt42-20020a056a2132aa00b0019a17198cd4mr595390pzb.107.1704965476861; Thu, 11 Jan 2024 01:31:16 -0800 (PST) Received: from sunil-laptop.. ([106.51.188.200]) by smtp.gmail.com with ESMTPSA id jd2-20020a170903260200b001d4a7cf0673sm730566plb.117.2024.01.11.01.31.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 01:31:16 -0800 (PST) From: Sunil V L To: linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org Cc: "Rafael J . Wysocki" , Len Brown , Anup Patel , Daniel Lezcano , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Andrew Jones , Atish Kumar Patra , Sunil V L Subject: [PATCH -next 2/2] cpuidle: RISC-V: Add ACPI LPI support Date: Thu, 11 Jan 2024 15:00:58 +0530 Message-Id: <20240111093058.121838-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240111093058.121838-1-sunilvl@ventanamicro.com> References: <20240111093058.121838-1-sunilvl@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add required callbacks to support Low Power Idle (LPI) on ACPI based RISC-V platforms. Signed-off-by: Sunil V L --- drivers/cpuidle/cpuidle-riscv-sbi.c | 78 +++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/drivers/cpuidle/cpuidle-riscv-sbi.c b/drivers/cpuidle/cpuidle-riscv-sbi.c index e8094fc92491..cea67a54ab39 100644 --- a/drivers/cpuidle/cpuidle-riscv-sbi.c +++ b/drivers/cpuidle/cpuidle-riscv-sbi.c @@ -632,3 +632,81 @@ static int __init sbi_cpuidle_init(void) return 0; } device_initcall(sbi_cpuidle_init); + +#ifdef CONFIG_ACPI_PROCESSOR_IDLE + +#include +#include + +#define RISCV_FFH_LPI_TYPE_MASK 0x1000000000000000ULL +#define RISCV_FFH_LPI_RSVD_MASK 0x0FFFFFFF00000000ULL + +static int acpi_cpu_init_idle(unsigned int cpu) +{ + int i; + struct acpi_lpi_state *lpi; + struct acpi_processor *pr = per_cpu(processors, cpu); + + if (unlikely(!pr || !pr->flags.has_lpi)) + return -EINVAL; + + /* + * The SBI HSM suspend function is only available when: + * 1) SBI version is 0.3 or higher + * 2) SBI HSM extension is available + */ + if (sbi_spec_version < sbi_mk_version(0, 3) || + !sbi_probe_extension(SBI_EXT_HSM)) { + pr_warn("HSM suspend not available\n"); + return -EINVAL; + } + + if (pr->power.count <= 1) + return -ENODEV; + + for (i = 1; i < pr->power.count; i++) { + u32 state; + + lpi = &pr->power.lpi_states[i]; + + /* Validate Entry Method as per FFH spec. + * bits[63:60] should be 0x1 + * bits[59:32] should be 0x0 + * bits[31:0] represent a SBI power_state + */ + if (!(lpi->address & RISCV_FFH_LPI_TYPE_MASK) || + (lpi->address & RISCV_FFH_LPI_RSVD_MASK)) { + pr_warn("Invalid LPI entry method %#llx\n", lpi->address); + return -EINVAL; + } + + state = lpi->address; + if (!sbi_suspend_state_is_valid(state)) { + pr_warn("Invalid SBI power state %#x\n", state); + return -EINVAL; + } + } + + return 0; +} + +int acpi_processor_ffh_lpi_probe(unsigned int cpu) +{ + return acpi_cpu_init_idle(cpu); +} + +int acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) +{ + u32 state = lpi->address; + + if (state & SBI_HSM_SUSP_NON_RET_BIT) + return CPU_PM_CPU_IDLE_ENTER_PARAM(sbi_suspend, + lpi->index, + state); + else + return CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM(sbi_suspend, + lpi->index, + state); +} + +#endif