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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id h16-20020adffd50000000b003372befd19bsm3948357wrs.104.2024.01.12.05.46.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Jan 2024 05:46:41 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= Subject: [PATCH] hw/pci-host/raven.c: Mark raven_io_ops as implementing unaligned accesses Date: Fri, 12 Jan 2024 13:46:40 +0000 Message-Id: <20240112134640.1775041-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The raven_io_ops MemoryRegionOps is the only one in the source tree which sets .valid.unaligned to indicate that it should support unaligned accesses and which does not also set .impl.unaligned to indicate that its read and write functions can do the unaligned handling themselves. This is a problem, because at the moment the core memory system does not implement the support for handling unaligned accesses by doing a series of aligned accesses and combining them (system/memory.c:access_with_adjusted_size() has a TODO comment noting this). Fortunately raven_io_read() and raven_io_write() will correctly deal with the case of being passed an unaligned address, so we can fix the missing unaligned access support by setting .impl.unaligned in the MemoryRegionOps struct. Fixes: 9a1839164c9c8f06 ("raven: Implement non-contiguous I/O region") Signed-off-by: Peter Maydell Tested-by: Cédric Le Goater Reviewed-by: Cédric Le Goater --- Spotted by code inspection: I was looking for devices whose behaviour might be changed by a patch I'm reviewing that adds that missing support for unaligned accesses in the core memory system. But even if we do implement it there, it's more efficient for the raven MR to correctly mark it as handling unaligned accesses itself. Tested with 'make check' and 'make check-avocado' only. --- hw/pci-host/raven.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c index c7a0a2878ab..a7dfddd69ea 100644 --- a/hw/pci-host/raven.c +++ b/hw/pci-host/raven.c @@ -200,6 +200,7 @@ static const MemoryRegionOps raven_io_ops = { .write = raven_io_write, .endianness = DEVICE_LITTLE_ENDIAN, .impl.max_access_size = 4, + .impl.unaligned = true, .valid.unaligned = true, };