From patchwork Tue Jan 16 13:41:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devarsh Thakkar X-Patchwork-Id: 763409 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 747C11BC4E; Tue, 16 Jan 2024 13:42:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="yFf62Bq6" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 40GDfkFN027729; Tue, 16 Jan 2024 07:41:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1705412506; bh=WCMncCjEepMlq1gpfShPVfJNFIGS/foDr0vBL+xIwmk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yFf62Bq6sAkzE99MAreaLVa3Qr+DvoixEYqFkgzXvB1zFYUXrLnO7GODXjtddaaQ+ DlTdDpjBN+y11Qx3vXDjX/Pi0ydPfYm4qws8Y2Cz5KOe4cKxjApX1dvSl6Uqi7Wh25 82n7IXpsrn6FqzixTXLK1l+0T1fhwLjCnfCxDygY= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 40GDfke9011388 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 16 Jan 2024 07:41:46 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 16 Jan 2024 07:41:46 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 16 Jan 2024 07:41:46 -0600 Received: from localhost (ti.dhcp.ti.com [172.24.227.95] (may be forged)) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 40GDfjx4093381; Tue, 16 Jan 2024 07:41:45 -0600 From: Devarsh Thakkar To: , , , , , , , , , , , , , , , , CC: , , , Subject: [RFC PATCH 1/3] dt-bindings: display: ti,am65x-dss: Add support for display sharing mode Date: Tue, 16 Jan 2024 19:11:40 +0530 Message-ID: <20240116134142.2092483-2-devarsht@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240116134142.2092483-1-devarsht@ti.com> References: <20240116134142.2092483-1-devarsht@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Add support for using TI Keystone DSS hardware present in display sharing mode. TI Keystone DSS hardware supports partitioning of resources between multiple hosts as it provides separate register space and unique interrupt line to each host. The DSS hardware can be used in shared mode in such a way that one or more of video planes can be owned by Linux wherease other planes can be owned by remote cores. One or more of the video ports can be dedicated exclusively to a processing core, wherease some of the video ports can be shared between two hosts too with only one of them having write access. Signed-off-by: Devarsh Thakkar --- .../bindings/display/ti/ti,am65x-dss.yaml | 82 +++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml index 55e3e490d0e6..d9bc69fbf1fb 100644 --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml @@ -112,6 +112,86 @@ properties: Input memory (from main memory to dispc) bandwidth limit in bytes per second + ti,dss-shared-mode: + type: boolean + description: + TI DSS7 supports sharing of display between multiple hosts + as it provides separate register space for display configuration and + unique interrupt line to each host. + One of the host is provided access to the global display + configuration labelled as "common" region of DSS allows that host + exclusive access to global registers of DSS while other host can + configure the display for it's usage using a separate register + space labelled as "common1". + The DSS resources can be partitioned in such a way that one or more + of the video planes are owned by Linux whereas other video planes + can be owned by a remote core. + The video port controlling these planes acts as a shared video port + and it can be configured with write access either by Linux or the + remote core in which case Linux only has read-only access to that + video port. + + ti,dss-shared-mode-planes: + description: + The video layer that is owned by processing core running Linux. + The display driver running from Linux has exclusive write access to + this video layer. + $ref: /schemas/types.yaml#/definitions/string + enum: [vidl, vid] + + ti,dss-shared-mode-vp: + description: + The video port that is being used in context of processing core + running Linux with display susbsytem being used in shared mode. + This can be owned either by the processing core running Linux in + which case Linux has the write access and the responsibility to + configure this video port and the associated overlay manager or + it can be shared between core running Linux and a remote core + with remote core provided with write access to this video port and + associated overlay managers and remote core configures and drives + this video port also feeding data from one or more of the + video planes owned by Linux, with Linux only having read-only access + to this video port and associated overlay managers. + + $ref: /schemas/types.yaml#/definitions/string + enum: [vp1, vp2] + + ti,dss-shared-mode-common: + description: + The DSS register region owned by processing core running Linux. + $ref: /schemas/types.yaml#/definitions/string + enum: [common, common1] + + ti,dss-shared-mode-vp-owned: + description: + This tells whether processing core running Linux has write access to + the video ports enlisted in ti,dss-shared-mode-vps. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + ti,dss-shared-mode-plane-zorder: + description: + The zorder of the planes owned by Linux. + For the scenario where Linux is not having write access to associated + video port, this field is just for + informational purpose to enumerate the zorder configuration + being used by remote core. + + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + +dependencies: + ti,dss-shared-mode: [ 'ti,dss-shared-mode-planes', 'ti,dss-shared-mode-vp', + 'ti,dss-shared-mode-plane-zorder', 'ti,dss-shared-mode-vp-owned'] + ti,dss-shared-mode-vp: ['ti,dss-shared-mode', 'ti,dss-shared-mode-planes', + 'ti,dss-shared-mode-plane-zorder', 'ti,dss-shared-mode-vp-owned'] + ti,dss-shared-mode-planes: ['ti,dss-shared-mode', 'ti,dss-shared-mode-vp', + 'ti,dss-shared-mode-plane-zorder', 'ti,dss-shared-mode-vp-owned'] + ti,dss-shared-mode-plane-zorder: ['ti,dss-shared-mode-planes', 'ti,dss-shared-mode-vp', + 'ti,dss-shared-mode', 'ti,dss-shared-mode-vp-owned'] + ti,dss-shared-mode-vp-owned: ['ti,dss-shared-mode-planes', 'ti,dss-shared-mode-vp', + 'ti,dss-shared-mode', 'ti,dss-shared-mode-plane-zorder'] + allOf: - if: properties: @@ -123,6 +203,8 @@ allOf: ports: properties: port@0: false + ti,dss-shared-mode-vp: + enum: [vp2] required: - compatible