From patchwork Sun Jan 21 22:33:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 764478 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [5.144.164.163]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA30438DFE; Sun, 21 Jan 2024 22:41:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.144.164.163 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705876903; cv=none; b=DEi7cAbVtbgYskOYpv/xhzTP7ZCR/6BgHf5wlyVbo6YLkj57WuF7nbiFao69z4t6pp6x2H0rj1QoZgSk7pSxY3hNIp8Cdlm3DhMBfUY7hbUGUE8LIqJqwKfjtzwcllHrIZjkkKG4G8xeZ7jJeWI6DPhqH3pUaBnWdm1/CtumHDE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705876903; c=relaxed/simple; bh=v0gMRoyQDCC1TKIVZdeJRib9E5iuXMlTlBxUT/A1zTQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZG9JZ7Eo1o5fB4+vffTLv4+iSSIGBJTVTvT2TCLtmCwJ8Cf15UFjtVvZuuZ0UQXAUTV42ObQ8CQaI7Y0DtlVMEfm1k6LqozTdwnjOVLvsahy7V03SBZefYNuzFXFg832PiejO4cD4/asnzoAPkAWJJdsMQI2zAQSVdyKnirIsXw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=somainline.org; spf=pass smtp.mailfrom=somainline.org; arc=none smtp.client-ip=5.144.164.163 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=somainline.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=somainline.org Received: from Marijn-Arch-PC.localdomain (94-211-6-86.cable.dynamic.v4.ziggo.nl [94.211.6.86]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 24B0020332; Sun, 21 Jan 2024 23:33:40 +0100 (CET) From: Marijn Suijten Date: Sun, 21 Jan 2024 23:33:38 +0100 Subject: [PATCH v2 1/6] arm64: dts: qcom: pmi8950: Add USB vbus and id sensing nodes Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240121-msm8976-dt-v2-1-7b186a02dc72@somainline.org> References: <20240121-msm8976-dt-v2-0-7b186a02dc72@somainline.org> In-Reply-To: <20240121-msm8976-dt-v2-0-7b186a02dc72@somainline.org> To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Luca Weiss , Adam Skladowski , Konrad Dybcio , Martin Botka , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten , AngeloGioacchino Del Regno X-Mailer: b4 0.12.4 USB sensing is performed on the PMIC, exposed as extcon nodes for use in the relevant USB (otg) driver nodes as the hardware itself is not able to sense USB presence (5V vbus) nor the role (ID pin). Signed-off-by: Marijn Suijten Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pmi8950.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pmi8950.dtsi b/arch/arm64/boot/dts/qcom/pmi8950.dtsi index 1029f3b1bb9a..49e97ebdbb3c 100644 --- a/arch/arm64/boot/dts/qcom/pmi8950.dtsi +++ b/arch/arm64/boot/dts/qcom/pmi8950.dtsi @@ -12,6 +12,20 @@ pmic@2 { #address-cells = <1>; #size-cells = <0>; + pmi8950_usb_id: usb-id@1100 { + compatible = "qcom,pm8941-misc"; + reg = <0x1100>; + interrupts = <0x2 0x11 0x3 IRQ_TYPE_NONE>; + interrupt-names = "usb_id"; + }; + + pmi8950_usb_vbus: usb-detect@1300 { + compatible = "qcom,pm8941-misc"; + reg = <0x1300>; + interrupts = <0x2 0x13 0x2 IRQ_TYPE_NONE>; + interrupt-names = "usb_vbus"; + }; + pmi8950_vadc: adc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100>; From patchwork Sun Jan 21 22:33:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 764480 Received: from relay01.th.seeweb.it (relay01.th.seeweb.it [5.144.164.162]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09B9D383B5; Sun, 21 Jan 2024 22:33:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.144.164.162 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705876426; cv=none; b=tzfkIgvaQ0hkLyQqQUKCy4rDbgo9gOQGW7irnxkPUF/oqA6FF4020TvkPvh9sMX39WcG9AFUw8Fv5o4I9+GuYXa06sgPj2kCbH5iB49tL6LIw70ZYr0w8LKTSIeXelC+zPoonouHmcNwbdGgRyDkbZem/h0HaNmtokL9aAFxwiI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705876426; c=relaxed/simple; bh=Ka0suA2f6Mht4+t9XWWJHrO4gwspsyTwEIQwdjMFPoc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=m5ROh4ec+oxRymrZ1qku5+kgPhwiUcje/Hy+hqTvt+SiRBKkz+Da7RlDy/BTOHtgf2JgvKEhcWnglGE+gH7PpDgK3FFU12uE9tlihYStbVJXs1rNcvsjCEO4s7d4BNssH49vv4hJklbE0MqShVTJPKg5yolrjnCQCN7esiRViIQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=somainline.org; spf=pass smtp.mailfrom=somainline.org; arc=none smtp.client-ip=5.144.164.162 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=somainline.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=somainline.org Received: from Marijn-Arch-PC.localdomain (94-211-6-86.cable.dynamic.v4.ziggo.nl [94.211.6.86]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 7436720385; Sun, 21 Jan 2024 23:33:42 +0100 (CET) From: Marijn Suijten Date: Sun, 21 Jan 2024 23:33:41 +0100 Subject: [PATCH v2 4/6] arm64: dts: qcom: msm8976: Declare and use SDC1 pins Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240121-msm8976-dt-v2-4-7b186a02dc72@somainline.org> References: <20240121-msm8976-dt-v2-0-7b186a02dc72@somainline.org> In-Reply-To: <20240121-msm8976-dt-v2-0-7b186a02dc72@somainline.org> To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Luca Weiss , Adam Skladowski , Konrad Dybcio , Martin Botka , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten X-Mailer: b4 0.12.4 Add the pinctrl states for SDC1 and use them on sdhc_1. Signed-off-by: Marijn Suijten --- arch/arm64/boot/dts/qcom/msm8976.dtsi | 55 +++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi index d2bb1ada361a..1d06f9b8a0f1 100644 --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi @@ -669,6 +669,56 @@ tlmm: pinctrl@1000000 { interrupt-controller; #interrupt-cells = <2>; + sdc1_off_state: sdc1-off-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd-pins { + pins = "sdc1_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data-pins { + pins = "sdc1_data"; + drive-strength = <2>; + bias-pull-up; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc1_on_state: sdc1-on-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd-pins { + pins = "sdc1_cmd"; + drive-strength = <10>; + bias-pull-up; + }; + + data-pins { + pins = "sdc1_data"; + drive-strength = <10>; + bias-pull-up; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + spi1_default: spi0-default-state { spi-pins { pins = "gpio0", "gpio1", "gpio3"; @@ -840,6 +890,11 @@ sdhc_1: mmc@7824900 { <&gcc GCC_SDCC1_APPS_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "core", "xo"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_on_state>; + pinctrl-1 = <&sdc1_off_state>; + status = "disabled"; }; From patchwork Sun Jan 21 22:33:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 764479 Received: from relay03.th.seeweb.it (relay03.th.seeweb.it [5.144.164.164]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99C47383B5 for ; Sun, 21 Jan 2024 22:41:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.144.164.164 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705876903; cv=none; b=oB2YgooXKoG/xQTMZxiKOWFXgXQjI1C8JVMFSTd+L90OWfpH0oaErZXzJNZZnHf5IclcTAbjAzCk+E2iT7FhfKe+kJ/G9Hg5E/xZ/8FMoeQzZEdrvgSBVlySswRVAjBS6+ga6PW/oRzrXqO/gpxx3avaF7BW2QIS0nCFt0QGCek= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705876903; c=relaxed/simple; bh=WJ4yt2ceaxagRwjbxAaPjRX6Swf4XBTvvfUCXxi7z30=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=r8tg03XWrKV8P5AXq/kI/AqcGTqeM6+eY/J1kPO1cLVvbiNf6O6IeDeWsv4TiBGsehrx0x44CctlETxEST1+lQB44g5cRi8Oz879OZHbgiWKe37YIQ1/fHg9gtbnNkrl4t1i9uGoxg7qhcU0NoSCDtYxqU0Cy9yHNoMpZTQKo/w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=somainline.org; spf=pass smtp.mailfrom=somainline.org; arc=none smtp.client-ip=5.144.164.164 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=somainline.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=somainline.org Received: from Marijn-Arch-PC.localdomain (94-211-6-86.cable.dynamic.v4.ziggo.nl [94.211.6.86]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r1.th.seeweb.it (Postfix) with ESMTPSA id 00E04203AA; Sun, 21 Jan 2024 23:33:43 +0100 (CET) From: Marijn Suijten Date: Sun, 21 Jan 2024 23:33:43 +0100 Subject: [PATCH v2 6/6] arm64: dts: qcom: msm8956-loire: Add SD Card Detect to SDC2 pin states Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240121-msm8976-dt-v2-6-7b186a02dc72@somainline.org> References: <20240121-msm8976-dt-v2-0-7b186a02dc72@somainline.org> In-Reply-To: <20240121-msm8976-dt-v2-0-7b186a02dc72@somainline.org> To: Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Luca Weiss , Adam Skladowski , Konrad Dybcio , Martin Botka , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Marijn Suijten X-Mailer: b4 0.12.4 In addition to the SDC2 pins, set the SD Card Detect pin in a sane state to be used as an interrupt when an SD Card is slotted in or removed. Signed-off-by: Marijn Suijten --- arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi b/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi index b0b83edd3627..75412e37334c 100644 --- a/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8956-sony-xperia-loire.dtsi @@ -264,10 +264,27 @@ &sdhc_1 { status = "okay"; }; +&sdc2_off_state { + sd-cd-pins { + pins = "gpio100"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + &sdc2_on_state { clk-pins { drive-strength = <10>; }; + + sd-cd-pins { + pins = "gpio100"; + function = "gpio"; + drive-strength = <2>; + input-enable; + bias-pull-up; + }; }; &sdhc_2 {