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Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 1/8] hw/arm/exynos: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:35 +0100 Message-ID: <20240123063842.35255-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=philmd@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/exynos4_boards.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index b0e13eb4f0..01c7618a67 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -34,6 +34,7 @@ #include "hw/qdev-properties.h" #include "hw/boards.h" #include "hw/irq.h" +#include "target/arm/cpu-qom.h" #define SMDK_LAN9118_BASE_ADDR 0x05000000 @@ -150,12 +151,18 @@ static void smdkc210_init(MachineState *machine) arm_load_kernel(s->soc.cpu[0], machine, &exynos4_board_binfo); } +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL +}; + static void nuri_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "Samsung NURI board (Exynos4210)"; mc->init = nuri_init; + mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = EXYNOS4210_NCPUS; mc->min_cpus = EXYNOS4210_NCPUS; mc->default_cpus = EXYNOS4210_NCPUS; @@ -174,6 +181,7 @@ static void smdkc210_class_init(ObjectClass *oc, void *data) mc->desc = "Samsung SMDKC210 board (Exynos4210)"; mc->init = smdkc210_init; + mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = EXYNOS4210_NCPUS; mc->min_cpus = EXYNOS4210_NCPUS; mc->default_cpus = EXYNOS4210_NCPUS; From patchwork Tue Jan 23 06:38:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765179 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1460676wrx; Mon, 22 Jan 2024 22:40:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IGQFp8KUhnm7gehoo+REyq69ciHRXf3TLlXYr6blFowK5ai6Vexz99kJgCNYPta6ND6K9fD X-Received: by 2002:a0c:f0c4:0:b0:67a:9b29:c70c with SMTP id d4-20020a0cf0c4000000b0067a9b29c70cmr370776qvl.39.1705992019723; Mon, 22 Jan 2024 22:40:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705992019; cv=none; d=google.com; s=arc-20160816; b=syitKx/e5bhAwbffHpZkTceMr/oycNmLkUTt/8DciVemA55in0J+ZnDADh3vaf9/fd Ws9l9YmhSv5hEI6Gs2AOrYrDHM7rde6994eaOtVVYXG30e72Pt3GmGzYqSD3heoGbjMd CxE/dE6kIzen/7o7hGmztbmxeNrWEyuETiRpa5+3YVLm7NvfN5qsbwSdy0RChnW8f5oP smFpMM8YPHmJypc/gKSKYzDG/doowK2QmIbnFqphH37NPdGox2dZQcqjteyGukJH7qCC 4fEbXdexAlYR5k8uDWgnMlgALNLsSd7L6SM0gMD8x/Kj5/xHMhODP15N5Ks67eTcchd4 +HlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=i77zJu4XGXBVApw9vLRB2i1/pQOfnONi4E/tNbGXicU=; fh=HVoLZTw5hlqqes9L9DSbvdhxOE62q72aEHLq82QYnRw=; b=VimaR6jR5bQQe9A0rz6TwTNJmfBwfBiODojsLCDnn56aTaLOoBb6GMqxSCthBh2q5G D6EqzgmRrHxbUzF2JUwgP321HfVq2c3NSa0JiMWsvAn/IqB0mQe4IEM6eLnXySXvX42Z WWYjREx+ZkjQ58ssX/etVi6wRQzxuy0I2QLMsBSTaftuJu/aQshuBD86YpDydQOM/Mcd uCxyX51aZAjsaiV7B/vQZlEGQolFgIqxRfd/35wEqQsEbEAaPJD5c/MMX01sV7MeCej0 tl5rJFnrVXc5EEgokQgY8EEHMmInYGtoOieKNP/C3oYYiX8k3fzr911T1CdbMnEBjQ0Y Vxpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=S1b2+tOH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 2/8] hw/arm/highbank: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:36 +0100 Message-ID: <20240123063842.35255-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU types. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/highbank.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index e6e27d69af..67677eb651 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -344,10 +344,15 @@ static void midway_init(MachineState *machine) static void highbank_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "Calxeda Highbank (ECX-1000)"; mc->init = highbank_init; + mc->valid_cpu_types = valid_cpu_types; mc->block_default_type = IF_IDE; mc->units_per_default_bus = 1; mc->max_cpus = 4; @@ -363,10 +368,15 @@ static const TypeInfo highbank_type = { static void midway_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a15"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "Calxeda Midway (ECX-2000)"; mc->init = midway_init; + mc->valid_cpu_types = valid_cpu_types; mc->block_default_type = IF_IDE; mc->units_per_default_bus = 1; mc->max_cpus = 4; From patchwork Tue Jan 23 06:38:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765182 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1460753wrx; Mon, 22 Jan 2024 22:40:33 -0800 (PST) X-Google-Smtp-Source: AGHT+IHbuItnBYvvIHl7PZVnp+V6PnR4M808JMD+bjGYmlJj05n/5zCWo8Gcm1dwQPt4fQfsm1AO X-Received: by 2002:a05:620a:3720:b0:783:3c48:66ff with SMTP id de32-20020a05620a372000b007833c4866ffmr6483780qkb.49.1705992033764; Mon, 22 Jan 2024 22:40:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705992033; cv=none; d=google.com; s=arc-20160816; b=Pq+qtaL/z5LWO59R70qsAKFx/2V6IasVrSbFuOBdFUZXXCEwoCgzqdZKEMYaBipJIF qgcQrgIh+d2uuMrlf/JMdRk4EMLurb96H1+I17xSxzII1VArCJFuRo4DSDhZq/A19R3k jx6TLMc+CqTaN0nSz3aKhL8ditkTnyzU67GVvsE7DDSN+29FwhmmLQOgve3Hzpfg4UKE XidXjVoxBJL1KQqWSp6lepkloEcqbsCdkKLVc1npoVrjM3xY70T9pqS0iSuoF1g78qwW Lv4vnhXDcaVz9jnTf8/zziwuZKO3jrFkRKJNcxA3JAdc2jn5Y2URwhFMapWBjjZ4lWyw o9bQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=2RjX1tFrRGVlM1BwnlKhE6JoLvLjIml7FEvFQ9cMoCw=; fh=HVoLZTw5hlqqes9L9DSbvdhxOE62q72aEHLq82QYnRw=; b=o/du18HmvI+U4vwr53bvnMAFvfXii/+Wp+03J5VODLbX9rKOoafjG1qfCySeCVKYl1 8lLrSEr2xSmg+MYXyrL9A4i9y4MznUtyn1yQAszZq9X41KJ2JBOk+yzQlYHWOMBLr9xt 6KqIJX7eQ6ChbQDEDYLd6Yk7bOQgo420exgSBcIWlnBktfe06RcEF/n3TsmiRSHU3k+j BNeYSzMXwxMznqB1Hotplz/7Kbh1InGCNptGcH4OhVtJuMO1d7xqkVw2oIat9SHFV0wU +OjzTzoss33b6wZaPJVoHZOmirg2kHTPJyHU+Cacs8pTwY758IY9fOoFVaG6eZoeej0L vx4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bUtvC4xt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 3/8] hw/arm/vexpress: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:37 +0100 Message-ID: <20240123063842.35255-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU types. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/vexpress.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index f1b45245d5..a3561a1b56 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -783,22 +783,32 @@ static void vexpress_class_init(ObjectClass *oc, void *data) static void vexpress_a9_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); VexpressMachineClass *vmc = VEXPRESS_MACHINE_CLASS(oc); mc->desc = "ARM Versatile Express for Cortex-A9"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); + mc->valid_cpu_types = valid_cpu_types; vmc->daughterboard = &a9_daughterboard; } static void vexpress_a15_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a15"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); VexpressMachineClass *vmc = VEXPRESS_MACHINE_CLASS(oc); mc->desc = "ARM Versatile Express for Cortex-A15"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"); + mc->valid_cpu_types = valid_cpu_types; vmc->daughterboard = &a15_daughterboard; From patchwork Tue Jan 23 06:38:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765183 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1460771wrx; Mon, 22 Jan 2024 22:40:37 -0800 (PST) X-Google-Smtp-Source: AGHT+IEKCFjAnrwyXjdjZESdCcd6F64//uQ8eaTov9aku+hYSq1e6leJP3o1Qe+u41PzoY2S5dRB X-Received: by 2002:a05:622a:4:b0:429:d600:e94f with SMTP id x4-20020a05622a000400b00429d600e94fmr301990qtw.127.1705992037484; Mon, 22 Jan 2024 22:40:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705992037; cv=none; d=google.com; s=arc-20160816; b=vl3dAC/FvE8kPYX5PdX2UJ0Q5zhQaY7LYa72mBFfBUDT/8vlpqQ/Aoh5pkmnj2zytP a3V31tkxcjkpwxAK7LAswIbhFoK+Z4WZPkPdB7hjMIBc8N5KvKfHFX3D9GQuo8R+Qztm LWUx3kGxhN3fVQK0acTVg/cympQoo9vPMDYZVg1IaLBbFmH0bzaDV35jAUfjPMJBmGT5 wFnHNWm2nLpYbLn18KwFKnUX1nmL+G/UIMS0tQt0Ale3qLme7N9P//PVIfqeC1bVA1+c zk5TI2o0V56OReIfrBLg0K9hEFBQLKefYTvpTwFXdrLcO6tw8l6W9ZPJOq4WOOdFdyYR 422A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TGD5FLvwAQGOZbUBjumYjpCbltGmL2kWHmZW0fC4bQw=; fh=HVoLZTw5hlqqes9L9DSbvdhxOE62q72aEHLq82QYnRw=; b=cmvu/4rGVZPl1t8hHzjlbohoID1Ons15XBTMdn+UiD9/dUaPGEPMGLhTe8oL1LFZuM A6kEqr/w/Be6QiqoYo6k6zPQmDVVMPc3EDCe5RhVD/2XhKP1C0ypqq8/XWg1uoUA9Yvk gfCKHx0hSF6Bt68slB2XeDsxyzujYhD+wE5g9vU24SQx767igvodaj7H/LD0gbZO3gSO QTKWtzD1lMcZyhPJNe4VQjhuEzVWI3BuHFDC0QJ/3JzNC2o+1jKc0XHTc4KpH4x13OLZ 7+fmp4+3TrusKQ608vrg4SgtUzsH5E0QrWytcykMaDFH86+WFcRFrsEfswrzv43eleI8 L59w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Wx3QmEKN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 4/8] hw/arm/aspeed/2400: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:38 +0100 Message-ID: <20240123063842.35255-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/aspeed.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index cc59176563..e0e0877b1d 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1147,6 +1147,11 @@ static int aspeed_soc_num_cpus(const char *soc_name) return sc->num_cpus; } +static const char * const ast2400_a1_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("arm926"), + NULL +}; + static void aspeed_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -1175,6 +1180,7 @@ static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx25l25635f"; amc->num_cs = 1; amc->i2c_init = palmetto_bmc_i2c_init; + mc->valid_cpu_types = ast2400_a1_valid_cpu_types; mc->default_ram_size = 256 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1192,6 +1198,7 @@ static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx25l25635e"; amc->num_cs = 1; amc->i2c_init = quanta_q71l_bmc_i2c_init; + mc->valid_cpu_types = ast2400_a1_valid_cpu_types; mc->default_ram_size = 128 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1211,6 +1218,7 @@ static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, amc->num_cs = 1; amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init = palmetto_bmc_i2c_init; + mc->valid_cpu_types = ast2400_a1_valid_cpu_types; mc->default_ram_size = 256 * MiB; } From patchwork Tue Jan 23 06:38:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765181 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1460707wrx; Mon, 22 Jan 2024 22:40:25 -0800 (PST) X-Google-Smtp-Source: AGHT+IFXz8eNHkgg+1rpy9S09ks8DZ84NXL4Gsne2dwztlozur4+tvOia3HhtcO3V4Z0i3fQ8i2a X-Received: by 2002:a05:620a:846:b0:783:352b:d8b5 with SMTP id u6-20020a05620a084600b00783352bd8b5mr5940252qku.51.1705992025669; Mon, 22 Jan 2024 22:40:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705992025; cv=none; d=google.com; s=arc-20160816; b=F5wX9SE5azkXM46ElVKbbRvrdw8wiB2JCTt/DdhRScr8wjYQd5w3LxpO0jMySWu/WW A1+7eALzn08hZ+REJ8ytFmhU1bsoknsYik5//nzaPYUtjwIHSa7it+xSCme04Q6m/T27 8EG/o3JrmReGJDzUjl9T4sHzwBva5/Rtml8qTE11dLGyntHw37DkFp2Cm8Mlj+fQOaTn AW/JoStJ+dyIUspWH/fQ6VjumxRuxJoU+4yvHJNp2R0PXDZvY8AKBtSi0rWRZmQLzPaT KL36ivNJECf5PbRljh/2N1ayEceGNSRSEqFrTdoU2H8W2RKKStBYWm9X9R9nbLIx27t8 hewA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ce+1xoISDEqzphDfXb+KFJwfSUtAI/2aaWKElbLspcc=; fh=HVoLZTw5hlqqes9L9DSbvdhxOE62q72aEHLq82QYnRw=; b=lFHamOvjCbMxdFX5uzjLy6Hd7SOlFzsDp0IP/8Ua2sIUemxjKw7KkYb4WMUTlkOmxg bVT7ageanb8U+t1/aTMgW/0XifVEHFt/QJ7YQnv7dCmWg0oFOPlsj1uThPGtjSlnW7UE oZNrnVqK9MNbv2lC7X35pmds5oOlzS5uMdi2S9S1ZlPNV84i0L8c8jhvL4hPWhiiwBDa 55R/8vpOqnEsqRa0At02yOnm1mkh4MakIiUi0LSudeH47ylKBJMbKBWZDdsgnx2Ig5PY o+BxV1Mw1IxqV5LpNv5ddW9jMyPOE+qGW/PTg8fmQowtJ8dQzraaaFckeRey8ig/pU3Q We/A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JHXiUwNs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 5/8] hw/arm/aspeed/2500: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:39 +0100 Message-ID: <20240123063842.35255-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::230; envelope-from=philmd@linaro.org; helo=mail-lj1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/aspeed.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index e0e0877b1d..df627096d2 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1152,6 +1152,11 @@ static const char * const ast2400_a1_valid_cpu_types[] = { NULL }; +static const char * const ast2500_a1_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("arm1176"), + NULL +}; + static void aspeed_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -1236,6 +1241,7 @@ static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc, amc->num_cs = 1; amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init = palmetto_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1253,6 +1259,7 @@ static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx25l25635f"; amc->num_cs = 1; amc->i2c_init = ast2500_evb_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1271,6 +1278,7 @@ static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx25l25635e"; amc->num_cs = 2; amc->i2c_init = yosemitev2_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1288,6 +1296,7 @@ static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx66l1g45g"; amc->num_cs = 2; amc->i2c_init = romulus_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1306,6 +1315,7 @@ static void aspeed_machine_tiogapass_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx25l25635e"; amc->num_cs = 2; amc->i2c_init = tiogapass_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1324,6 +1334,7 @@ static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx66l1g45g"; amc->num_cs = 2; amc->i2c_init = sonorapass_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1341,6 +1352,7 @@ static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data) amc->spi_model = "mx66l1g45g"; amc->num_cs = 2; amc->i2c_init = witherspoon_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1398,6 +1410,7 @@ static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data) amc->num_cs = 2; amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init = g220a_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 1024 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1416,6 +1429,7 @@ static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, void *data) amc->num_cs = 2; amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init = fp5280g2_bmc_i2c_init; + mc->valid_cpu_types = ast2500_a1_valid_cpu_types; mc->default_ram_size = 512 * MiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); From patchwork Tue Jan 23 06:38:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765176 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1460489wrx; Mon, 22 Jan 2024 22:39:30 -0800 (PST) X-Google-Smtp-Source: AGHT+IHqLvdyig+H9NmTsjz/PMhlZrGCJ3pPaBH2dIgUBqz1YO2oZIvo9IOcTML3pwD8sGaly28U X-Received: by 2002:ad4:5ccb:0:b0:681:896c:c1c6 with SMTP id iu11-20020ad45ccb000000b00681896cc1c6mr527302qvb.126.1705991970715; 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Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 6/8] hw/arm/aspeed/2600: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:40 +0100 Message-ID: <20240123063842.35255-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/aspeed.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index df627096d2..393c97d55e 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1157,6 +1157,11 @@ static const char * const ast2500_a1_valid_cpu_types[] = { NULL }; +static const char * const ast2600_a3_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL +}; + static void aspeed_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -1373,6 +1378,7 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data) amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON | ASPEED_MAC3_ON; amc->i2c_init = ast2600_evb_i2c_init; + mc->valid_cpu_types = ast2600_a3_valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1392,6 +1398,7 @@ static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data) amc->num_cs = 2; amc->macs_mask = ASPEED_MAC2_ON; amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */ + mc->valid_cpu_types = ast2600_a3_valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1449,6 +1456,7 @@ static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data) amc->num_cs = 2; amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; amc->i2c_init = rainier_bmc_i2c_init; + mc->valid_cpu_types = ast2600_a3_valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1471,6 +1479,7 @@ static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data) amc->macs_mask = ASPEED_MAC3_ON; amc->i2c_init = fuji_bmc_i2c_init; amc->uart_default = ASPEED_DEV_UART1; + mc->valid_cpu_types = ast2600_a3_valid_cpu_types; mc->default_ram_size = FUJI_BMC_RAM_SIZE; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1492,6 +1501,7 @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data) amc->num_cs = 2; amc->macs_mask = ASPEED_MAC2_ON; amc->i2c_init = bletchley_bmc_i2c_init; + mc->valid_cpu_types = ast2600_a3_valid_cpu_types; mc->default_ram_size = BLETCHLEY_BMC_RAM_SIZE; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1631,6 +1641,7 @@ static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc, amc->num_cs = 2; amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; amc->i2c_init = qcom_dc_scm_bmc_i2c_init; + mc->valid_cpu_types = ast2600_a3_valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); @@ -1651,6 +1662,7 @@ static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc, amc->num_cs = 2; amc->macs_mask = ASPEED_MAC2_ON | ASPEED_MAC3_ON; amc->i2c_init = qcom_dc_scm_firework_i2c_init; + mc->valid_cpu_types = ast2600_a3_valid_cpu_types; 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Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 7/8] hw/arm/aspeed/1030: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:41 +0100 Message-ID: <20240123063842.35255-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/aspeed.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 393c97d55e..62d08899d8 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1162,6 +1162,11 @@ static const char * const ast2600_a3_valid_cpu_types[] = { NULL }; +static const char * const ast1030_a1_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m4"), /* TODO cortex-m4f */ + NULL +}; + static void aspeed_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -1613,6 +1618,7 @@ static void aspeed_minibmc_machine_ast1030_evb_class_init(ObjectClass *oc, AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); mc->desc = "Aspeed AST1030 MiniBMC (Cortex-M4)"; + mc->valid_cpu_types = ast1030_a1_valid_cpu_types; amc->soc_name = "ast1030-a1"; amc->hw_strap1 = 0; amc->hw_strap2 = 0; From patchwork Tue Jan 23 06:38:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765178 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1460604wrx; Mon, 22 Jan 2024 22:40:00 -0800 (PST) X-Google-Smtp-Source: AGHT+IG7eUlLIXugFJBQOwRUipQWQrypdQZlt7BVS+wnb4i9fco82Fy/Glm/CqUQmfhYbbmcPpjq X-Received: by 2002:a05:620a:2105:b0:783:915c:1fb1 with SMTP id l5-20020a05620a210500b00783915c1fb1mr5916707qkl.16.1705992000488; Mon, 22 Jan 2024 22:40:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1705992000; cv=none; d=google.com; s=arc-20160816; b=K03h/lw2ajmLYuQEqi8x5me0H/9m/+NlnFNTubaSHIY0MLGrwWIbyspang4r6AN67V O/sA8OEpSS0lWqyuQ5ZgGa3U1ii3aDaemDQQxPsqW3nSRzWLXabnRdImLBvGMZU5jf0S HDS3ba+yVJpHeAv8uO+AW/rQLn6UXIOgsfl6twynNNcL6m7uioz647t2UQLXtRm7PL4k cC4RUToiy8TzT/ia9SP/eeUzXOAF6BhPJMCSkN8TsTW2ZMcuvF42fiAAdzJP9QyTRTGU vQfjlVKGDEUSVwuyIFHhNjZk5Gm7nk3xDYFsZdhKsWNJ7E/Vpzwledf8iEbC4EY1sl5i 6z5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=39OP9EE9lF2EcfOzamU8x35qcADjGnzDFDx/nFOBMLk=; fh=HVoLZTw5hlqqes9L9DSbvdhxOE62q72aEHLq82QYnRw=; b=VzzBQRPk2ad0u28Zm0jG1LKlZ6ZaSm1ExpSRh0YVRN35+EdevPKm9jL8ltJ9aoi+vm d8SN0ucKV3y8M6ue8HYdX6XYQh42uz29IAxtLCdVgmH/qgHBpGJ5e3VQV/vQjWxA44xi 2QcSz5wm5dWbn8YyoHCHQsrTezf8oqdR5GJJycGfyz2F25ZVIgZcvSlk2ZJ8En83hGKY Luf12U6fuD0WdZHAq0rQuMzY7noqrdp+boZWfUXAia3BFoe6U99zVOXx31GSpEQLt2cf jcniBfZF5phJ96ySOMK+CIKCwt8epknVq4TucRbzqRD9Nz403j60AwIOOJfW26G3l/Rr GXWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EIOczz3L; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , Rob Herring , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 8/8] hw/arm/zynq: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 07:38:42 +0100 Message-ID: <20240123063842.35255-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123063842.35255-1-philmd@linaro.org> References: <20240123063842.35255-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/xilinx_zynq.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 66d0de139f..6ec65d4780 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -355,6 +355,10 @@ static void zynq_init(MachineState *machine) static void zynq_machine_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "Xilinx Zynq Platform Baseboard for Cortex-A9"; mc->init = zynq_init; @@ -362,6 +366,7 @@ static void zynq_machine_class_init(ObjectClass *oc, void *data) mc->no_sdcard = 1; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_id = "zynq.ext_ram"; }