From patchwork Tue Jan 23 08:49:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fenglin Wu via B4 Relay X-Patchwork-Id: 765286 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14A6157312; Tue, 23 Jan 2024 08:49:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705999768; cv=none; b=R2XKSxO/SQ1xoMkzW84xR8wukpuMi9grnDOGfTwiG02wIsvCfhcDZkAdJX9T7aHHaXaatEQlKHDhs12KjnhZwiDLm5WtD59QDNh4ZI+AgVWkQ8pdh9nOD5FqAW5CBh1d/H1ci2db8DojMdpOb8aout/+GrQ53H23O83BI3fz99U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705999768; c=relaxed/simple; bh=7Ib1xBscd/bQp5T9ztO5WfcN+C9oAd5LPyb9/WSHBHg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uQbr5AY/NLBPpx/e3TrCwsx8Di2eRWGfhPidZJ0F14KSCbJJDSn1NxsRwlXW/8ClhN8E7sVumTwq/ia2UimHm2TsepzkOhbyf2OqJ9xlVl1G6buR1UOtQ9fDFrxenTC5KplOITsUsWHgBOanCcx1D5z//a4PWFIfyjEma/rfX7E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=AYJN+ipv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="AYJN+ipv" Received: by smtp.kernel.org (Postfix) with ESMTPS id 66939C433A6; Tue, 23 Jan 2024 08:49:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1705999767; bh=7Ib1xBscd/bQp5T9ztO5WfcN+C9oAd5LPyb9/WSHBHg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=AYJN+ipv8Gg1xNsvNHQxMYzI/s+/pkQkpCCkVQV3NUi9YXobIYTCz9dxa+/If+Djk EsSjPFGE2pPoJEqszI/Ps711Pc1wNER2cWNaQC0FBzjoFgiDJojCEThe2qlR2i6dMK MdFzmnLJklhlzDKWFHOyl+XaVXHtyHed87whogUad3orEpqgmsl/kCB/48MRgSDnDu dYYN4WjPkl5Q5+u9HOQrPky7pJixwkU+rDpVI85tArvNKQ4cHds73m2OPC8qqMfP7i 76h8A7B0lPFfarQ3hral15MsbGMkUHn+45kwES+wGQ+xs4XrjkNFvc5cTbCvFv7tLM cBuFV3w6jwmpg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 293B3C47E49; Tue, 23 Jan 2024 08:49:27 +0000 (UTC) From: Fenglin Wu via B4 Relay Date: Tue, 23 Jan 2024 16:49:25 +0800 Subject: [PATCH v2 2/2] arm64: dts: qcom: sm8650-qrd: add PM8010 regulators Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240123-sm8650_pm8010_support-v2-2-52f517b20a1d@quicinc.com> References: <20240123-sm8650_pm8010_support-v2-0-52f517b20a1d@quicinc.com> In-Reply-To: <20240123-sm8650_pm8010_support-v2-0-52f517b20a1d@quicinc.com> To: kernel@quicinc.com, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_collinsd@quicinc.com, Fenglin Wu , Neil Armstrong X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; a=ed25519-sha256; t=1705999765; l=4238; i=quic_fenglinw@quicinc.com; s=20230725; h=from:subject:message-id; bh=IwF9qLfR2pA/CEp0VfIpGzDt44C9lS05rb9dAr8fPT8=; b=n6xp2sxc+fI3l6sIb6iEJ9Ahsw6kKPVXlS63xd74g1/NNDYPpBJDpEj9WWNnC5zI7rpE+/YrO gzRCJjHURRPDbjf4JE8PH55DphiMLoZCAFzV2lreJ8y7Um/eCpE+lhJ X-Developer-Key: i=quic_fenglinw@quicinc.com; a=ed25519; pk=hleIDz3Unk1zeiwwOnZUjoQVMMelRancDFXg927lNjI= X-Endpoint-Received: by B4 Relay for quic_fenglinw@quicinc.com/20230725 with auth_id=68 X-Original-From: Fenglin Wu Reply-To: From: Fenglin Wu Add PM8010 regulator device nodes for sm8650-qrd board. Reviewed-by: Neil Armstrong Tested-by: Neil Armstrong # on SM8650-QRD Signed-off-by: Fenglin Wu --- arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 118 ++++++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts index 592a67a47c78..361894fa201a 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-qrd.dts @@ -436,6 +436,124 @@ vreg_l3i_1p2: ldo3 { RPMH_REGULATOR_MODE_HPM>; }; }; + + regulators-6 { + compatible = "qcom,pm8010-rpmh-regulators"; + qcom,pmic-id = "m"; + + vdd-l1-l2-supply = <&vreg_s1c_1p2>; + vdd-l3-l4-supply = <&vreg_bob2>; + vdd-l5-supply = <&vreg_s6c_1p8>; + vdd-l6-l7-supply = <&vreg_bob1>; + + vreg_l1m_1p1: ldo1 { + regulator-name = "vreg_l1m_1p1"; + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1104000>; + regulator-initial-mode = ; + }; + + vreg_l2m_1p056: ldo2 { + regulator-name = "vreg_l2m_1p056"; + regulator-min-microvolt = <1056000>; + regulator-max-microvolt = <1056000>; + regulator-initial-mode = ; + }; + + vreg_l3m_2p8: ldo3 { + regulator-name = "vreg_l3m_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l4m_2p8: ldo4 { + regulator-name = "vreg_l4m_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l5m_1p8: ldo5 { + regulator-name = "vreg_l5m_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l6m_2p8: ldo6 { + regulator-name = "vreg_l6m_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l7m_2p96: ldo7 { + regulator-name = "vreg_l7m_2p96"; + regulator-min-microvolt = <2960000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + }; + + regulators-7 { + compatible = "qcom,pm8010-rpmh-regulators"; + qcom,pmic-id = "n"; + + vdd-l1-l2-supply = <&vreg_s1c_1p2>; + vdd-l3-l4-supply = <&vreg_s6c_1p8>; + vdd-l5-l6-supply = <&vreg_bob2>; + vdd-l7-supply = <&vreg_bob1>; + + vreg_l1n_1p1: ldo1 { + regulator-name = "vreg_l1n_1p1"; + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1104000>; + regulator-initial-mode = ; + }; + + vreg_l2n_1p056: ldo2 { + regulator-name = "vreg_l2n_1p056"; + regulator-min-microvolt = <1056000>; + regulator-max-microvolt = <1056000>; + regulator-initial-mode = ; + }; + + vreg_l3n_1p8: ldo3 { + regulator-name = "vreg_l3n_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l4n_1p8: ldo4 { + regulator-name = "vreg_l4n_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l5n_2p8: ldo5 { + regulator-name = "vreg_l5n_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l6n_2p8: ldo6 { + regulator-name = "vreg_l6n_2p8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l7n_3p3: ldo7 { + regulator-name = "vreg_l7n_3p3"; + regulator-min-microvolt = <3304000>; + regulator-max-microvolt = <3304000>; + regulator-initial-mode = ; + }; + }; }; &dispcc {