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Thu, 19 Sep 2019 13:51:15 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp1.samsung.com (KnoxPortal) with ESMTP id 20190919135115eusmtrp1e0184499afe95c7abf5ad6791e5ec02c~F2zcvRnYC1748217482eusmtrp1d; Thu, 19 Sep 2019 13:51:15 +0000 (GMT) X-AuditID: cbfec7f2-54fff70000001175-b0-5d8387d30951 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 6F.21.04117.3D7838D5; Thu, 19 Sep 2019 14:51:15 +0100 (BST) Received: from AMDC2765.digital.local (unknown [106.120.51.73]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20190919135114eusmtip2196f037e1518d6cd89fd025403dbbc1e~F2zcThKUp0734307343eusmtip2X; Thu, 19 Sep 2019 13:51:14 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Maciej Falkowski , krzk@kernel.org, mark.rutland@arm.com, robh@kernel.org, a.hajda@samsung.com, Marek Szyprowski Subject: [PATCH] arm64: dts: exynos: Exynos5433: swap clock order of sysmmu Date: Thu, 19 Sep 2019 15:50:53 +0200 Message-Id: <20190919135053.11849-1-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190919131944.11007-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpmleLIzCtJLcpLzFFi42LZduzned0r7c2xBvueMlrcWneO1WL+ESBx /vwGdovLu+awWcw4v4/J4kHzOjaLtUfuslssvX6RyeL/nh3sDpwea+atYfTYtKqTzaNvyypG j8+b5AJYorhsUlJzMstSi/TtErgymuY9Yyr4rFrRtOgGewPjfLkuRk4OCQETie2bZ7F0MXJx CAmsYJS4uHwzM4TzhVFidvdOVgjnM6NEw9ImNpiWZxs3sEMkljNKvO16xATX8vflR0aQKjYB Q4mut11gHSICiRK3f/eDdTALrGGU+PLtHStIQljAW+LR4algDSwCqhLtZ5eA2bwCthJ7r19j hFgnL7F6wwFmEJtTwE5iyrwJYDdJCHxnk+g8/RrqJheJbV//sUDYwhKvjm9hh7BlJE5P7mGB aGhmlHh4bi07hNPDKHG5aQbUCmuJw8cvAo3lALpPU2L9Ln2IsKPE+gXb2UDCEgJ8EjfeCoKE mYHMSdumM0OEeSU62oQgqtUkZh1fB7f24IVLzBC2h8Sev7DgmggM1PlX2SYwys9CWLaAkXEV o3hqaXFuemqxYV5quV5xYm5xaV66XnJ+7iZGYNI4/e/4px2MXy8lHWIU4GBU4uFVKG+OFWJN LCuuzD3EKMHBrCTCO8e0KVaINyWxsiq1KD++qDQntfgQozQHi5I4bzXDg2ghgfTEktTs1NSC 1CKYLBMHp1QDY2Xal9SS6APrg1KXdjT/3GY0c73im9mnOJJURGVbz7Bu2HVBW1JigcQSrRXv BXflnjWWtJOfr+/P5WMSpCxx/1TnZN2tEUpq8ntOt1pp3JNTv9Hz/Dvr6kTDKu/aizzrt8w2 lzx7fu2hHfu3pb9Zf87FqDbK89uD1YenzFrlEa/RE1OZpXB8qhJLcUaioRZzUXEiAN6nVAwW AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMLMWRmVeSWpSXmKPExsVy+t/xe7qX25tjDaa381ncWneO1WL+ESBx /vwGdovLu+awWcw4v4/J4kHzOjaLtUfuslssvX6RyeL/nh3sDpwea+atYfTYtKqTzaNvyypG j8+b5AJYovRsivJLS1IVMvKLS2yVog0tjPQMLS30jEws9QyNzWOtjEyV9O1sUlJzMstSi/Tt EvQymuY9Yyr4rFrRtOgGewPjfLkuRk4OCQETiWcbN7B3MXJxCAksZZQ4urObGSIhI3FyWgMr hC0s8edaFxtE0SdGif1vrjCBJNgEDCW63oIkODlEBJIlFh/eyQhSxCywiVFi54rLjCAJYQFv iUeHp4LZLAKqEu1nl4DZvAK2EnuvX2OE2CAvsXrDAbDNnAJ2ElPmTQDbLARU07nqA9MERr4F jAyrGEVSS4tz03OLjfSKE3OLS/PS9ZLzczcxAgN427GfW3Ywdr0LPsQowMGoxMOrUN4cK8Sa WFZcmXuIUYKDWUmEd45pU6wQb0piZVVqUX58UWlOavEhRlOgoyYyS4km5wOjK68k3tDU0NzC 0tDc2NzYzEJJnLdD4GCMkEB6YklqdmpqQWoRTB8TB6dUA+O1lyKzw3Y86Nz55rGr/bbddxce X1jwX3/16ellAsemuRdOsD5wdM//sE0MwgzcC97Mtw7ZfWl2evWWYx85qmIetj3bZ6XxsdRP Te5JopTUks5CgWsnbaeu1Auav0rkWEvc5jLOpVmbWW9rcgavuRHYpRt1/reQVYE2p8i9y4c3 3dtzL1ZE+4mEEktxRqKhFnNRcSIAgxtGEHYCAAA= X-CMS-MailID: 20190919135115eucas1p2e1c9c090c5a75211e5a137c598721287 X-Msg-Generator: CA X-RootMTR: 20190919135115eucas1p2e1c9c090c5a75211e5a137c598721287 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190919135115eucas1p2e1c9c090c5a75211e5a137c598721287 References: <20190919131944.11007-1-m.szyprowski@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org From: Maciej Falkowski dt-schema supports only order of names "aclk", "pclk". Swap some sysmmu definitions to make them compatible with schema. Signed-off-by: Maciej Falkowski Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 54 +++++++++++----------- 1 file changed, 27 insertions(+), 27 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index a76f620f7f35..ba66ea906f60 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1179,9 +1179,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x13a00000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_disp CLK_PCLK_SMMU_DECON0X>, - <&cmu_disp CLK_ACLK_SMMU_DECON0X>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_disp CLK_ACLK_SMMU_DECON0X>, + <&cmu_disp CLK_PCLK_SMMU_DECON0X>; power-domains = <&pd_disp>; #iommu-cells = <0>; }; @@ -1190,9 +1190,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x13a10000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_disp CLK_PCLK_SMMU_DECON1X>, - <&cmu_disp CLK_ACLK_SMMU_DECON1X>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_disp CLK_ACLK_SMMU_DECON1X>, + <&cmu_disp CLK_PCLK_SMMU_DECON1X>; #iommu-cells = <0>; power-domains = <&pd_disp>; }; @@ -1201,9 +1201,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x13a20000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_disp CLK_PCLK_SMMU_TV0X>, - <&cmu_disp CLK_ACLK_SMMU_TV0X>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_disp CLK_ACLK_SMMU_TV0X>, + <&cmu_disp CLK_PCLK_SMMU_TV0X>; #iommu-cells = <0>; power-domains = <&pd_disp>; }; @@ -1212,9 +1212,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x13a30000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_disp CLK_PCLK_SMMU_TV1X>, - <&cmu_disp CLK_ACLK_SMMU_TV1X>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_disp CLK_ACLK_SMMU_TV1X>, + <&cmu_disp CLK_PCLK_SMMU_TV1X>; #iommu-cells = <0>; power-domains = <&pd_disp>; }; @@ -1256,9 +1256,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x15040000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>, - <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER0>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER0>, + <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>; #iommu-cells = <0>; power-domains = <&pd_mscl>; }; @@ -1267,9 +1267,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x15050000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>, - <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER1>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER1>, + <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>; #iommu-cells = <0>; power-domains = <&pd_mscl>; }; @@ -1278,9 +1278,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x15060000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_mscl CLK_PCLK_SMMU_JPEG>, - <&cmu_mscl CLK_ACLK_SMMU_JPEG>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_mscl CLK_ACLK_SMMU_JPEG>, + <&cmu_mscl CLK_PCLK_SMMU_JPEG>; #iommu-cells = <0>; power-domains = <&pd_mscl>; }; @@ -1289,9 +1289,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x15200000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_0>, - <&cmu_mfc CLK_ACLK_SMMU_MFC_0>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_mfc CLK_ACLK_SMMU_MFC_0>, + <&cmu_mfc CLK_PCLK_SMMU_MFC_0>; #iommu-cells = <0>; power-domains = <&pd_mfc>; }; @@ -1300,9 +1300,9 @@ compatible = "samsung,exynos-sysmmu"; reg = <0x15210000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; - clocks = <&cmu_mfc CLK_PCLK_SMMU_MFC_1>, - <&cmu_mfc CLK_ACLK_SMMU_MFC_1>; + clock-names = "aclk", "pclk"; + clocks = <&cmu_mfc CLK_ACLK_SMMU_MFC_1>, + <&cmu_mfc CLK_PCLK_SMMU_MFC_1>; #iommu-cells = <0>; power-domains = <&pd_mfc>; };