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([178.197.223.6]) by smtp.gmail.com with ESMTPSA id p31-20020a05600c1d9f00b00411a595d56bsm954051wms.14.2024.02.12.09.23.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Feb 2024 09:23:38 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 1/5] arm64: dts: sc8280xp: correct DMIC2 and DMIC3 pin config node names Date: Mon, 12 Feb 2024 18:23:31 +0100 Message-Id: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Correct the TLMM pin configuration and muxing node names used for DMIC2 and DMIC3 (dmic01 -> dmic23). This has no functional impact, but improves code readability and avoids any confusion when reading the DTS. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 2 +- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index def3976bd5bb..8f2e9bed0679 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -1202,7 +1202,7 @@ &usb_1_role_switch { }; &vamacro { - pinctrl-0 = <&dmic01_default>, <&dmic02_default>; + pinctrl-0 = <&dmic01_default>, <&dmic23_default>; pinctrl-names = "default"; vdd-micb-supply = <&vreg_s10b>; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index febf28356ff8..38351e8ea8b3 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -2978,7 +2978,7 @@ data-pins { }; }; - dmic02_default: dmic02-default-state { + dmic23_default: dmic23-default-state { clk-pins { pins = "gpio8"; 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([178.197.223.6]) by smtp.gmail.com with ESMTPSA id p31-20020a05600c1d9f00b00411a595d56bsm954051wms.14.2024.02.12.09.23.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Feb 2024 09:23:39 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 2/5] arm64: dts: sm8450: correct DMIC2 and DMIC3 pin config node names Date: Mon, 12 Feb 2024 18:23:32 +0100 Message-Id: <20240212172335.124845-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> References: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Correct the TLMM pin configuration and muxing node names used for DMIC2 and DMIC3 (dmic01 -> dmic23). This has no functional impact, but improves code readability and avoids any confusion when reading the DTS. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 2 +- arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index a20d5d76af35..5a6e0b34934c 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -1147,7 +1147,7 @@ &usb_1_qmpphy_usb_ss_in { }; &vamacro { - pinctrl-0 = <&dmic01_default>, <&dmic02_default>; + pinctrl-0 = <&dmic01_default>, <&dmic23_default>; pinctrl-names = "default"; vdd-micb-supply = <&vreg_s10b_1p8>; qcom,dmic-sample-rate = <600000>; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 01e4dfc4babd..0a802c9a3c8f 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3934,7 +3934,7 @@ data-pins { }; }; - dmic02_default: dmic02-default-state { + dmic23_default: dmic23-default-state { clk-pins { pins = "gpio8"; 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([178.197.223.6]) by smtp.gmail.com with ESMTPSA id p31-20020a05600c1d9f00b00411a595d56bsm954051wms.14.2024.02.12.09.23.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Feb 2024 09:23:40 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 3/5] arm64: dts: sm8550: correct DMIC2 and DMIC3 pin config node names Date: Mon, 12 Feb 2024 18:23:33 +0100 Message-Id: <20240212172335.124845-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> References: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Correct the TLMM pin configuration and muxing node names used for DMIC2 and DMIC3 (dmic01 -> dmic23). This has no functional impact, but improves code readability and avoids any confusion when reading the DTS. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index ee1ba5a8c8fc..a6663eefd3a3 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2507,7 +2507,7 @@ data-pins { }; }; - dmic02_default: dmic02-default-state { + dmic23_default: dmic23-default-state { clk-pins { pins = "gpio8"; function = "dmic2_clk"; From patchwork Mon Feb 12 17:23:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 772080 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 169F63F8DF for ; Mon, 12 Feb 2024 17:23:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707758625; cv=none; b=UBrwuyIpiuNRBwjHbyy795NdodTzakBHHoGPj2iHTHmFrBIRhLuzg9dN4qyzqFdCIe0GH/Da46HBV2+3dmGv4MD/gchFgkbKBMpr4nji2vJgORo9rzqfK2VmPYBRNsk9e/Mk5NqSBXPoCTN8KapNcN3OMe6j/7uB92zoNWBeOL8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707758625; c=relaxed/simple; bh=5XVzlYC+qpm9vGdb8/TYWQyQTGjbhbrC0Amkh6z50VU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=JFRggVlR1DXKT8Dxya21gGkSmzVAY002WBKzHaLt9KuW8ya/LOPF6gWKQGu6/CEnOu1Yycs+Cr7vcPpBu9LpgMG1cgvFygigst7XKbs3xUu8Tmp9et6g96giefTslL43pIeW+XMkiK7eq5f+UR9eP5kViUmWT3kG6hzihfxXt+4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=kac9hDJ/; arc=none smtp.client-ip=209.85.167.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="kac9hDJ/" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-51183b02564so1910874e87.0 for ; Mon, 12 Feb 2024 09:23:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707758622; x=1708363422; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0fSHFdK/uGFKm3kPfOsQzHS9AyIstJMyMVPPpye8zlY=; b=kac9hDJ/Et0NDaLcfxg7Uum/BQU/N7RwHpsfE+/VOXZRDsu/IcGj7Svh+CL/gNYRaT iTOswebjCmpxOl2g2D31jqmqp0lazCB8gTOX3zsgoxA+J7EtZEIkZQGCNPHOCRaKNx2H S96V0Fvz5D0RGP9GWT48HDrJ143aBAKivUWJAmEkx0T/wi/0JMr+GhMR/eVayFCdnH0G XjFegKEkw2N5Aye/2rBTtvkExrOV/oYVl3tjP+X4CEl3W+NOJSktWUdXBWwuZpkB48qP g2UCEb8FO+Y+PY1wBsUZq18S52S0hws+eS/wZ6lQ8KxoiaYCJ+OnPj/w6QNxhokZFMzF ycGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707758622; x=1708363422; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0fSHFdK/uGFKm3kPfOsQzHS9AyIstJMyMVPPpye8zlY=; b=KKDzOjCETU/5F3jxzuomEfKMnZlxxZXwSiY1reXYVZtRs4AY0OgX2YutGnK9vX2TB9 etP2p2mZM6EsGWG72hHHN/ccczj/uAp81EdDjc3FvbWvcYGLgCdb8ShgbF6/8ptPrRs5 sSRzhfrCryN7e7/cleRjPogZPYyiLtrAOwKMOwyJ8GFgdOL0Ce8wLPnkuac9OeDRwPL3 HX23zqse2LT2vrKyUoQcfTJjcMVpLeBP5l3RaPollLz6hxNKrG3rBJ5i7V6gMNvok7Kj SIafSSUwswJ/45anP7+U6df00slVLKJZ+lQrLSsWFNfarHUePMX7ndCsEzBGWZdIRSQU HsPw== X-Forwarded-Encrypted: i=1; AJvYcCX0zvc9rjHFCoInhVBR86io7GLk/8LJdSxAa7BJHGA0TP//Bz4XwSS8ej8OUwCaQeLLeNIvt6P/b+kiwNu6inRf0w1Sfd/nW3dDgIJU/Q== X-Gm-Message-State: AOJu0YyQYb0c3vF8PLbdvo2TuCNmiiGdWvsv525k7I9ePhbxXiixBv28 yH4nT2om+o4kC1updH+F0YWkGv/F+dkiuGC0mzqubWGrDZJl+PPRtPBYZTzn8pM= X-Google-Smtp-Source: AGHT+IE0sUmHQyQQkK1/rQlRNzHbB3VBeB867B7Ks71f9eyXB54QFH9TTVqRoOE2KMZ+8lFmxdKxhQ== X-Received: by 2002:a05:6512:3d11:b0:511:5237:a357 with SMTP id d17-20020a0565123d1100b005115237a357mr5822624lfv.48.1707758622125; Mon, 12 Feb 2024 09:23:42 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCWRszEkpoIzxDfw7vX3ftS/LysnMc+CzI1HkJ4tszLdWxQJU8/TWTuAmNwlB3xDfl+pdHzH2ljFAzRazfPqs1Rwl/onxhVKnOYTiHX8eDjLAtpCf13wDYZxpih+EVmngGphl5/Jf6oaQY+EUM7VwIDJlUQgOXHQUZPSyjri+u1qi7PRWGteeP59je7TKUuwcvStc9xEQD8SSS8eYmZBsfbbD4S2BSfgB4TMUBRDetiiCqaXQ1pEpsrEXKbgBmeDK2xNiDNI3jF2s2Fx Received: from krzk-bin.. ([178.197.223.6]) by smtp.gmail.com with ESMTPSA id p31-20020a05600c1d9f00b00411a595d56bsm954051wms.14.2024.02.12.09.23.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Feb 2024 09:23:41 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 4/5] arm64: dts: sm8650: correct DMIC2 and DMIC3 pin config node names Date: Mon, 12 Feb 2024 18:23:34 +0100 Message-Id: <20240212172335.124845-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> References: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Correct the TLMM pin configuration and muxing node names used for DMIC2 and DMIC3 (dmic01 -> dmic23). This has no functional impact, but improves code readability and avoids any confusion when reading the DTS. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 2df77123a8c7..27b3917c1327 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2919,7 +2919,7 @@ data-pins { }; }; - dmic02_default: dmic02-default-state { + dmic23_default: dmic23-default-state { clk-pins { pins = "gpio8"; function = "dmic2_clk"; From patchwork Mon Feb 12 17:23:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 772415 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACD9F3FB06 for ; Mon, 12 Feb 2024 17:23:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707758628; cv=none; b=esYeTFE6shYqQlMtaVDfxJrqrDTA0ySno29J7ZbMeVHYieguDNvQOxWXaQO/mTYGYyhxsAGug2XRqnm3+LaR698spMxrnigSyeHM+HVw/Apv37v7OIEL2yF9fzGhooDCYHHIUNo3BKf3TdfyJCeEOd2t28RXp8SCjt8ZdDuOf1E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1707758628; c=relaxed/simple; bh=y5v/GKRCDOtq0Cq7pd0as4nEJcazLe3h8zQVOd2huF4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Fjx+eOf+llUQ52icmsrQzgb7o/9xtAiII9m4JtkKDM+W4dLSdxPYBIME8SxoI6WKrFwdNfE5hxzSIPOy4H8I7AiSLi6uqusgj1MpkP9ByBLAqvLZOnCbs5bQurrtSddp47T+0OlBAw8U3jEM/C14tqRGMf3UNHPsRasls3W3Jyk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=LwGMujkn; arc=none smtp.client-ip=209.85.167.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="LwGMujkn" Received: by mail-lf1-f45.google.com with SMTP id 2adb3069b0e04-51165a488baso4524953e87.2 for ; Mon, 12 Feb 2024 09:23:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707758624; x=1708363424; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=edPAwyx6FoUzQLz6DUqB8wXwXw3VXUqF9Lsag+seSSI=; b=LwGMujknKmVpmql8GZqBm61TFP2JmTRObJmmhafJnnXyjLVfXhwELoakbJhTUQxsl+ 3V3YCVUUeCunghKsMmi31+J8EPj76xpS4fekMlZ9uaypBej+izOZKct7q1WK0fSJ9akZ niJjEpnK3e9uT3rLN0AXx53MfdGJOwkZYLir+0+T4kquxXAmPmu7wx1i9LKBdCs3eZXN ja7GCV21H/HT+GAT6Eb9sLAiTVyPvqKpcdtzO5oGkU6KlpYGU/ip8sCLkCfe8D9B6b4Q gbM178Wnu5XsBg0vg7T0UZWrPjowNmjzqA2Y9wOX3eqD3dNXv/YKi5ViemK4ulcgsyQe eXvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707758624; x=1708363424; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=edPAwyx6FoUzQLz6DUqB8wXwXw3VXUqF9Lsag+seSSI=; b=qjhGT2whreLJPIIlxuzPTFuWy5XFVwUyrV5E8X1w6wlilw0uwoPMsqG3vmkIqqy9op URFnGT+TfZGpTltgVaEZqj8sJiwHpg0NzPzxhUhHNkVB7uvfdOfcdy4ijpfFdrkQweW6 5fGOzA2tPtpbyQyJ70pjdPffiP6Vm5e7cPk4AZKws4sU1VBAMOl/XqtqFUBlsz0E1ZVB xbY4RrXRF4nd388FlVHyftA/CHfxyQaFyC4ocUXxVlJMLgKsixm1mSCi5clLRKCD0nkr 7M8tO5KRvBTrKrYep23OkUa6i+Iwu/3eV2aiISeg9XYwNz3pYHu4DskjDUX+g9vxJ58Q Q5OQ== X-Gm-Message-State: AOJu0Yzf34y6eW2oR1ysVIZ71pS5A0er1SH8XjeozOxxT1faPLJ4DcM9 AHfsGbnpi4DwogQsTqQ6zXfly9FQZcHZMCIn2JOlnNWTvNXvIgpTJkSJoF289cs= X-Google-Smtp-Source: AGHT+IFLWaPQ4RyK08FxgGLyqhlcfY8q2KEDh5YUUzAJ1CWTfElZsL29uVRtcKvEIE+3+eaWuPENhA== X-Received: by 2002:a05:6512:4892:b0:511:8cd7:e017 with SMTP id eq18-20020a056512489200b005118cd7e017mr2529367lfb.22.1707758623725; Mon, 12 Feb 2024 09:23:43 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCXgUSu6CMUVLubv89M2Q1F+0q62fsg4eMi90TSRlNR7pwwWWo5DnhlbGXnB8AsJCvBjEJuKTGLbeOpG/U1ZbqC2irftGpgPgPtmOdo7Nm77Bp46tzSRCLayj5GpVJsNOdRyvELhStXr0ypH6jAJ4ofClAABqCkbuazihmaGjy05wakNuicZ04pHrGZiDq6pEW0aCxoh/NBIIrOn92HFNF1Iy0LD+QoMD8hUjTRdb9fxGs6zjPkx1oMehJ5CVoi9GtO07jmq1UETxXSn Received: from krzk-bin.. ([178.197.223.6]) by smtp.gmail.com with ESMTPSA id p31-20020a05600c1d9f00b00411a595d56bsm954051wms.14.2024.02.12.09.23.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Feb 2024 09:23:43 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 5/5] arm64: dts: x1e80100: correct DMIC2 and DMIC3 pin config node names Date: Mon, 12 Feb 2024 18:23:35 +0100 Message-Id: <20240212172335.124845-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> References: <20240212172335.124845-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Correct the TLMM pin configuration and muxing node names used for DMIC2 and DMIC3 (dmic01 -> dmic23). This has no functional impact, but improves code readability and avoids any confusion when reading the DTS. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index c90c32f082d3..71cdc45db667 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -3483,7 +3483,7 @@ data-pins { }; }; - dmic02_default: dmic02-default-state { + dmic23_default: dmic23-default-state { clk-pins { pins = "gpio8"; function = "dmic2_clk";