From patchwork Wed Feb 21 18:31:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 774803 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8FDC8564D; Wed, 21 Feb 2024 18:34:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708540500; cv=none; b=sOZ2bI8sFvN57/w4CANbwm31jRNBEVUzFbAeMQwMu9LCNLB5CVRpEK4erHCqPdU+YyNmXAxM5iG2+XajbeB48xsDdGQf9M3A2HNtozMfUa754/CEbG+FT62pKyQXYOUaxhm+Oxdj7x0N81uE6/vF/YHnDXxBspQ0e15lfy9R9XM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708540500; c=relaxed/simple; bh=I4lO6MagkDaFdZKLWh5rqmLxpQuCDQmwf3i8KwokS+U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pCbPQZT+VL/ROtQCG7f9G94CWKAyJ+v8krYeEV5L930oY/fwvWStn2W2gKCg+eRA0lC42FlI9ASZM1CNUzS1BJY17pUjLYSuhSiNEvWMyq8eM2ytL4bDUMULICQuh5dwWm3785bcYjtlLiB1lrQHTJAYixiloUHBQSdjm7PrrqY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=K1C5Ay0C; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="K1C5Ay0C" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708540499; x=1740076499; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=I4lO6MagkDaFdZKLWh5rqmLxpQuCDQmwf3i8KwokS+U=; b=K1C5Ay0CBtO3If/MXpF0MNUzm3A/coy+m5HOiloBHNadC9w8DMf2YYBw 3XciZn7Dqsnrt4J4ebl6yLsm6+d0/lWkMPy+gPV4dpbKexCoRcVencs4Y UoFg/9VI1DbBa/CRyxYrlhTk0lvDZ1fI48yVCcHrsfGS5JYp8qfQH0q7n dTOtizXmEEWvFcym4+Hc0zdMv6YR9anoJBSgF9j1bCRRpdVQpery4C6zP YC8HnobtZjZFju+u0OxSPDT7sWH9ZCnuhN6xxyGSfanDdYjayfuzRK+vI 9tq2NORBWlcY7xSqvXeOQSIFU2ZjEAH3Bz4GnBugEhOn+OnCuUNr0RR5N A==; X-IronPort-AV: E=McAfee;i="6600,9927,10991"; a="28164725" X-IronPort-AV: E=Sophos;i="6.06,176,1705392000"; d="scan'208";a="28164725" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Feb 2024 10:34:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10991"; a="936684741" X-IronPort-AV: E=Sophos;i="6.06,176,1705392000"; d="scan'208";a="936684741" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 21 Feb 2024 10:34:47 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id DB5503D3; Wed, 21 Feb 2024 20:34:46 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Andy Shevchenko , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Jiri Slaby , Joel Stanley , Andrew Jeffery , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Al Cooper , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Paul Cercueil , Vladimir Zapolskiy , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu Subject: [PATCH v1 03/14] serial: port: Introduce a common helper to read properties Date: Wed, 21 Feb 2024 20:31:19 +0200 Message-ID: <20240221183442.4124354-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> References: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Several serial drivers want to read the same or similar set of the port properties. Make a common helper for them. Signed-off-by: Andy Shevchenko --- drivers/tty/serial/serial_port.c | 135 +++++++++++++++++++++++++++++++ include/linux/serial_core.h | 1 + 2 files changed, 136 insertions(+) diff --git a/drivers/tty/serial/serial_port.c b/drivers/tty/serial/serial_port.c index 88975a4df306..111e1f25fbc6 100644 --- a/drivers/tty/serial/serial_port.c +++ b/drivers/tty/serial/serial_port.c @@ -8,7 +8,10 @@ #include #include +#include +#include #include +#include #include #include @@ -82,6 +85,138 @@ void uart_remove_one_port(struct uart_driver *drv, struct uart_port *port) } EXPORT_SYMBOL(uart_remove_one_port); +/** + * uart_read_port_properties - read firmware properties of the given UART port + * @port: corresponding port + * @use_defaults: apply defaults or validate the values + * + * The following device properties are supported: + * - clock-frequency (optional) + * - fifo-size (optional) + * - no-loopback-test (optional) + * - reg-shift (defaults may apply) + * - reg-offset (value may be validated) + * - reg-io-width (defaults may apply or value may be validated) + * - interrupts (OF only) + * - serial [alias ID] (OF only) + * + * If the port->dev is of struct platform_device type the interrupt line + * will be retrieved via platform_get_irq() call against that device. + * Otherwise it will be assigned by fwnode_irq_get() call. In both cases + * the index 0 of the resource is used. + * + * The caller is responsible to initialize the following fields of the @port + * ->dev (must be valid) + * ->flags + * ->iotype (if @use_defaults is false) + * ->mapbase + * ->mapsize + * ->regshift (if @use_defaults is false) + * before calling this function. Alternatively the above mentioned fields + * may be zeroed, in such case the only ones, that have associated properties + * found, will be set to the respective values. + * + * When @use_defaults is true and the respective property is not found + * the following values will be applied: + * ->iotype = UPIO_MEM + * ->regshift = 0 + * In this case IRQ must be provided, otherwise an error will be returned. + * + * The ->irq, ->mapbase, ->mapsize are always altered if no error happened. + * + * When @use_defaults is false and the respective property is found + * the following values will be validated: + * - reg-io-width (->iotype) + * - reg-offset (->mapsize against ->mapbase) + * + * Returns: 0 on success or negative errno on failure + */ +int uart_read_port_properties(struct uart_port *port, bool use_defaults) +{ + struct device *dev = port->dev; + u32 value; + int ret; + + /* Read optional UART functional clock frequency */ + device_property_read_u32(dev, "clock-frequency", &port->uartclk); + + /* Read the registers alignment (default: 8-bit) */ + ret = device_property_read_u32(dev, "reg-shift", &value); + if (ret) + port->regshift = use_defaults ? 0 : port->regshift; + else + port->regshift = value; + + /* Read the registers I/O access type (default: MMIO 8-bit) */ + ret = device_property_read_u32(dev, "reg-io-width", &value); + if (ret) { + port->iotype = use_defaults ? UPIO_MEM : port->iotype; + } else { + switch (value) { + case 1: + port->iotype = UPIO_MEM; + break; + case 2: + port->iotype = UPIO_MEM16; + break; + case 4: + port->iotype = device_is_big_endian(dev) ? UPIO_MEM32BE : UPIO_MEM32; + break; + default: + if (!use_defaults) { + dev_err(dev, "Unsupported reg-io-width (%u)\n", value); + return -EINVAL; + } + port->iotype = UPIO_UNSET; + break; + } + } + + /* Read the address mapping base offset (default: no offset) */ + ret = device_property_read_u32(dev, "reg-offset", &value); + if (ret) + value = 0; + + /* Check for shifted address mapping overflow */ + if (!use_defaults && port->mapsize < value) { + dev_err(dev, "reg-offset %u exceeds region size %pa\n", value, &port->mapsize); + return -EINVAL; + } + + port->mapbase += value; + port->mapsize -= value; + + /* Read optional FIFO size */ + device_property_read_u32(dev, "fifo-size", &port->fifosize); + + if (device_property_read_bool(dev, "no-loopback-test")) + port->flags |= UPF_SKIP_TEST; + + /* Get index of serial line, if found in DT aliases */ + ret = of_alias_get_id(dev_of_node(dev), "serial"); + if (ret >= 0) + port->line = ret; + + if (dev_is_platform(dev)) + ret = platform_get_irq(to_platform_device(dev), 0); + else + ret = fwnode_irq_get(dev_fwnode(dev), 0); + if (ret == -EPROBE_DEFER) + return ret; + if (ret > 0) + port->irq = ret; + else if (use_defaults) + /* By default IRQ support is mandatory */ + return ret; + else + port->irq = 0; + + port->flags |= UPF_SHARE_IRQ; + + return 0; +} +EXPORT_SYMBOL(uart_read_port_properties); + static struct device_driver serial_port_driver = { .name = "port", .suppress_bind_attrs = true, diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 2b0526ae1fac..c93d775fc8a8 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -962,6 +962,7 @@ int uart_register_driver(struct uart_driver *uart); void uart_unregister_driver(struct uart_driver *uart); int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); void uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); +int uart_read_port_properties(struct uart_port *port, bool use_defaults); bool uart_match_port(const struct uart_port *port1, const struct uart_port *port2); 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Wed, 21 Feb 2024 20:34:46 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Andy Shevchenko , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Jiri Slaby , Joel Stanley , Andrew Jeffery , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Al Cooper , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Paul Cercueil , Vladimir Zapolskiy , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu , Andi Shyti Subject: [PATCH v1 04/14] serial: 8250_aspeed_vuart: Switch to use uart_read_port_properties() Date: Wed, 21 Feb 2024 20:31:20 +0200 Message-ID: <20240221183442.4124354-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> References: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since we have now a common helper to read port properties use it instead of sparse home grown solution. Reviewed-by: Andi Shyti Signed-off-by: Andy Shevchenko Reviewed-by: Andrew Jeffery --- drivers/tty/serial/8250/8250_aspeed_vuart.c | 50 +++++++-------------- 1 file changed, 15 insertions(+), 35 deletions(-) diff --git a/drivers/tty/serial/8250/8250_aspeed_vuart.c b/drivers/tty/serial/8250/8250_aspeed_vuart.c index 8c2aaf7af7b7..2a4bc39b11af 100644 --- a/drivers/tty/serial/8250/8250_aspeed_vuart.c +++ b/drivers/tty/serial/8250/8250_aspeed_vuart.c @@ -419,8 +419,8 @@ static int aspeed_vuart_probe(struct platform_device *pdev) struct aspeed_vuart *vuart; struct device_node *np; struct resource *res; - u32 clk, prop, sirq[2]; int rc, sirq_polarity; + u32 prop, sirq[2]; struct clk *vclk; np = pdev->dev.of_node; @@ -447,53 +447,35 @@ static int aspeed_vuart_probe(struct platform_device *pdev) port.port.status = UPSTAT_SYNC_FIFO; port.port.dev = &pdev->dev; port.port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); + port.port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_FIXED_PORT | UPF_FIXED_TYPE | + UPF_NO_THRE_TEST; port.bugs |= UART_BUG_TXRACE; rc = sysfs_create_group(&vuart->dev->kobj, &aspeed_vuart_attr_group); if (rc < 0) return rc; - if (of_property_read_u32(np, "clock-frequency", &clk)) { + rc = uart_read_port_properties(&port.port, true); + if (rc) + goto err_sysfs_remove; + + /* Get clk rate through clk driver if present */ + if (!port.port.uartclk) { vclk = devm_clk_get_enabled(dev, NULL); if (IS_ERR(vclk)) { rc = dev_err_probe(dev, PTR_ERR(vclk), "clk or clock-frequency not defined\n"); goto err_sysfs_remove; } - clk = clk_get_rate(vclk); + port.port.uartclk = clk_get_rate(vclk); } /* If current-speed was set, then try not to change it. */ if (of_property_read_u32(np, "current-speed", &prop) == 0) - port.port.custom_divisor = clk / (16 * prop); + port.port.custom_divisor = port.port.uartclk / (16 * prop); - /* Check for shifted address mapping */ - if (of_property_read_u32(np, "reg-offset", &prop) == 0) - port.port.mapbase += prop; - - /* Check for registers offset within the devices address range */ - if (of_property_read_u32(np, "reg-shift", &prop) == 0) - port.port.regshift = prop; - - /* Check for fifo size */ - if (of_property_read_u32(np, "fifo-size", &prop) == 0) - port.port.fifosize = prop; - - /* Check for a fixed line number */ - rc = of_alias_get_id(np, "serial"); - if (rc >= 0) - port.port.line = rc; - - port.port.irq = irq_of_parse_and_map(np, 0); port.port.handle_irq = aspeed_vuart_handle_irq; - port.port.iotype = UPIO_MEM; port.port.type = PORT_ASPEED_VUART; - port.port.uartclk = clk; - port.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP - | UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_NO_THRE_TEST; - - if (of_property_read_bool(np, "no-loopback-test")) - port.port.flags |= UPF_SKIP_TEST; if (port.port.fifosize) port.capabilities = UART_CAP_FIFO; @@ -503,7 +485,7 @@ static int aspeed_vuart_probe(struct platform_device *pdev) rc = serial8250_register_8250_port(&port); if (rc < 0) - goto err_clk_disable; + goto err_sysfs_remove; vuart->line = rc; vuart->port = serial8250_get_port(vuart->line); @@ -529,7 +511,7 @@ static int aspeed_vuart_probe(struct platform_device *pdev) rc = aspeed_vuart_set_lpc_address(vuart, prop); if (rc < 0) { dev_err_probe(dev, rc, "invalid value in aspeed,lpc-io-reg property\n"); - goto err_clk_disable; + goto err_sysfs_remove; } rc = of_property_read_u32_array(np, "aspeed,lpc-interrupts", sirq, 2); @@ -541,14 +523,14 @@ static int aspeed_vuart_probe(struct platform_device *pdev) rc = aspeed_vuart_set_sirq(vuart, sirq[0]); if (rc < 0) { dev_err_probe(dev, rc, "invalid sirq number in aspeed,lpc-interrupts property\n"); - goto err_clk_disable; + goto err_sysfs_remove; } sirq_polarity = aspeed_vuart_map_irq_polarity(sirq[1]); if (sirq_polarity < 0) { rc = dev_err_probe(dev, sirq_polarity, "invalid sirq polarity in aspeed,lpc-interrupts property\n"); - goto err_clk_disable; + goto err_sysfs_remove; } aspeed_vuart_set_sirq_polarity(vuart, sirq_polarity); @@ -559,8 +541,6 @@ static int aspeed_vuart_probe(struct platform_device *pdev) return 0; -err_clk_disable: - irq_dispose_mapping(port.port.irq); err_sysfs_remove: sysfs_remove_group(&vuart->dev->kobj, &aspeed_vuart_attr_group); return rc; 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Wed, 21 Feb 2024 20:34:46 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Andy Shevchenko , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Jiri Slaby , Joel Stanley , Andrew Jeffery , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Al Cooper , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Paul Cercueil , Vladimir Zapolskiy , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu Subject: [PATCH v1 05/14] serial: 8250_bcm2835aux: Switch to use uart_read_port_properties() Date: Wed, 21 Feb 2024 20:31:21 +0200 Message-ID: <20240221183442.4124354-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> References: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since we have now a common helper to read port properties use it instead of sparse home grown solution. Signed-off-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_bcm2835aux.c | 92 +++++++++++------------ 1 file changed, 42 insertions(+), 50 deletions(-) diff --git a/drivers/tty/serial/8250/8250_bcm2835aux.c b/drivers/tty/serial/8250/8250_bcm2835aux.c index beac6b340ace..69c3c5ca77f7 100644 --- a/drivers/tty/serial/8250/8250_bcm2835aux.c +++ b/drivers/tty/serial/8250/8250_bcm2835aux.c @@ -45,10 +45,6 @@ struct bcm2835aux_data { u32 cntl; }; -struct bcm2835_aux_serial_driver_data { - resource_size_t offset; -}; - static void bcm2835aux_rs485_start_tx(struct uart_8250_port *up) { if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) { @@ -85,10 +81,9 @@ static void bcm2835aux_rs485_stop_tx(struct uart_8250_port *up) static int bcm2835aux_serial_probe(struct platform_device *pdev) { - const struct bcm2835_aux_serial_driver_data *bcm_data; + const struct software_node *bcm2835_swnode; struct uart_8250_port up = { }; struct bcm2835aux_data *data; - resource_size_t offset = 0; struct resource *res; unsigned int uartclk; int ret; @@ -101,12 +96,8 @@ static int bcm2835aux_serial_probe(struct platform_device *pdev) /* initialize data */ up.capabilities = UART_CAP_FIFO | UART_CAP_MINI; up.port.dev = &pdev->dev; - up.port.regshift = 2; up.port.type = PORT_16550; - up.port.iotype = UPIO_MEM; - up.port.fifosize = 8; - up.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE | - UPF_SKIP_TEST | UPF_IOREMAP; + up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_SKIP_TEST | UPF_IOREMAP; up.port.rs485_config = serial8250_em485_config; up.port.rs485_supported = serial8250_em485_supported; up.rs485_start_tx = bcm2835aux_rs485_start_tx; @@ -122,12 +113,6 @@ static int bcm2835aux_serial_probe(struct platform_device *pdev) if (IS_ERR(data->clk)) return dev_err_probe(&pdev->dev, PTR_ERR(data->clk), "could not get clk\n"); - /* get the interrupt */ - ret = platform_get_irq(pdev, 0); - if (ret < 0) - return ret; - up.port.irq = ret; - /* map the main registers */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { @@ -135,52 +120,40 @@ static int bcm2835aux_serial_probe(struct platform_device *pdev) return -EINVAL; } - bcm_data = device_get_match_data(&pdev->dev); + up.port.mapbase = res->start; + up.port.mapsize = resource_size(res); - /* Some UEFI implementations (e.g. tianocore/edk2 for the Raspberry Pi) - * describe the miniuart with a base address that encompasses the auxiliary - * registers shared between the miniuart and spi. - * - * This is due to historical reasons, see discussion here : - * https://edk2.groups.io/g/devel/topic/87501357#84349 - * - * We need to add the offset between the miniuart and auxiliary - * registers to get the real miniuart base address. - */ - if (bcm_data) - offset = bcm_data->offset; + bcm2835_swnode = device_get_match_data(&pdev->dev); + if (bcm2835_swnode) { + ret = device_add_software_node(&pdev->dev, bcm2835_swnode); + if (ret) + return ret; + } - up.port.mapbase = res->start + offset; - up.port.mapsize = resource_size(res) - offset; + ret = uart_read_port_properties(&up.port, true); + if (ret) + goto rm_swnode; - /* Check for a fixed line number */ - ret = of_alias_get_id(pdev->dev.of_node, "serial"); - if (ret >= 0) - up.port.line = ret; + up.port.regshift = 2; + up.port.fifosize = 8; /* enable the clock as a last step */ ret = clk_prepare_enable(data->clk); if (ret) { - dev_err(&pdev->dev, "unable to enable uart clock - %d\n", - ret); - return ret; + dev_err_probe(&pdev->dev, ret, "unable to enable uart clock\n"); + goto rm_swnode; } uartclk = clk_get_rate(data->clk); - if (!uartclk) { - ret = device_property_read_u32(&pdev->dev, "clock-frequency", &uartclk); - if (ret) { - dev_err_probe(&pdev->dev, ret, "could not get clk rate\n"); - goto dis_clk; - } - } + if (uartclk) + up.port.uartclk = uartclk; /* the HW-clock divider for bcm2835aux is 8, * but 8250 expects a divider of 16, * so we have to multiply the actual clock by 2 * to get identical baudrates. */ - up.port.uartclk = uartclk * 2; + up.port.uartclk *= 2; /* register the port */ ret = serial8250_register_8250_port(&up); @@ -194,6 +167,8 @@ static int bcm2835aux_serial_probe(struct platform_device *pdev) dis_clk: clk_disable_unprepare(data->clk); +rm_swnode: + device_remove_software_node(&pdev->dev); return ret; } @@ -203,10 +178,27 @@ static void bcm2835aux_serial_remove(struct platform_device *pdev) serial8250_unregister_port(data->line); clk_disable_unprepare(data->clk); + device_remove_software_node(&pdev->dev); } -static const struct bcm2835_aux_serial_driver_data bcm2835_acpi_data = { - .offset = 0x40, +/* + * Some UEFI implementations (e.g. tianocore/edk2 for the Raspberry Pi) + * describe the miniuart with a base address that encompasses the auxiliary + * registers shared between the miniuart and spi. + * + * This is due to historical reasons, see discussion here: + * https://edk2.groups.io/g/devel/topic/87501357#84349 + * + * We need to add the offset between the miniuart and auxiliary registers + * to get the real miniuart base address. + */ +static const struct property_entry bcm2835_acpi_properties[] = { + PROPERTY_ENTRY_U32("reg-offset", 0x40), + { } +}; + +static const struct software_node bcm2835_acpi_node = { + .properties = bcm2835_acpi_properties, }; static const struct of_device_id bcm2835aux_serial_match[] = { @@ -216,7 +208,7 @@ static const struct of_device_id bcm2835aux_serial_match[] = { MODULE_DEVICE_TABLE(of, bcm2835aux_serial_match); static const struct acpi_device_id bcm2835aux_serial_acpi_match[] = { - { "BCM2836", (kernel_ulong_t)&bcm2835_acpi_data }, + { "BCM2836", (kernel_ulong_t)&bcm2835_acpi_node }, { } }; MODULE_DEVICE_TABLE(acpi, bcm2835aux_serial_acpi_match); From patchwork Wed Feb 21 18:31:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 774802 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 438B48663E; Wed, 21 Feb 2024 18:35:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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d="scan'208";a="28164755" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Feb 2024 10:35:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10991"; a="936684750" X-IronPort-AV: E=Sophos;i="6.06,176,1705392000"; d="scan'208";a="936684750" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 21 Feb 2024 10:34:55 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1A0CF49C; Wed, 21 Feb 2024 20:34:47 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Andy Shevchenko , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Jiri Slaby , Joel Stanley , Andrew Jeffery , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Al Cooper , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Paul Cercueil , Vladimir Zapolskiy , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu Subject: [PATCH v1 06/14] serial: 8250_bcm7271: Switch to use uart_read_port_properties() Date: Wed, 21 Feb 2024 20:31:22 +0200 Message-ID: <20240221183442.4124354-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> References: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since we have now a common helper to read port properties use it instead of sparse home grown solution. Signed-off-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_bcm7271.c | 53 +++++++++----------------- 1 file changed, 18 insertions(+), 35 deletions(-) diff --git a/drivers/tty/serial/8250/8250_bcm7271.c b/drivers/tty/serial/8250/8250_bcm7271.c index 1532fa2e8ec4..5a25e78857f7 100644 --- a/drivers/tty/serial/8250/8250_bcm7271.c +++ b/drivers/tty/serial/8250/8250_bcm7271.c @@ -942,10 +942,8 @@ static int brcmuart_probe(struct platform_device *pdev) struct brcmuart_priv *priv; struct clk *baud_mux_clk; struct uart_8250_port up; - int irq; void __iomem *membase = NULL; resource_size_t mapbase = 0; - u32 clk_rate = 0; int ret; int x; int dma_irq; @@ -953,9 +951,6 @@ static int brcmuart_probe(struct platform_device *pdev) "uart", "dma_rx", "dma_tx", "dma_intr2", "dma_arb" }; - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; priv = devm_kzalloc(dev, sizeof(struct brcmuart_priv), GFP_KERNEL); if (!priv) @@ -1011,7 +1006,23 @@ static int brcmuart_probe(struct platform_device *pdev) } } - of_property_read_u32(np, "clock-frequency", &clk_rate); + dev_dbg(dev, "DMA is %senabled\n", priv->dma_enabled ? "" : "not "); + + memset(&up, 0, sizeof(up)); + up.port.type = PORT_BCM7271; + up.port.dev = dev; + up.port.mapbase = mapbase; + up.port.membase = membase; + up.port.handle_irq = brcmuart_handle_irq; + up.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE; + up.port.private_data = priv; + + ret = uart_read_port_properties(&up.port, true); + if (ret) + goto release_dma; + + up.port.regshift = 2; + up.port.iotype = device_is_big_endian(dev) ? UPIO_MEM32BE : UPIO_MEM32; /* See if a Baud clock has been specified */ baud_mux_clk = devm_clk_get_optional_enabled(dev, "sw_baud"); @@ -1023,39 +1034,11 @@ static int brcmuart_probe(struct platform_device *pdev) priv->baud_mux_clk = baud_mux_clk; init_real_clk_rates(dev, priv); - clk_rate = priv->default_mux_rate; + up.port.uartclk = priv->default_mux_rate; } else { dev_dbg(dev, "BAUD MUX clock not specified\n"); } - if (clk_rate == 0) { - ret = dev_err_probe(dev, -EINVAL, "clock-frequency or clk not defined\n"); - goto release_dma; - } - - dev_dbg(dev, "DMA is %senabled\n", priv->dma_enabled ? "" : "not "); - - memset(&up, 0, sizeof(up)); - up.port.type = PORT_BCM7271; - up.port.uartclk = clk_rate; - up.port.dev = dev; - up.port.mapbase = mapbase; - up.port.membase = membase; - up.port.irq = irq; - up.port.handle_irq = brcmuart_handle_irq; - up.port.regshift = 2; - up.port.iotype = of_device_is_big_endian(np) ? - UPIO_MEM32BE : UPIO_MEM32; - up.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF - | UPF_FIXED_PORT | UPF_FIXED_TYPE; - up.port.dev = dev; - up.port.private_data = priv; - - /* Check for a fixed line number */ - ret = of_alias_get_id(np, "serial"); - if (ret >= 0) - up.port.line = ret; - /* setup HR timer */ hrtimer_init(&priv->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); priv->hrt.function = brcmuart_hrtimer_func; From patchwork Wed Feb 21 18:31:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 774798 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31215127B64; 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Signed-off-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_lpc18xx.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/tty/serial/8250/8250_lpc18xx.c b/drivers/tty/serial/8250/8250_lpc18xx.c index 8d728a6a5991..e4a6b7b4caf2 100644 --- a/drivers/tty/serial/8250/8250_lpc18xx.c +++ b/drivers/tty/serial/8250/8250_lpc18xx.c @@ -92,11 +92,7 @@ static int lpc18xx_serial_probe(struct platform_device *pdev) struct lpc18xx_uart_data *data; struct uart_8250_port uart; struct resource *res; - int irq, ret; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; + int ret; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { @@ -139,19 +135,12 @@ static int lpc18xx_serial_probe(struct platform_device *pdev) goto dis_clk_reg; } - ret = of_alias_get_id(pdev->dev.of_node, "serial"); - if (ret >= 0) - uart.port.line = ret; - data->dma.rx_param = data; data->dma.tx_param = data; spin_lock_init(&uart.port.lock); uart.port.dev = &pdev->dev; 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Signed-off-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_omap.c | 29 ++++++++++------------------- 1 file changed, 10 insertions(+), 19 deletions(-) diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c index 6942990a333c..173af575a43e 100644 --- a/drivers/tty/serial/8250/8250_omap.c +++ b/drivers/tty/serial/8250/8250_omap.c @@ -1394,11 +1394,7 @@ static int omap8250_probe(struct platform_device *pdev) struct uart_8250_port up; struct resource *regs; void __iomem *membase; - int irq, ret; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; + int ret; regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!regs) { @@ -1419,7 +1415,6 @@ static int omap8250_probe(struct platform_device *pdev) up.port.dev = &pdev->dev; up.port.mapbase = regs->start; up.port.membase = membase; - up.port.irq = irq; /* * It claims to be 16C750 compatible however it is a little different. * It has EFR and has no FCR7_64byte bit. The AFE (which it claims to @@ -1429,13 +1424,9 @@ static int omap8250_probe(struct platform_device *pdev) * or pm callback. */ up.port.type = PORT_8250; - up.port.iotype = UPIO_MEM; - up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_SOFT_FLOW | - UPF_HARD_FLOW; + up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_SOFT_FLOW | UPF_HARD_FLOW; up.port.private_data = priv; - up.port.regshift = OMAP_UART_REGSHIFT; - up.port.fifosize = 64; up.tx_loadsz = 64; up.capabilities = UART_CAP_FIFO; #ifdef CONFIG_PM @@ -1461,14 +1452,14 @@ static int omap8250_probe(struct platform_device *pdev) up.rs485_stop_tx = serial8250_em485_stop_tx; up.port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); - ret = of_alias_get_id(np, "serial"); - if (ret < 0) { - dev_err(&pdev->dev, "failed to get alias\n"); + ret = uart_read_port_properties(&up.port, true); + if (ret) return ret; - } - up.port.line = ret; - if (of_property_read_u32(np, "clock-frequency", &up.port.uartclk)) { + up.port.regshift = OMAP_UART_REGSHIFT; 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21 Feb 2024 10:35:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10991"; a="936684757" X-IronPort-AV: E=Sophos;i="6.06,176,1705392000"; d="scan'208";a="936684757" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 21 Feb 2024 10:34:55 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 6A910898; Wed, 21 Feb 2024 20:34:47 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Andy Shevchenko , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Jiri Slaby , Joel Stanley , Andrew Jeffery , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list , Al Cooper , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Paul Cercueil , Vladimir Zapolskiy , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu Subject: [PATCH v1 12/14] serial: 8250_pxa: Switch to use uart_read_port_properties() Date: Wed, 21 Feb 2024 20:31:28 +0200 Message-ID: <20240221183442.4124354-13-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> References: <20240221183442.4124354-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Since we have now a common helper to read port properties use it instead of sparse home grown solution. Signed-off-by: Andy Shevchenko --- drivers/tty/serial/8250/8250_pxa.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/drivers/tty/serial/8250/8250_pxa.c b/drivers/tty/serial/8250/8250_pxa.c index 77686da42ce8..0c9140b93414 100644 --- a/drivers/tty/serial/8250/8250_pxa.c +++ b/drivers/tty/serial/8250/8250_pxa.c @@ -92,11 +92,7 @@ static int serial_pxa_probe(struct platform_device *pdev) struct uart_8250_port uart = {}; struct pxa8250_data *data; struct resource *mmres; - int irq, ret; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; + int ret; mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!mmres) @@ -114,21 +110,21 @@ static int serial_pxa_probe(struct platform_device *pdev) if (ret) return ret; - ret = of_alias_get_id(pdev->dev.of_node, "serial"); - if (ret >= 0) - uart.port.line = ret; - uart.port.type = PORT_XSCALE; - uart.port.iotype = UPIO_MEM32; uart.port.mapbase = mmres->start; - uart.port.regshift = 2; - uart.port.irq = irq; - uart.port.fifosize = 64; uart.port.flags = UPF_IOREMAP | UPF_SKIP_TEST | UPF_FIXED_TYPE; uart.port.dev = &pdev->dev; uart.port.uartclk = clk_get_rate(data->clk); uart.port.pm = serial_pxa_pm; uart.port.private_data = data; + + ret = uart_read_port_properties(&uart.port, true); + if (ret) + return ret; + + uart.port.iotype = UPIO_MEM32; + uart.port.regshift = 2; + uart.port.fifosize = 64; uart.dl_write = serial_pxa_dl_write; ret = serial8250_register_8250_port(&uart);