From patchwork Thu Sep 26 16:25:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174489 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2295112ill; Thu, 26 Sep 2019 09:39:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqxI5Ev6H5rLeKlTOX/YVk5NvjL2W8uS1hFweijIlSEkDHFFzf+0lrKsYaWTSGWEfKv7ONQI X-Received: by 2002:aed:30ce:: with SMTP id 72mr4740771qtf.27.1569515955675; Thu, 26 Sep 2019 09:39:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569515955; cv=none; d=google.com; s=arc-20160816; b=kb/n0azV6gPsRHlxk7ys83Qtwaj6I55SPWmBnFjKrYMbQTYuxxnF2C3hrOfGIBcJr+ WMv0XJlo8jW7DpqPD/P5HSyyDNkRYehCnh3Ut6MrRlVoNiYFo9Y4UcUFFzonhBfNV4MR HCxi28p9UXKG4i/c+u0GI18cPq0X7S0GvcpIxLo6aAa3h95UkGTEvuWysQokUgtq9J5H VKjj7ahrElMAv9SBUmWFQE4qKP25NnzIq2I0+G6aQanqXQQ4u5/y2q9bXTfhu8rcEKV5 GGDi9HT7DrDm874KEx9l8E7G1ypzT3uf6ZULLYdifbZKS/42m/BEcWIYORPFsdFpOGH5 n1zg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=m0A5hOzZEJmS1c+sxnHnolxCjQzyN94AtrGRUtBbpGQ=; b=o16KGJFxrsniyKqLoiD3XTEEoFWyn+gk2NdFRKjRUG2AOYoz4O5UKYaw/6+rSp51Ox 6SPWbECiTQ8RcCFKMUmp0qxViYKDHVyVaZeZ3ej6f4DHees6VrNLUvN4JTUcOPyPQhIe Up7HSAQQ/KJ6061iBa7T/ZrxawPd/4SuftLLFmz63uUgcBKiWLLhNshvq5+MOYcGVoZX wQsW4jTfj2mapKnlhzgorQXCVFBVl694xpc29DgIHjkioptpYSCTzk4pU9QIQL5n+UN/ jAbKnr5fOaJuh0Vk3OhPoMfQkPz4yU1z7B9Aq50ZickC0SFUBQ3/06C9MGr8b/RJ2lp+ jC6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=sglKhyY6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id b195si2042193qkg.260.2019.09.26.09.39.15 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:39:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=sglKhyY6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40850 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWnS-0005iR-Fv for patch@linaro.org; Thu, 26 Sep 2019 12:39:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41080) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWc2-0002XO-H3 for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWbz-0004c4-BJ for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:25 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:44342) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWbz-0004aX-6R for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:23 -0400 Received: by mail-pf1-f196.google.com with SMTP id q21so2103154pfn.11 for ; Thu, 26 Sep 2019 09:27:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=m0A5hOzZEJmS1c+sxnHnolxCjQzyN94AtrGRUtBbpGQ=; b=sglKhyY6pcUvb3rcImY9EopmQ7xuhFcLjIxOGbccP9Rt1kpFKwah1P+fUQTu0L82qo d6fxq/o6p0DCYLenuB3i6FLaWLuHZ2jcnt2h6nG1Jn6V0R5HMUy6UJN+puw/F9hUHIAL gzHlBP4kavlioLAWJrFVv9uUNCuHDb6EGYUeQNW3bTx8DVwib7/l1+FXkTl+lhMnH+Cr BUfzZ+W5q0SV4IwKwiuVG3oZbVjiDx235b2Az+zGeiD6vTIE7Ib+gA48XhIEk/HMfZqg GffaC9Pvum9A/dm0Z9dOjGREZMuPf12wLff3Kiv5dUNirKXkLKDiBjoUfrVwmEWdMxY5 PL+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=m0A5hOzZEJmS1c+sxnHnolxCjQzyN94AtrGRUtBbpGQ=; b=P+J7OybrmgFza1WRIfSM6VaPDzFG1XoGgIGKHpSbxRoKbLper3IuyTbsSQ7/bQfZIN 8n7tfVFRhKbrT0qIO60bGuy9KSEdhvsfme/jlQpXbZ65PjLECMybKR8LrlCFtKHkpTBw HMGZHNfCzpchDj2T7OkOUn4qyCDadDdXg+LEhpFAzS1+THBu0d5u8diIbtZbLHP/SPzR h5UZVfkzPNrZ2husJpNnKQuTh4kr3q6GwG5uUt4FeF5ppAS5/4nqA/4lJ8bdzGaVACBJ GKWBsqZrVEmM/MCJdGj2qo4GgLXXCbpeWvEnOT2ArrEmHPO7pKN3YfpJYnu6v/a8GVbi +rOQ== X-Gm-Message-State: APjAAAWIAXnXoKpcwpa4z1Znww2qQXpBHPf5exwgwLd37f+eP2gN0x1+ 6cfh4jnzv+oMMFylvAt8/K3Tn8DXHZU= X-Received: by 2002:a17:90a:a404:: with SMTP id y4mr4537383pjp.62.1569515179760; Thu, 26 Sep 2019 09:26:19 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 01/18] target/s390x: Truncate 32-bit psw_addr before creating TB Date: Thu, 26 Sep 2019 09:25:58 -0700 Message-Id: <20190926162615.31168-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.210.196 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" If, somehow, the psw_addr is out of range, truncate early rather than after we get into gen_intermediate_code. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 26 +++++++++++++++++++------- target/s390x/translate.c | 6 ------ 2 files changed, 19 insertions(+), 13 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index e74a809257..ce20dafd23 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -357,18 +357,30 @@ static inline int cpu_mmu_index(CPUS390XState *env, bool ifetch) #endif } -static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc, - target_ulong *cs_base, uint32_t *flags) +static inline void cpu_get_tb_cpu_state(CPUS390XState* env, + target_ulong *p_pc, + target_ulong *cs_base, + uint32_t *p_flags) { - *pc = env->psw.addr; - *cs_base = env->ex_value; - *flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; + uint32_t flags; + uint64_t pc; + + flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; if (env->cregs[0] & CR0_AFP) { - *flags |= FLAG_MASK_AFP; + flags |= FLAG_MASK_AFP; } if (env->cregs[0] & CR0_VECTOR) { - *flags |= FLAG_MASK_VECTOR; + flags |= FLAG_MASK_VECTOR; } + + pc = env->psw.addr; + if (!(flags & FLAG_MASK_64)) { + pc &= 0x7fffffff; + } + + *p_pc = pc; + *cs_base = env->ex_value; + *p_flags = flags; } /* PER bits from control register 9 */ diff --git a/target/s390x/translate.c b/target/s390x/translate.c index a3e43ff9ec..e1c54ab03b 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6446,12 +6446,6 @@ static void s390x_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc = container_of(dcbase, DisasContext, base); - /* 31-bit mode */ - if (!(dc->base.tb->flags & FLAG_MASK_64)) { - dc->base.pc_first &= 0x7fffffff; - dc->base.pc_next = dc->base.pc_first; - } - dc->cc_op = CC_OP_DYNAMIC; dc->ex_value = dc->base.tb->cs_base; dc->do_debug = dc->base.singlestep_enabled; From patchwork Thu Sep 26 16:25:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174492 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2301419ill; Thu, 26 Sep 2019 09:45:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqwYWvNCXfyf8yysvTQ2Epavt3e95/wMMXrf+zIET/oJrVrZpgZOxqTL9RLzYKGhGoJ9IqY4 X-Received: by 2002:a0c:9ba8:: with SMTP id o40mr3483286qve.125.1569516303047; Thu, 26 Sep 2019 09:45:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569516303; cv=none; d=google.com; s=arc-20160816; b=By4Q/QB/kvKEK5C9pDUpqUUICGRnVmI5LIsMXO5nh4pqY8aICmT4lSuEqLLe5PEvsx o9730aEN1DbnH0Zkz2fx8c2acxKYd5Om4SiXi1wjBczPEPt+NkdlzEK4nlMW48EL9mlR Sdv/H0g4JELzjKoN9d39eaBXniRFzt965xCk3hu6WwZ3x/+ffZxsRb0u58zxXl7kwpRW l4JlUE8faGt7ygYOCcY0j01cr2uNtia0dvmE8OXVyQVuvtqtQatYFHJwPz0qRE5SJ3x7 v9dpDqr+RXYeGLGbxVsR0N9IM+Z24epU7VCU7ipH3DLVFsfXW3PQ6A/Uy6XYLI04f1j7 pU2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=X68WYJNDZTpdyZHdw4ksbcmmhr58PDv2+uW7j7e+gP8=; b=G3nE7V5guvJd8sD3D/HVln2oESLkDcx/BxPV3Q1x7ZAZK2Ud8WGXhDr3P8b/0OhH7e IZyveCgS53DPfgNrT7QQEJ/oQHp2siwOnx6UIrwHKOROK1uTFjR4/Mlv/ra3isVSQ7xF +SDoNsFBMYvN4+wVS3bwQ4ixfH7lb+kERWeODCl0Jz+9IhqgdZAS+P7Mq5HH20pNPAX+ pod9H/doR8rVrXRN0ERl21JXN/ThmsH0rg2WQmsJRWcjRjBCqAOFXvqTQPNcgjMWkKIJ 8JYmQf31HcL+/KdbeBo+TbWjdW3vh5oFRob/NxSLnGj9YYniTefuNzdt45Ek9c5zzBF8 rEig== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=XJB2g+VF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x8si1948423qkj.362.2019.09.26.09.45.02 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:45:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=XJB2g+VF; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40912 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWt3-00023v-Dz for patch@linaro.org; Thu, 26 Sep 2019 12:45:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41085) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWc2-0002Xe-Od for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWc0-0004dM-RW for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:26 -0400 Received: from mail-pl1-f178.google.com ([209.85.214.178]:41718) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWc0-0004bL-Mi for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:24 -0400 Received: by mail-pl1-f178.google.com with SMTP id t10so1269113plr.8 for ; Thu, 26 Sep 2019 09:27:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=X68WYJNDZTpdyZHdw4ksbcmmhr58PDv2+uW7j7e+gP8=; b=XJB2g+VF0rzzwBV2LXcfBXwIqKmcPwQDj1TYkOSySgHG0HHScrPBkJZ9awJpaNpPmG P/esdKL7Oe2YLGgG6cQkIiGtAYigJogPWTwvGg9fbYlctvjKsJfOtCR5Wpbxdo/0p6YM BmCHRbAN1tTrgj0AhHnZ1aplNInSoNz+DUQUrVmGrCyPAzoqIAFNpMTvu5/sPl5dS//M v/W8q19HgNQUhtGKY+Co7YqByBC7qMxhwwx4SV041bmh3Awv30hapFCpw+EpmSqpP4x6 NF4edYJj7n7Vezq1ZJ8Abq4k3pzuUyIAG1M4TZIzreOsndouKFrgmdHs8h2dyy8wamUI nmIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=X68WYJNDZTpdyZHdw4ksbcmmhr58PDv2+uW7j7e+gP8=; b=Uxifj8NtHZVrC0XbsVXGgqadznEY6ISrWBqusHoIVwLToUyKCGSzvZvDy1/5yuJxis HCU/pPHYX/CAmwFZCpqziyvmUnpVz99h/fQenxNMj+ekN4Dmhp3mGwjkLxMHl5JCJWV2 gE5MbggFLJ52zrO325Jb6OT5nZAPYSV8gQdJIEzejCaVmesc2lqYHgZZblnDsKA+6ZB5 zShwjTSby1uRe5sIQ2ogVZPiJmfrsgc2vgRDK+DFgr0DAYcP7MGhUxMkB8TgwkvwhFm2 xHwvlSNCyh1fZfkMMsuKkmOszOgGddT+cakq7LYw/seoHIU396dg0musqShehrK9de8d cFLg== X-Gm-Message-State: APjAAAXZ1S7JDQBv+Rzv9h7cpbu3rF64K/wBijO9aojY7cPzoqGT4b4l hWdc9iho475dbTtHRVV/8c7jgT971/E= X-Received: by 2002:a17:902:690a:: with SMTP id j10mr1391112plk.155.1569515181415; Thu, 26 Sep 2019 09:26:21 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 02/18] target/s390x: Add ilen to unwind data Date: Thu, 26 Sep 2019 09:25:59 -0700 Message-Id: <20190926162615.31168-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.214.178 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Richard Henderson , david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Use ILEN_UNWIND to signal that we have in fact that cpu_restore_state will have been called by the time we arrive in do_program_interrupt. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 4 +++- target/s390x/interrupt.c | 5 ++++- target/s390x/translate.c | 21 ++++++++++++++++++--- 3 files changed, 25 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index ce20dafd23..080ebcd6bb 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -30,7 +30,7 @@ /* The z/Architecture has a strong memory model with some store-after-load re-ordering */ #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) -#define TARGET_INSN_START_EXTRA_WORDS 1 +#define TARGET_INSN_START_EXTRA_WORDS 2 #define MMU_MODE0_SUFFIX _primary #define MMU_MODE1_SUFFIX _secondary @@ -814,6 +814,8 @@ int cpu_s390x_signal_handler(int host_signum, void *pinfo, void *puc); void s390_crw_mchk(void); void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); +/* instruction length set by unwind info */ +#define ILEN_UNWIND 0 /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index a841f7187d..30a9fb8852 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -28,7 +28,10 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) cs->exception_index = EXCP_PGM; env->int_pgm_code = code; - env->int_pgm_ilen = ilen; + /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ + if (ilen != ILEN_UNWIND) { + env->int_pgm_ilen = ilen; + } } void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, diff --git a/target/s390x/translate.c b/target/s390x/translate.c index e1c54ab03b..08f99454de 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6309,6 +6309,9 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) /* Search for the insn in the table. */ insn = extract_insn(env, s, &f); + /* Emit insn_start now that we know the ILEN. */ + tcg_gen_insn_start(s->base.pc_next, s->cc_op, s->ilen); + /* Not found means unimplemented/illegal opcode. */ if (insn == NULL) { qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%02x%02x\n", @@ -6457,9 +6460,6 @@ static void s390x_tr_tb_start(DisasContextBase *db, CPUState *cs) static void s390x_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { - DisasContext *dc = container_of(dcbase, DisasContext, base); - - tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); } static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, @@ -6467,6 +6467,12 @@ static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, { DisasContext *dc = container_of(dcbase, DisasContext, base); + /* + * Emit an insn_start to accompany the breakpoint exception. + * The ILEN value is a dummy, since we didn't actually read an insn. + */ + tcg_gen_insn_start(dc->base.pc_next, dc->cc_op, 0); + dc->base.is_jmp = DISAS_PC_STALE; dc->do_debug = true; /* The address covered by the breakpoint must be included in @@ -6561,8 +6567,17 @@ void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb, target_ulong *data) { int cc_op = data[1]; + int ilen = data[2]; + env->psw.addr = data[0]; + + /* Update the CC opcode if it is not already up-to-date. */ if ((cc_op != CC_OP_DYNAMIC) && (cc_op != CC_OP_STATIC)) { env->cc_op = cc_op; } + + /* Update ILEN, except for breakpoint, where we didn't load an insn. */ + if (ilen) { + env->int_pgm_ilen = ilen; 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[209.51.188.17]) by mx.google.com with ESMTPS id 2si2055093qkj.366.2019.09.26.09.28.08 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:28:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=uYqXsYGW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40486 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWch-0002dT-Kl for patch@linaro.org; Thu, 26 Sep 2019 12:28:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41062) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWc1-0002Wb-L5 for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWc0-0004cr-5W for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:25 -0400 Received: from mail-pf1-f174.google.com ([209.85.210.174]:36987) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWc0-0004c9-0f for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:24 -0400 Received: by mail-pf1-f174.google.com with SMTP id y5so2136786pfo.4 for ; Thu, 26 Sep 2019 09:27:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=W0jcE++wD2TJpXHODYvTUeOTJfY0O+5q0kOFaZ7p0Ak=; b=uYqXsYGW6HKpwCpBRpflGlgaI8XL6LAzbEomevBFF0uvUXcVJ7Zbtr8rvAEQeiXphT WQPzFrLvhwvguTEvsNQNkcsZFa/5gJJRnnH65roeHSjwQlzeBt7UcmvUyI5O7Oo2JN0H R0gAxWjn4WuNojbKaC0XamnLNfUhEHYaFsZbg6mlrtDGaShUSn2MOEGIB9kS99oH6702 GufdPCmw/HjTp3UAYJ5+PjMtw46I0Ala539HRmmrVd9VPd5U6hr8zZe2YYnhHzhWWhu3 9EtaP8g3dD0ARWd4NAk+nDcTUfGqwinmt0Mo+pnDuUyQ+UZmg+BX6hGslB1xxk3uIDrD QjXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=W0jcE++wD2TJpXHODYvTUeOTJfY0O+5q0kOFaZ7p0Ak=; b=KTFa0frLBAFWkIXAgezJ0Sc6qDE1+kINiYgGCOcdZOQ/+hBNA4mu6DZem5ujdwKCUS f9nVkHYEHdStGku4k+pKdhJnh1EDvXOSSE/DM2fgV2CD3LojzZmgI5CG5Apn5mgdjn9T HvOiOIi/7YVs0IS6/RwmEjFT+yGqhkRP1CQ/bhJHmkf6jlTIxPDGQBbsdFV4PDl5psNF 5YQVUi+Pg6KH9yvcjHn6soq6R605iibCam2VhTrsJ/9zzkMt2SHcACjsptL05cOuNWZc 2TIbGxivir0QQ+D606xJvg7dWQB4OSGBHY+3b2AweYEAALIRqLiojC+RXlDaxm54sVrE Q/3A== X-Gm-Message-State: APjAAAWF9BzDW/LTTOm5ZQvvW8citxbpEwLjTLyaKauMp3JFZgmW2uM6 2qeGbHCzZIvWi2dC3GMmZPlAGG/0LwY= X-Received: by 2002:a17:90a:6788:: with SMTP id o8mr4483294pjj.19.1569515182617; Thu, 26 Sep 2019 09:26:22 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 03/18] target/s390x: Remove ilen parameter from tcg_s390_program_interrupt Date: Thu, 26 Sep 2019 09:26:00 -0700 Message-Id: <20190926162615.31168-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.210.174 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Since we begin the operation with an unwind, we have the proper value of ilen immediately available. Signed-off-by: Richard Henderson --- target/s390x/tcg_s390x.h | 4 ++-- target/s390x/excp_helper.c | 8 ++++---- target/s390x/interrupt.c | 2 +- target/s390x/tcg-stub.c | 4 ++-- 4 files changed, 9 insertions(+), 9 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/tcg_s390x.h b/target/s390x/tcg_s390x.h index 2813f9d48e..2f54ccb027 100644 --- a/target/s390x/tcg_s390x.h +++ b/target/s390x/tcg_s390x.h @@ -14,8 +14,8 @@ #define TCG_S390X_H void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque); -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra); +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra); void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc, uintptr_t ra); void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 892f659d5a..681a9c59e1 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -34,15 +34,15 @@ #include "hw/boards.h" #endif -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { CPUState *cs = env_cpu(env); cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ilen); + trigger_pgm_exception(env, code, ILEN_UNWIND); cpu_loop_exit(cs); } @@ -60,7 +60,7 @@ void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc, if (env->cregs[0] & CR0_AFP) { env->fpc = deposit32(env->fpc, 8, 8, dxc); } - tcg_s390_program_interrupt(env, PGM_DATA, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_DATA, ra); } void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 30a9fb8852..b798e2ecbe 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -40,7 +40,7 @@ void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); } else if (tcg_enabled()) { - tcg_s390_program_interrupt(env, code, ilen, ra); + tcg_s390_program_interrupt(env, code, ra); } else { g_assert_not_reached(); } diff --git a/target/s390x/tcg-stub.c b/target/s390x/tcg-stub.c index 32adb7276a..d22c898802 100644 --- a/target/s390x/tcg-stub.c +++ b/target/s390x/tcg-stub.c @@ -18,8 +18,8 @@ void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque) { } -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { g_assert_not_reached(); } From patchwork Thu Sep 26 16:26:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174485 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2290846ill; Thu, 26 Sep 2019 09:35:28 -0700 (PDT) X-Google-Smtp-Source: APXvYqyydVV5vPv1bkI9cyCUiDd4yzOeWq8FiSuTafxKh/cXwzEg1idjqzUI2ztVD1IEY6z5Re81 X-Received: by 2002:a37:680e:: with SMTP id d14mr4294001qkc.409.1569515728124; Thu, 26 Sep 2019 09:35:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569515728; cv=none; d=google.com; s=arc-20160816; b=F9LBjjffxH+GojYT9Xkhug+TEX1O+reyFpsNaGZc16w4LeKOrTJm75ifRiLA/MKwb9 /FVFcfX37Fva8E42ftz9wBkHTZW0Lqfy2fuXUP8FP+RiDu0dJ5pABmUQfxnFG9c04Q1j KadunImeIqLcsJUqKngZGBzXSKG709UvnWtz9pRTtfXQwojHw7C7J4gQXd3Yp4juttBq gEdVsgPL7SGi4AtDF38beoDVkZSkGjmfIO7xGuN14x+PtVk4P3dLZvAWi8IuP9Rqihok iI7Vpfob2W8R1ZF6s6vWc8DcuUr493ftvFEy2Ob11qGwUH8W8VoehkxmzMcdZY0uOkjA mMuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=Q9YgUAPhXzajivZMLrGUUe0cw9UVQQabH6oFJef8lxA=; b=Ez1RzFBkVqA85mSNiD/UlJbmGvDIPd+uo2/EW7wACNem80N9RjW4f2SlQmH6DLmKmJ joyAnUzLu3ndFFiVLtmfAtt/WmDHlI/VK2mhf8NLIWEl3EBtdDjDC+gGP6TZou67ZLpe bGD2Y5rJGKBZn3dLmUZlnw5IjLN9fCR15PXwHtsVv8mEcUsmFy6OmAq5RXHWBnp6mBaY 5gXhaejfPkyHiI+/GcQH3iWhA6adW/lyicyjo8IURdiuF1+FKUYr5+7vym8rO+8qXU7S Xkrllsa1FpjvB8ogr9g4GDxEcGGsqnKk2S3xMXRnCDYGkgkkE3Uc69QX3stuMCIJERJt RPPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DxigwyDC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id u127si2148679qkb.18.2019.09.26.09.35.28 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:35:28 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DxigwyDC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40756 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWjm-0000Iu-Hj for patch@linaro.org; Thu, 26 Sep 2019 12:35:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41148) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWc8-0002eI-Tb for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWc2-0004fD-OC for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:32 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:40806) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWc2-0004do-Bk for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:26 -0400 Received: by mail-pf1-f196.google.com with SMTP id x127so2123563pfb.7 for ; Thu, 26 Sep 2019 09:27:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Q9YgUAPhXzajivZMLrGUUe0cw9UVQQabH6oFJef8lxA=; b=DxigwyDC2OG4AFZzFtQnp6AMBx//tVRXYISM5xygsCbZnVeXJTtfqx4O4SBV9zrdkF wGId8RbsSM6OJH49nOHVDmKnLcSV5Tv1L0B4YK4b/viDbVHaFOaGarOuP/ZkXUGGfkk1 QS32oj/rsNAUtqw9j6DVbGxtGN1MvHKuwCqYpKeWP8Aj20nHjyXGaTab6w1M8BBOjb9H xjMKGtxkwctnMhNLmHxN2mUowbOORRvJzJrfLQ9862pfouovjGyTUBO0DC8B0M1nF/FF Jy+vlG0Lut1rfVKhe01oOABU1PiOmEYknQ5XKhlUyPIFpk22w815+nBnIN7RATJH38aI WM1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Q9YgUAPhXzajivZMLrGUUe0cw9UVQQabH6oFJef8lxA=; b=h0iy0cHMNHT7nSyy7wnUmcjCYEWuj6w2F9yzgQbayLDYccWJIuYob5U45/D5uJlhwq dEq0FNQgPMGBIHEA7hPniXzvXr0q+F/pwONgyfOVwWF9NdmSgu8Wz4jBmExh03/eCS5X e4QTSInIhZUw09OrqNgWhJDvVlOZep7+kVA1950ZtpzpSMqtQW5hQF4b6F4dldMvj+Ps GV7E1e0aa93Tfq0wagKePay8AEETNBG/UQjR913lnPz6CQHkFbCPhTLlunh49SiKEGjy nV1BzYcS8U3k+W6Av3Xyuqf2jce8IsGOBSKxoED0bby/Rtr73XKJcoL46QnJEaBCDbkK ffhQ== X-Gm-Message-State: APjAAAVYFrHFfOiPwiK7ONxt+4BMy0aSL2bijj2j8nP5L1VKy8Zskggf nryj9WHk8G4ipvf4L6Q2JgQm6qT/DBE= X-Received: by 2002:a63:350f:: with SMTP id c15mr337198pga.225.1569515183946; Thu, 26 Sep 2019 09:26:23 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 04/18] target/s390x: Remove ilen parameter from s390_program_interrupt Date: Thu, 26 Sep 2019 09:26:01 -0700 Message-Id: <20190926162615.31168-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.210.196 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is no longer used, and many of the existing uses -- particularly within hw/s390x -- seem questionable. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 3 +- hw/s390x/s390-pci-inst.c | 58 ++++++++++++++++++------------------ target/s390x/cc_helper.c | 2 +- target/s390x/crypto_helper.c | 4 +-- target/s390x/diag.c | 14 ++++----- target/s390x/excp_helper.c | 4 +-- target/s390x/fpu_helper.c | 6 ++-- target/s390x/int_helper.c | 14 ++++----- target/s390x/interrupt.c | 3 +- target/s390x/ioinst.c | 40 ++++++++++++------------- target/s390x/mem_helper.c | 43 +++++++++++++------------- target/s390x/misc_helper.c | 27 ++++++----------- 12 files changed, 103 insertions(+), 115 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 080ebcd6bb..a5eab491cd 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -819,8 +819,7 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra); +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */ void s390_sclp_extint(uint32_t parm); diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 4b3bd4a804..92c7e45df5 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -157,7 +157,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) int i; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -168,7 +168,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) reqh = (ClpReqHdr *)buffer; req_len = lduw_p(&reqh->len); if (req_len < 16 || req_len > 8184 || (req_len % 8 != 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -180,11 +180,11 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_t ra) resh = (ClpRspHdr *)(buffer + req_len); res_len = lduw_p(&resh->len); if (res_len < 8 || res_len > 8176 || (res_len % 8 != 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } if ((req_len + res_len) > 8192) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -390,12 +390,12 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) uint8_t pcias; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -429,25 +429,25 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) switch (pcias) { case ZPCI_IO_BAR_MIN...ZPCI_IO_BAR_MAX: if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result = zpci_read_bar(pbdev, pcias, offset, &data, len); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; case ZPCI_CONFIG_BAR: if (!len || (len > (4 - (offset & 0x3))) || len == 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } data = pci_host_config_read_common( pbdev->pdev, offset, pci_config_size(pbdev->pdev), len); if (zpci_endian_swap(&data, len)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -489,12 +489,12 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) uint8_t pcias; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -536,13 +536,13 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) * A length of 0 is invalid and length should not cross a double word */ if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result = zpci_write_bar(pbdev, pcias, offset, data, len); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -550,7 +550,7 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) /* ZPCI uses the pseudo BAR number 15 as configuration space */ /* possible access lengths are 1,2,4 and must not cross a word */ if (!len || (len > (4 - (offset & 0x3))) || len == 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } /* len = 1,2,4 so we do not need to test */ @@ -622,12 +622,12 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2, uintptr_t ra) hwaddr start, end; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -709,7 +709,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, uint8_t buffer[128]; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -772,7 +772,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, if (!memory_region_access_valid(mr, offset, len, true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -786,7 +786,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, ldq_p(buffer + i * 8), MO_64, MEMTXATTRS_UNSPECIFIED); if (result != MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } } @@ -797,7 +797,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, return 0; specification_error: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -871,14 +871,14 @@ static int reg_ioat(CPUS390XState *env, S390PCIIOMMU *iommu, ZpciFib fib, pba &= ~0xfff; pal |= 0xfff; if (pba > pal || pba < ZPCI_SDMA_ADDR || pal > ZPCI_EDMA_ADDR) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } /* currently we only support designation type 1 with translation */ if (!(dt == ZPCI_IOTA_RTTO && t)) { error_report("unsupported ioat dt %d t %d", dt, t); - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } @@ -1003,7 +1003,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, uint64_t cc = ZPCI_PCI_LS_OK; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -1012,7 +1012,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, fh = env->regs[r1] >> 32; if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } @@ -1040,7 +1040,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, } if (fib.fmt != 0) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } @@ -1151,7 +1151,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, break; } default: - s390_program_interrupt(&cpu->env, PGM_OPERAND, 6, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); cc = ZPCI_PCI_LS_ERR; } @@ -1171,7 +1171,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, uint64_t cc = ZPCI_PCI_LS_OK; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } @@ -1185,7 +1185,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar, } if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index cf68792733..3cb00bcb09 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -588,7 +588,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); break; } } diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 5c79790187..1f83987e9d 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -34,7 +34,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } break; @@ -42,7 +42,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } diff --git a/target/s390x/diag.c b/target/s390x/diag.c index 65eabf0461..53c2f81f2a 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -61,12 +61,12 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) IplParameterBlock *iplb; if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return; } if ((subcode & ~0x0ffffULL) || (subcode > 6)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -82,13 +82,13 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) break; case 5: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), false, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb = g_new0(IplParameterBlock, 1); @@ -112,13 +112,13 @@ out: return; case 6: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb = s390_ipl_get_iplb(); @@ -130,7 +130,7 @@ out: } return; default: - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); break; } } diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 681a9c59e1..089623a248 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -75,7 +75,7 @@ void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc, /* Always store the VXC into the FPC, without AFP it is undefined */ env->fpc = deposit32(env->fpc, 8, 8, vxc); - tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ra); } void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc) @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, retaddr); + s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 5faf973c6c..7228eb96e2 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->fpc = deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index d13cc49be6..1d29a1fc1f 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -39,7 +39,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) int64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -47,7 +47,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -60,7 +60,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) uint64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -68,7 +68,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -79,7 +79,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b == 0 || (b == -1 && a == (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl = a % b; return a / b; @@ -92,7 +92,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah == 0) { /* 64 -> 64/64 case */ @@ -106,7 +106,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, env->retxl = a % b; ret = q; if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just abort if diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index b798e2ecbe..2b71e03914 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -34,8 +34,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) } } -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra) +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) { if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c index 83c164a168..c437a1d8c6 100644 --- a/target/s390x/ioinst.c +++ b/target/s390x/ioinst.c @@ -44,7 +44,7 @@ void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("xsch", cssid, ssid, schid); @@ -62,7 +62,7 @@ void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("csch", cssid, ssid, schid); @@ -80,7 +80,7 @@ void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("hsch", cssid, ssid, schid); @@ -116,7 +116,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &schib, sizeof(schib))) { @@ -125,7 +125,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) } if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_schib_valid(&schib)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("msch", cssid, ssid, schid); @@ -173,7 +173,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &orig_orb, sizeof(orb))) { @@ -183,7 +183,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) copy_orb_from_guest(&orb, &orig_orb); if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_orb_valid(&orb)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("ssch", cssid, ssid, schid); @@ -205,7 +205,7 @@ void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb, uintptr_t ra) addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -236,7 +236,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } @@ -247,7 +247,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, * access execption if it is not) first. */ if (!s390_cpu_virt_mem_check_write(cpu, addr, ar, sizeof(schib))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); } else { s390_cpu_virt_mem_handle_exc(cpu, ra); } @@ -299,13 +299,13 @@ int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb, uintptr_t ra) uint8_t ar; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EIO; } trace_ioinst_sch_id("tsch", cssid, ssid, schid); addr = decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return -EIO; } @@ -613,7 +613,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra) addr = env->regs[reg]; /* Page boundary? */ if (addr & 0xfff) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } /* @@ -629,7 +629,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uintptr_t ra) len = be16_to_cpu(req->len); /* Length field valid? */ if ((len < 16) || (len > 4088) || (len & 7)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } memset((char *)req + len, 0, TARGET_PAGE_SIZE - len); @@ -678,7 +678,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, trace_ioinst("schm"); if (SCHM_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -687,7 +687,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, uint64_t reg2, dct = SCHM_REG1_DCT(reg1); if (update && (reg2 & 0x000000000000001f)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -700,7 +700,7 @@ void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1, uintptr_t ra) SubchDev *sch; if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("rsch", cssid, ssid, schid); @@ -724,7 +724,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra) CPUS390XState *env = &cpu->env; if (RCHP_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } @@ -747,7 +747,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, uintptr_t ra) break; default: /* Invalid channel subsystem. */ - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } setcc(cpu, cc); @@ -758,6 +758,6 @@ void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1, uintptr_t ra) { /* We do not provide address limit checking, so let's suppress it. */ if (SAL_REG1_INVALID(reg1) || reg1 & 0x000000000000ffff) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); } } diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 08c5cc6a99..77d2eb96d4 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -71,7 +71,7 @@ static inline void check_alignment(CPUS390XState *env, uint64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } @@ -730,7 +730,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -767,7 +767,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -846,7 +846,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) S390Access srca, desta; if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } r1 = wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +879,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, uint32_t r2) int i; if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* @@ -911,8 +911,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - /* we either came here by lam or lamy, which have different lengths */ - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -932,7 +931,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1888,7 +1887,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, return cc; spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); g_assert_not_reached(); } @@ -1912,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1945,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1976,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1996,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -2168,7 +2167,7 @@ uint32_t HELPER(mvcs)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY) || psw_as == AS_HOME || psw_as == AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } l = wrap_length32(env, l); @@ -2199,7 +2198,7 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY) || psw_as == AS_HOME || psw_as == AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } l = wrap_length32(env, l); @@ -2226,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) uint16_t entries, i, index = 0; if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if (!(r2 & 0x800)) { @@ -2370,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } old_exc = cs->exception_index; @@ -2539,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, __func__, dest, src, len); if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } /* OAC (operand access control) for the first operand -> dest */ @@ -2570,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, } if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); } len = wrap_length32(env, len); @@ -2591,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, 6, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); } /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 7530dcb8f3..9fbb37cfb9 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) int r = sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) } if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val = r0; if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr = val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } qemu_mutex_lock_iothread(); @@ -573,17 +573,8 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) #ifndef CONFIG_USER_ONLY void HELPER(per_check_exception)(CPUS390XState *env) { - uint32_t ilen; - if (env->per_perc_atmid) { - /* - * FIXME: ILEN_AUTO is most probably the right thing to use. ilen - * always has to match the instruction referenced in the PSW. E.g. - * if a PER interrupt is triggered via EXECUTE, we have to use ilen - * of EXECUTE, while per_address contains the target of EXECUTE. - */ - ilen = get_ilen(cpu_ldub_code(env, env->per_address)); - s390_program_interrupt(env, PGM_PER, ilen, GETPC()); + s390_program_interrupt(env, PGM_PER, GETPC()); } } @@ -673,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) int i; if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } prepare_stfl(); @@ -746,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } } From patchwork Thu Sep 26 16:26:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174493 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2305377ill; Thu, 26 Sep 2019 09:48:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqz66KggH59MYdtUyn5dWBChvWKKbBWwJ0tykSZR7Z2kheCd4fW/yWHSGVdUc3gna7uZG0yH X-Received: by 2002:ac8:4642:: with SMTP id f2mr3410485qto.245.1569516518608; Thu, 26 Sep 2019 09:48:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569516518; cv=none; d=google.com; s=arc-20160816; b=y9OTUDI+JQcn11PyHQrHZUFNqhmLNJWCMlw8Umutv48xi+Wp5cuPfXlh+yu6IOZcku JECXO6k4sCQK9pKzE5IC8KQHaYV/Sn54Pq71RC7oUufzTPwJ//eeKmhYJq2StEAghTv4 JUf+UG5dx5Uj2TSIbK0aMUo2gFcn+p6yRj27KEiHNWSVI9Ybcch2CvGLyG4W4ymdjkh9 Qxyq8Zycf5dSjcBQuUVVlMsjxFt3G4XfQI2vNMhb7xdOLWOGCLV6UCFLmoPtoAlNd/d6 ZvKg4BISGREMEK3IvwkWJezTNVwhhKNloz3MiM+SN5rVIMOWK5l+bXUsEZorBnQaQ2X4 aJag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=q9Mr42wDaAqxtgZGR7xHO1prxR6bIhQ0Pkgg+dKZZYM=; b=quiHZIhpKuRWUjVfIUAARm4KutUR3+WbpqVPR+Lg613GDyUHKuPYSVtYHvj3FkdQTE YKV1SGAlSLtJdGplbZSuvHL1/VzHZmW2kL+ntmBdrdh0n+CUlCS4Psch2MPTmDeWHBUv +7aZjytCm2RrvUsaRhcBx1J/5tQhs9H1lTwWoX2qYjVShZLC2H5Y1e8SIHDuTSO5Z7HC 92e1ovv48zxDU1x8aNzzK3s5j1BMXJX6SRL2MypithUJQldNJVuulYGSeaC6228DCyYt tqv9EQ36nlK/KkkazCSbRIb2VqEhRvxp4OXx57BV3vJH0Iyo1adgmuUG/rldGdLHfxEf iMzw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=nGtJUP1z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 51si2235718qvo.173.2019.09.26.09.48.38 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:48:38 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=nGtJUP1z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40980 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWwX-0006Ie-Hn for patch@linaro.org; Thu, 26 Sep 2019 12:48:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41192) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcA-0002en-UO for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWc6-0004iW-Lc for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:34 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:41326) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWc4-0004eP-KZ for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:30 -0400 Received: by mail-pl1-f193.google.com with SMTP id t10so1269188plr.8 for ; Thu, 26 Sep 2019 09:27:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=q9Mr42wDaAqxtgZGR7xHO1prxR6bIhQ0Pkgg+dKZZYM=; b=nGtJUP1z3LbExqN2eeBA2rlaJakDVL5sf38NqtYf3LPHlpatFz0/SC5QWS8EJQy4BI BidrIoEs9/UMcAjF9gOBPaSSyAFJ2W2LkvJomYNLFZUse/RBvk7pylOwtLD7NorwgJ1r wSzIbvJFEYYPJovYRPyBGqc6KC2sk9pv21vdqLVPjvVEfT9PL/OX1ZrFoMD0/PU5CeD9 e4Y0RIfGWtHeBfQDEXwgiuiwJDnvWYbbm/ZGG/gVJ81xhUqNvFgbGK/fOJGxhpGcwCOI BoFgqdDPH/tYK74Pmm7pwgJM44FnjvLZiDLq8ROX3M7RBvKX4UEixxHtYUMPz89C7QLM 80Zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=q9Mr42wDaAqxtgZGR7xHO1prxR6bIhQ0Pkgg+dKZZYM=; b=P5WKWP2ZYogENnE5C5xKU3SmWnh5PnqXoQXWyBLIMHpjhAAK18oMxA6/3tHmC+UZFJ zkY5R7KQ8NpgVXDFbk1a2YMF5Z0zgwTq9gtxdBhMYXFjQRvZXj/VyzecgmBNEkNjg3MA 13AXdkVneO23GTjsjAE8WRD9qQQ+rGweNLE5dNBjkfRpWUf1F8VOZXJUBmmiBJWduQH7 NiSKh9/69KNOJrjFFpcDvB+aSGQqw6CjYAhGU2YUImLOGwVIyYacYKvdxrWQXjK8D4jg Cl1qjipH0zrifGBZ8LC5HFMVP4q4F/Edi/Jl/NraO34tui1t9z32MbjNr0xOSuCiDo7F 7Law== X-Gm-Message-State: APjAAAVbT3kQInuq99Fm5ZH+fdQP8N4qypxWTTzcoQGrVSvJNBUzDHxu 71rNzBil7XugRrwd5OkW4mWhslV1bFw= X-Received: by 2002:a17:902:6b47:: with SMTP id g7mr4843152plt.198.1569515185253; Thu, 26 Sep 2019 09:26:25 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 05/18] target/s390x: Use tcg_s390_program_interrupt in TCG helpers Date: Thu, 26 Sep 2019 09:26:02 -0700 Message-Id: <20190926162615.31168-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.214.193 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Replace all uses of s390_program_interrupt within files that are marked CONFIG_TCG. These are necessarily tcg-only. This lets each of these users benefit from the QEMU_NORETURN attribute on tcg_s390_program_interrupt. Acked-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cc_helper.c | 4 ++-- target/s390x/crypto_helper.c | 7 +++---- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 6 +++--- target/s390x/int_helper.c | 15 +++++++------- target/s390x/mem_helper.c | 40 ++++++++++++++++++------------------ target/s390x/misc_helper.c | 18 ++++++++-------- 7 files changed, 46 insertions(+), 46 deletions(-) -- 2.17.1 Acked-by: David Hildenbrand diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index 3cb00bcb09..44731e4a85 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" @@ -588,8 +589,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); - break; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } #endif diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 1f83987e9d..ff3fbc3950 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -34,16 +35,14 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } break; } s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } switch (fc) { diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 089623a248..dbff772d34 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; - s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 7228eb96e2..8bb9f54fd0 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->fpc = deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index 1d29a1fc1f..658507dd6d 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" @@ -39,7 +40,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) int64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -47,7 +48,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -60,7 +61,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) uint64_t q; if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } ret = q = a / b; @@ -68,7 +69,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, uint64_t b64) /* Catch non-representable quotient. */ if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } return ret; @@ -79,7 +80,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b == 0 || (b == -1 && a == (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl = a % b; return a / b; @@ -92,7 +93,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b == 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah == 0) { /* 64 -> 64/64 case */ @@ -106,7 +107,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, uint64_t al, env->retxl = a % b; ret = q; if (ret != q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just abort if diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 77d2eb96d4..7d2a652823 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -71,7 +72,7 @@ static inline void check_alignment(CPUS390XState *env, uint64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } @@ -730,7 +731,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -767,7 +768,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uint32_t r2) /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } str = get_address(env, r2); @@ -846,7 +847,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) S390Access srca, desta; if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } r1 = wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +880,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, uint32_t r2) int i; if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* @@ -911,7 +912,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -931,7 +932,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) int i; if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1887,8 +1888,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t r3, uint64_t a1, return cc; spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - g_assert_not_reached(); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } uint32_t HELPER(csst)(CPUS390XState *env, uint32_t r3, uint64_t a1, uint64_t a2) @@ -1911,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1944,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1975,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -1995,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) uint32_t i; if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } for (i = r1;; i = (i + 1) % 16) { @@ -2225,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) uint16_t entries, i, index = 0; if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if (!(r2 & 0x800)) { @@ -2369,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } old_exc = cs->exception_index; @@ -2538,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, __func__, dest, src, len); if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } /* OAC (operand access control) for the first operand -> dest */ @@ -2569,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, } if (dest_a && dest_as == AS_HOME && (env->psw.mask & PSW_MASK_PSTATE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as == AS_SECONDARY || src_as == AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, ra); + tcg_s390_program_interrupt(env, PGM_PRIVILEGED, ra); } len = wrap_length32(env, len); @@ -2590,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t dest, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, ra); + tcg_s390_program_interrupt(env, PGM_ADDRESSING, ra); } /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 9fbb37cfb9..bfb457fb63 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) int r = sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) } if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val = r0; if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr = val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) } if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } qemu_mutex_lock_iothread(); @@ -574,7 +574,7 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) void HELPER(per_check_exception)(CPUS390XState *env) { if (env->per_perc_atmid) { - s390_program_interrupt(env, PGM_PER, GETPC()); + tcg_s390_program_interrupt(env, PGM_PER, GETPC()); } } @@ -664,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) int i; if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } prepare_stfl(); @@ -737,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, GETPC()); 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[209.51.188.17]) by mx.google.com with ESMTPS id u25si2422783qke.59.2019.09.26.09.39.05 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:39:05 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RPLYePRB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40844 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWnI-0005TV-J2 for patch@linaro.org; Thu, 26 Sep 2019 12:39:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41239) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcC-0002fO-Si for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWc8-0004jz-Sh for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:34 -0400 Received: from mail-pl1-f196.google.com ([209.85.214.196]:33024) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWc6-0004ff-LM for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:32 -0400 Received: by mail-pl1-f196.google.com with SMTP id d22so1550151pls.0 for ; Thu, 26 Sep 2019 09:27:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nOk3WYhtYahGat7iYj1GhM9dpB7AkH9Zaoypf0AhgeE=; b=RPLYePRBWAV6fWtJDMS7+OuMNADukAUIoZC2HprOk8qRgmmK5Wpy9uZHwuU34ixnwZ 4WDUhNAzAm+laD7sekfwLDKHhqH4gqAuzWsx5wHmqeTTMdr5NJ22JAq0ofBqFOOfb3Bd D1nOYIyx5Y9H7QSjNQp3qsGmSnyT3woRyId0+IjxPlIYn21wu8RnTkbzt580r0/0TOZo x/r8yKskobDhK1G4MVAfDUeLogxRmMxgQPtFROWH/QtRFZYcm5JQjKO3tiiUxuyocTgi xF5ZwV5bYyGzL1rz7neLrtFSGxddov2MZ9uRxFKMmXS0mlbsTYt7AWc8IyI4nj1ebSiv vAtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=nOk3WYhtYahGat7iYj1GhM9dpB7AkH9Zaoypf0AhgeE=; b=XSPjhgrsP76NRUNdeQt5yvLCy8K3xSSboTSQ+NBVCEMsNgTv3jvSIap+PTaqPrXf/g UnkLQAwBHuuZ+1iAJ9Afn+kSxZrLuO8OVUXOYN4dY2Dui0hw9eP9rNX42K194apGsq3G L9+cS4NQcHEBA2f6g5FbcJfWlXei5B+Yasd3O0UbSR3Dj3slTl6BaMQgRsiRlzaR+2Vp LW+nl+7FRdHtOHvq62ayV9yxAQVgz07vimMTZLvKJSbN3aaBbyvVxhwta5aEG3e0x2/L hIER0kZ3ntjZpF/9sy6y+v8DI6LdftRpsX6kzrGw/hHtunzWoY5RtlT3QCobtHqA54Dj sY1g== X-Gm-Message-State: APjAAAXeK5JxWHUHcXT0Tu0zJukNSL2zAVl17tdSXtC+SZ3/jdOcUn91 IqtIuDO8HzOLRSX6acQKez1eU43z3tE= X-Received: by 2002:a17:902:7611:: with SMTP id k17mr4594355pll.314.1569515186521; Thu, 26 Sep 2019 09:26:26 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:25 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 06/18] target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fill Date: Thu, 26 Sep 2019 09:26:03 -0700 Message-Id: <20190926162615.31168-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.214.196 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Delay triggering an exception until the end, after we have determined ultimate success or failure, and also taken into account whether this is a non-faulting probe. Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index dbff772d34..552098be5f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc; - int prot, fail; + int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,12 +141,14 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); + excp = 0; /* exception already raised */ } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); + excp = 0; /* exception already raised */ } else { g_assert_not_reached(); } @@ -159,7 +161,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, qemu_log_mask(CPU_LOG_MMU, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); - trigger_pgm_exception(env, PGM_ADDRESSING, ILEN_AUTO); + excp = PGM_ADDRESSING; fail = 1; } @@ -175,6 +177,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } + if (excp) { + trigger_pgm_exception(env, excp, ILEN_AUTO); + } cpu_restore_state(cs, retaddr, true); /* From patchwork Thu Sep 26 16:26:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174486 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2293987ill; Thu, 26 Sep 2019 09:38:11 -0700 (PDT) X-Google-Smtp-Source: APXvYqxEFKPscRBopOGlxA1cdRmZYKABwoVjbWv9O6JztH8KlAeDQOp2j+GgOwUgnAzklccTguyJ X-Received: by 2002:ac8:100b:: with SMTP id z11mr5011367qti.377.1569515891639; Thu, 26 Sep 2019 09:38:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569515891; cv=none; d=google.com; s=arc-20160816; b=TERtO2RCMgweP52vg31AaqTmxpawXz9kEzhdDmadqTWIQuE4Yg0sy3fLqQtyzEoTnx rZesm1zAzoZwjMzYbiqrh/eL2g0HIoh9J2FVUXr4L9jBLlXH9nXt29agn/w71ZVdMZ4E eIlEpy5lNCB7XWELOkMiLC9mTXdDugzw450oydjRTWvIjJq+BJ0MAcfufJdZqb4gET57 RQC7bKihvHwEm5W7AKVs5/ewirI5VxF4kDoCUKbkUQbuXRxwjXktuMn3G1EEf9Z4e875 k+onA/+/uen4RdvxidzMPyPkFr8suXn3HrroF53PNYddr1Sp/M2jK7aDWH/p6QSEuYi+ EIZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=fGRu+QIbI0OANf3LHBbL23ZhxIBUgo0bhuy8UzPS3No=; b=K4Ghq5AaasElmPSA1yyoCd78mSzGD+dJdzJTKwXst3EFdxgxGjtHOkfKcbzvYBu7Df QOyi5BHNYTS/WDpVFgAKcPs1CiRqLGyWN9VP4S2Phd86/kdLJ86nFs0rKZaO8o19YFCJ hANOiu+AYItKSLnvhAQmTe8m7F88ZRh4wQxNQK5Bc2xyVXuB1W88QO6kdEcT3osjZl9D AxsB6vXAzRUmKp4WYoeFnYYmDkyh9nIyK5CVVamzowbe9eXQe9S8yXbd4+Ta6V32KdYR udHu2bWh9Q5EeJmP+UKLu4wvKh1NkEyfqhYxvkYAPYIzkiZ+66YlKde1SeNZqEDFltlz PpWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=aL6dZLIJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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So far this new plumbing isn't used. Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 552098be5f..ab2ed47fef 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; - uint64_t asc; + uint64_t asc, tec; int prot, fail, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", @@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; + tec = 0; /* unused */ fail = 1; } @@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } if (excp) { + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); + } trigger_pgm_exception(env, excp, ILEN_AUTO); } cpu_restore_state(cs, retaddr, true); From patchwork Thu Sep 26 16:26:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174491 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2300521ill; Thu, 26 Sep 2019 09:44:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqyieyfzODtNXcpTIeIu3QAW5Rn9WB2kieUi+nnwuRuTTiKU6SjyDevXjaUgFMWPJIau3mkS X-Received: by 2002:ac8:5147:: with SMTP id h7mr4964623qtn.117.1569516253563; Thu, 26 Sep 2019 09:44:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569516253; cv=none; d=google.com; s=arc-20160816; b=gUd0jOcG45+AfZehVBczQWZERCN806CrvCVLp+2ycnlveoa/bzpKXJcgOfw6UnXW3u szjaW373LoZWhBOMXp3XnOCsrHwW7OLIG9qJL6MPuvBUUQOL+LzuMT//u7oFhFaDrBCi o/XDT8g0ogALZslFkwX0qEVhHOUt4NSoEVSvC0vW2CHHDbA0XQ19g/g+mYiHf6qIh2b7 oGasdBMXBtGxPviKlyvb9L3/8JFjYr6cEagwHiaAsCg6WWCCxFsOtOGEc+VMKGpJxi/7 XfWhcFy2HU4ipcivLf+dWm+IC8KmlMuPhBvh8589hViKjum6BjAbCOMp7mGTXH8BF3C5 IQug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=Lvd4eeuinUqzweCiCcYtM7YlQdV39v/YpVBNYDRC1E4=; b=xY0q/JTKjhLMEeVduyuUQKsJvZsGXRj5Ic3QFAqKJHxn4Q/rMr40Wk7iRSMIl5zuvp qHAJv1NsLvBpLeuh6n+GZEVF2o9eHvAXe2ss9VuDnnItzyTdp2qbnQ5kFQFWbnYGeH5M 896P4CEechoB1tP0GQHVyR8ycNSvN0jg/DPgdc4afIe+kUfOny9UzMS1pre6PPYfFW5q sJr0tFVi7pbkkUBJhphLpvPITIZt0Vxd1J4bpKt62ebXNF6vSTC3X1b279gyzFdT5Zac 8hml6TwC8+jkdT3y3NFMGrDmrnMDLLmwffIy198aZhtBToYd3TEgNE6U9UYhJY3oUclY O6nw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=UFLDkUpT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 4 ++-- target/s390x/mmu_helper.c | 8 ++++---- 3 files changed, 7 insertions(+), 7 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c243fa725b..c4388aaf23 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -362,7 +362,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, target_ulong *raddr, int *flags, bool exc); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags); + target_ulong *addr, int *flags, uint64_t *tec); /* misc_helper.c */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index ab2ed47fef..906b87c071 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -147,8 +147,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); - excp = 0; /* exception already raised */ + excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); + fail = excp; } else { g_assert_not_reached(); } diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 3ef40a37a7..b783c62bd7 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -523,10 +523,10 @@ void s390_cpu_virt_mem_handle_exc(S390CPU *cpu, uintptr_t ra) * @param rw 0 = read, 1 = write, 2 = code fetch * @param addr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer - * @return 0 if the translation was successful, < 0 if a fault occurred + * @return 0 = success, != 0, the exception to raise */ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags) + target_ulong *addr, int *flags, uint64_t *tec) { const bool lowprot_enabled = env->cregs[0] & CR0_LOWPROT; @@ -535,8 +535,8 @@ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, /* see comment in mmu_translate() how this works */ *flags |= PAGE_WRITE_INV; if (is_low_address(raddr) && rw == MMU_DATA_STORE) { - trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, 0); - return -EACCES; + *tec = 0; + return PGM_PROTECTION; } } From patchwork Thu Sep 26 16:26:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174497 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2311314ill; Thu, 26 Sep 2019 09:54:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqz8xCMiGYrviJuIHfLkolz/eLt6rILtGajyaf7jdzIeQ7ZJqvpXcpMaWeVx05eN85G6Z4B4 X-Received: by 2002:ac8:6047:: with SMTP id k7mr4933448qtm.238.1569516870620; Thu, 26 Sep 2019 09:54:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569516870; cv=none; d=google.com; s=arc-20160816; b=DrwkkMexpFdQqixR+JNnImM8NAjI9pk9hwHGUC9ujXu0a+lSmU95F/vDb4mgC4EYEv HjK85KPXgN+shhmp8q0ypqOT3Tl2ialHKoZzBvcuIzh1iY0b0vxbFGfqE7Cb9pPV8kSI SUhzjTBVO+N2M5E9JTBEW/BQdHN2g2d4Gs6MV2Sfb7I2XFwWIp8RPPcowXh5v+O/yTbZ L1dww6mzm6MBCPbb6R3QHfHugYjM/asr0oCuakosaed33Rcmo6qDPvAsK82meYvCZ9yW gMCKY4sq6rRe90qwsIusAG9r9cEY+eNCPAJTDWqIYtII0Wf8QNA1tJHB+mG/Yrm0zOvt dJ4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=cUqChLJA+fIshq8B7yRM6YeWhj6qyz75SemmNRFWmr4=; b=V7Uc8iOC5TGcmhFnaPUoEUu+8bEpPCUiKvlSKhc+Xkna0G9mKtXiuYAHDsmPLxk/zt 7XdXFWnSOwOAhPTpB6ELnyOgNtVEzV+WLF3h9iHNzlvudmW3cnTvTNE2HicUbiqZ/81a kQfLSQfSfD/V6H3GKjyZlCSDY7RDPkE4I5NieFZI4wvH5B9UAlbeLzrOCdPrPohw7ZHr LW5iq/xJQs7oC/DqQtx6t9u+l+FTm5seeCaT+IrCR0v8KA2iR+QJfQUVNz0s9Rr0c6ub dq0DTDj8Mc35GzE2b15zSjqnZXaBnghgBuFgt/8AJQsv7meJHKnMLpmqiUtZpnpcJ37L f40g== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=rAgFxqVq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 30si2108369qkr.152.2019.09.26.09.54.30 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:54:30 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=rAgFxqVq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41048 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDX2D-0004Df-EG for patch@linaro.org; Thu, 26 Sep 2019 12:54:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41246) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcE-0002fd-19 for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWc9-0004kW-0V for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:36 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:42963) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWc8-0004j2-Md for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:32 -0400 Received: by mail-pg1-f194.google.com with SMTP id z12so1826290pgp.9 for ; Thu, 26 Sep 2019 09:27:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cUqChLJA+fIshq8B7yRM6YeWhj6qyz75SemmNRFWmr4=; b=rAgFxqVqZkBEYMLrS1NZUjgw3larVh6yAuqyxZiEHcOPodACYtRiLpN0PeD3jbglMO yKXd69Qr8Tb6zpUUf4qZ5J4ib9QBQRjmzmKUlwaZZ2p/A3PhfJA1pODnvuLkgHdTnLKB HKqbjs3KwMqCUYy7mf2gGAtlrGm7WZ3mxqtWYhij3t+6qyi+F1+od60FQnsAW+BqFEjQ K1zBvwF6Z3/3yk6gCSIisJ2kF3KVnS7MiDq0CdJiG9zsbm94EAnHJbtt4gk6duOIvPQn hVCQeEfDz/9UCkkyWN0qTT5jmL7662f19B/v1BgyQk8KWUR4+3Gx2jGj+VVKVLNFvhUf v21Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cUqChLJA+fIshq8B7yRM6YeWhj6qyz75SemmNRFWmr4=; b=SVAFoIU8bmDzd5nTf76w6y2Soe/QCU4eHaKfaZ2NKcVzSqi6Z2wGeB/Q8NrUdrZNQ9 Iw+8EB++W/sfSVZ3elnzWkFeWw4RNk6RUI2l2VraiLAVBhv+rzAjNMXfoM+0IjrncixJ E3YGcImXQqcYvWrtGtT/TQ3IREkJtwD7A3umqGY/SGZeGIbhivwC6uDkmS0thUCubs9N WBvSiFXyL0AYZ9hZ1vcpSc4wFbNN0QAl7Bt4WXbPQJhuhoMVDbvuuzXL1cMBmAzRflKV RPBIiQPIIxoOvC/eccozgabQSjjNT8Yt9dMaLrN4irxg5R1C0lZM5NWomuRwxV3QemYo vsug== X-Gm-Message-State: APjAAAUKqzUbE9fqGrTbBZaIDn3188N443cxxisO9F+XRlAi5PrEnKI+ DTw01Tn0vdElOHtlMl4MY9dfHLlpHfo= X-Received: by 2002:a63:7556:: with SMTP id f22mr4327140pgn.222.1569515190896; Thu, 26 Sep 2019 09:26:30 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 09/18] target/s390x: Remove exc argument to mmu_translate_asce Date: Thu, 26 Sep 2019 09:26:06 -0700 Message-Id: <20190926162615.31168-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.215.194 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now that mmu_translate_asce returns the exception instead of raising it, the argument is unused. Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index b783c62bd7..ed6570db62 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -113,7 +113,7 @@ static inline int read_table_entry(hwaddr gaddr, uint64_t *entry) static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t asce, target_ulong *raddr, - int *flags, int rw, bool exc) + int *flags, int rw) { const bool edat1 = (env->cregs[0] & CR0_EDAT) && s390_has_feat(S390_FEAT_EDAT); @@ -402,7 +402,7 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, } /* perform the DAT translation */ - r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw, exc); + r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { if (exc) { trigger_access_exception(env, r, ilen, tec); From patchwork Thu Sep 26 16:26:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174499 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2317132ill; Thu, 26 Sep 2019 10:00:10 -0700 (PDT) X-Google-Smtp-Source: APXvYqwzbVKKihFfZonANC8CN8DYIWEj1RWMqQQEQmkd2yoYuJK74HLT0XMimA0G+z1HuIRsSYMr X-Received: by 2002:a37:dc04:: with SMTP id v4mr4357432qki.51.1569517210047; Thu, 26 Sep 2019 10:00:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569517210; cv=none; d=google.com; s=arc-20160816; b=dl/7i+exUYlEMMcECB8nMok3Ua/FL/P5FAV2JkDJQ5HPGs9gZ4wJSic+Lmfa8m168x BeM38aN8gGHSd7gW0Y3Ykl+jxvT4bX0iZon/VPTyiptW/1Q0LVOT1g79u7UblMdBgjCa ZrHlhIoWPq1FSIR8mMtdSFCBDbiRDzN5CRmlzmE7NVB7dP11yS/3MB21ChUpguGGlkT4 DKPPcsq6dSoHHNOzpnePT9ig8adX4SsMcqHckac8yB3DFO6cZR/qcS+jzsDHKyuoSzv+ YHQJruEXJma78I5aN+q4qoygYKJswYotu1D199tqOdsPEKjrGiH2jf0vVO8ANJwdYWnT 5Ygg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=o++bPpRnFnFKhUL/Zv8ZfWMYMEUhC7pytRfRg2vZulI=; b=ERuZxd33n1g7DXqGT/d7HUN/4xoljqAFJOMgq8138P6QeqjRJMv/8ZdE8lB+fc7JQc JqLhHTzVzz0JGZJ07RcJdjIRLNrgWGm36vGWPV6tsJkDauv1egWd/8vykQINPhJxPWUQ xzwW4tZhmO0bhYKOybL/3jmyRowiErWmXVtyZDKS1Do/KWOJnIZWZyy3WXO8s/aIInTe 8m1oJ9L4fPSfmVNqskPBOMzoZZlSlfSnmGTGO+OPavt3jcTYEAJpO8HtdMowEr1V3R+o giYhsMKKzEbf2vjzYlcjpqRRVCSIS2Jj80MF8zIVoGV/2NfoypqdRJ6h0lIcURKYzGIl Bztw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=OdE59Ww5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id n36si1923306qtf.309.2019.09.26.10.00.09 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 10:00:10 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=OdE59Ww5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41164 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDX7f-0003uU-QH for patch@linaro.org; Thu, 26 Sep 2019 13:00:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41349) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcF-0002i6-Gr for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWcD-0004o7-As for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:39 -0400 Received: from mail-pg1-f175.google.com ([209.85.215.175]:43450) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWcD-0004km-1m for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:37 -0400 Received: by mail-pg1-f175.google.com with SMTP id v27so1820601pgk.10 for ; Thu, 26 Sep 2019 09:27:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=o++bPpRnFnFKhUL/Zv8ZfWMYMEUhC7pytRfRg2vZulI=; b=OdE59Ww55qQlwpP7iiIrBzGgfg8sml2mVIpCW9Bjyebl/v2r23SubzadLssPynvS9/ MWTqkyxkOvqq0KwcZfM6bgEcEWnXSLNdK6rz0mUrjflpqQCjSXeBTTYwb4/gqLbHATiU d87IEDADaJjDKKt5SLuDjSpYp1aDyE6JSnv1IjgxDOnfV54fvmWVKwDlcXVjBuv6+GRd 3YPW0LhXrooPWJg7MN8pHUYjs1U9XCby0yfXFnJxOCnePEnubhulbQqNZZBST0DQdBTJ jVK6UfU0r5o+JcSwFwbxPkcV0UVLpkQG+OR9dszPfN6W8O7d4hXy5FL8oYtwDK7asx2R Q5eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=o++bPpRnFnFKhUL/Zv8ZfWMYMEUhC7pytRfRg2vZulI=; b=pTgg1vecMy7nlDbap+7qz24+HgTBewqGH4NpHEKZB0jxwj+bB/WxLfsKYtcTf3Pl6o g8eNRMVebRoZfhCFniUb1EOgqdJh+LwfoKShaDJXn4jxiwScnOG3MzFWXr2yg1OueoYT uWw6/E97+NzvMBhhjfki+gi0IAidU1ogRA9yfdrqSSwNK1V447ktbCOzt7lOaKXD6mBT pXnpVTrhyqNrchpUkd5N8bywzaSkiLqSqI48vPW55Mm36+6Qjs875gQ88GlReNEAZDkn J3xfnvUjS5ib/QcsjZXERppGlvkOLvDwcBtFxJulvMQX0DOEB4CvbJ5K2Gbkv1ywdDd7 YJ2A== X-Gm-Message-State: APjAAAWPgz1PSDvrt00yDlUkhVfGHl64NZ5A1dtANDlNzIf+Xb7uq0to vwnVNoVhnT/q/EgwBp5HFRYpdTSuZH4= X-Received: by 2002:a17:90a:e38f:: with SMTP id b15mr4337462pjz.140.1569515192123; Thu, 26 Sep 2019 09:26:32 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 10/18] target/s390: Return exception from mmu_translate Date: Thu, 26 Sep 2019 09:26:07 -0700 Message-Id: <20190926162615.31168-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.215.175 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not raise the exception directly within mmu_translate, but pass it back so that caller may do so. Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 4 ++-- target/s390x/mem_helper.c | 13 ++++++++++--- target/s390x/mmu_helper.c | 36 ++++++++++++++---------------------- 4 files changed, 27 insertions(+), 28 deletions(-) -- 2.17.1 diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c4388aaf23..c993c3ef40 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -360,7 +360,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, /* mmu_helper.c */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, - target_ulong *raddr, int *flags, bool exc); + target_ulong *raddr, int *flags, uint64_t *tec); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, target_ulong *addr, int *flags, uint64_t *tec); diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 906b87c071..6a0728b65f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -140,8 +140,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, true); - excp = 0; /* exception already raised */ + excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec); + fail = excp; } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 7d2a652823..e15aa296dd 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2364,8 +2364,8 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) CPUState *cs = env_cpu(env); uint32_t cc = 0; uint64_t asc = env->psw.mask & PSW_MASK_ASC; - uint64_t ret; - int old_exc, flags; + uint64_t ret, tec; + int old_exc, flags, exc; /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { @@ -2373,7 +2373,14 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) } old_exc = cs->exception_index; - if (mmu_translate(env, addr, 0, asc, &ret, &flags, true)) { + exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); + if (exc) { + /* + * We don't care about ILEN or TEC, as we're not going to + * deliver the exception -- thus resetting exception_index below. + * TODO: clean this up. + */ + trigger_pgm_exception(env, exc, ILEN_UNWIND); cc = 3; } if (cs->exception_index == EXCP_PGM) { diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index ed6570db62..a9219942b1 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -349,17 +349,15 @@ static void mmu_handle_skey(target_ulong addr, int rw, int *flags) * @return 0 if the translation was successful, -1 if a fault occurred */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, - target_ulong *raddr, int *flags, bool exc) + target_ulong *raddr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - const int ilen = (rw == MMU_INST_FETCH) ? 2 : ILEN_AUTO; - uint64_t tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | - (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); uint64_t asce; int r; - + *tec = (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | + (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + if (is_low_address(vaddr & TARGET_PAGE_MASK) && lowprot_enabled(env, asc)) { /* * If any part of this page is currently protected, make sure the @@ -371,10 +369,7 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, */ *flags |= PAGE_WRITE_INV; if (is_low_address(vaddr) && rw == MMU_DATA_STORE) { - if (exc) { - trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, 0); - } - return -EACCES; + return PGM_PROTECTION; } } @@ -404,20 +399,14 @@ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, /* perform the DAT translation */ r = mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { - if (exc) { - trigger_access_exception(env, r, ilen, tec); - } - return -1; + return r; } /* check for DAT protection */ if (unlikely(rw == MMU_DATA_STORE && !(*flags & PAGE_WRITE))) { - if (exc) { - /* DAT sets bit 61 only */ - tec |= 0x4; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* DAT sets bit 61 only */ + *tec |= 0x4; + return PGM_PROTECTION; } nodat: @@ -441,9 +430,12 @@ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, int ret, i, pflags; for (i = 0; i < nr_pages; i++) { - ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, true); + uint64_t tec; + + ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec); if (ret) { - return ret; + trigger_access_exception(env, ret, ILEN_AUTO, tec); + return -EFAULT; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, From patchwork Thu Sep 26 16:26:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174500 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2325422ill; Thu, 26 Sep 2019 10:05:50 -0700 (PDT) X-Google-Smtp-Source: APXvYqybDXsf0e1oQIiYLxDZ0Q+h/Wrq9Ipk/BMdVY2atPiin5kD1HvVXigOCtHfJchF2HiusrAI X-Received: by 2002:a37:691:: with SMTP id 139mr4380728qkg.476.1569517550239; Thu, 26 Sep 2019 10:05:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569517550; cv=none; d=google.com; s=arc-20160816; b=ZCMZw5LcihfoPRqUyS4ubMSwnXxXKYqa+bigHXPKEBFKwcs4drNrXlWDQ/oEkRSaYA mH+YUmpLXSb2XtLRzJ4XUNFfQz23A+UYRhN50KG/pcQ3wC5xrZvss387rLvxZfa0ZGZ8 1cAtc3atTa3IsT9bCvZuqoYiPu6vi9tmPYUHTOfDsW/SAh72ys7dZBPgqEf1Vm6JiEew oqIElIPWPtdT8FrCYLQT86g56ZgF5WcSUli+8cA4xgLpFqfbwlZaIQpkNp85JUA4jUD7 9AvS6im/QKvL6cGeC9yYRoigBWoCO5JeJ+pE5lX5XMHRwKek/g1wPgjuFO6IbUasIWYk JEIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=r2Kkjv0LcYhAT4t2h/Z2Rtb/YRP8Pw5ksCfAIsS74Ko=; b=jUciwjTpkhBFi4qbsrhUUb0inytA+lRIapMhJjfCo5dVrvy3vFPvAYQydrwpFC2x7+ PhsHiobTxo2lmmqAtAK5W7Gb8fECRnwIhag1q8jpx7SGXSsCO+/v6jNKo9yb3r7Mx8cz ba8DTBtUdBzZAf0pyMsBxSqo3+aR99zYoNdWdXOghZwTm2VMI+z6WUyIeXtDpkzODdoo JQEgPYddWzqwMINwixroRFE+U8gUUiHc1uzCzctasIf7IWtryY7jb3rWC5P3J1VAu/jP u9dzPfB9lGbrlyU+wqJiXP7AE2F28VpuKLlw7R37OACFjFHaEiDwQACifkEbgb3MKtKo cM6A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=B2xcwfPx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index a9219942b1..5ecd9ee87e 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -423,25 +423,22 @@ nodat: * the MEMOP interface. */ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, - target_ulong *pages, bool is_write) + target_ulong *pages, bool is_write, uint64_t *tec) { uint64_t asc = cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env = &cpu->env; int ret, i, pflags; for (i = 0; i < nr_pages; i++) { - uint64_t tec; - - ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, &tec); + ret = mmu_translate(env, addr, is_write, asc, &pages[i], &pflags, tec); if (ret) { - trigger_access_exception(env, ret, ILEN_AUTO, tec); - return -EFAULT; + return ret; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, MEMTXATTRS_UNSPECIFIED)) { - trigger_access_exception(env, PGM_ADDRESSING, ILEN_AUTO, 0); - return -EFAULT; + *tec = 0; /* unused */ + return PGM_ADDRESSING; } addr += TARGET_PAGE_SIZE; } @@ -469,6 +466,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, { int currlen, nr_pages, i; target_ulong *pages; + uint64_t tec; int ret; if (kvm_enabled()) { @@ -482,8 +480,10 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, + 1; pages = g_malloc(nr_pages * sizeof(*pages)); - ret = translate_pages(cpu, laddr, nr_pages, pages, is_write); - if (ret == 0 && hostbuf != NULL) { + ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); + if (ret) { + trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { currlen = MIN(len, TARGET_PAGE_SIZE - (laddr % TARGET_PAGE_SIZE)); From patchwork Thu Sep 26 16:26:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174495 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2307858ill; Thu, 26 Sep 2019 09:50:59 -0700 (PDT) X-Google-Smtp-Source: APXvYqysC5Ttkio2dIWJ4eB6NlBpJn+AXPQWAErF04FjJhGdIfiD4RU4U+brbfDOoPAiojejcEmJ X-Received: by 2002:ac8:2b82:: with SMTP id m2mr5073697qtm.35.1569516659206; Thu, 26 Sep 2019 09:50:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569516659; cv=none; d=google.com; s=arc-20160816; b=CKP13SwwyyBhB45F+PsnL0I8WnYS9FfYjYOKn17cJtfwMAg9av50g/qzQRbrBtbepR rrC2oNERwH0Ot6+jOsHwmx77WjKojvL4oE+P2KptJLltbj+r+0+YDAkktJ16wqURoGIj H4ciBy5bXQv/OlBVzdmK223mtyzD3UKMIxJs4ut2aYCrjdHbKbaXxCikrE8ZziudgZRt A1O4zuNcnhYEgtwOXC1zuG2dXyUbKjqWBKrCPFNXdJoBstgCSP+xkY4IPI7SmAWU7CKk iCWEKI5uj+W0820yZKrxK+tdv7ELZ1E91fIXAKy3ljAs+BdtrXVKHa5hTZCSDa3WS/SI g5Ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=4k4lvT04oMAR1JlrF0Tsj3jcXJHGRIvEwhrMLXeNKHo=; b=PasbF/SiwYFNcqE+kKuejWiP23Eu4G3HGRgHcQzG6P++lyoNjQsfgNZANyLxQx7GNL pCk4hdL4ZsMIyerjr9aUN481B5y2EAGlpbXF4xtMsAd+2ztQRlz8A9jefxKr+frCmyiB XQaXMO4U+dNryLWpdnB30dm5X7KUiB4fzmnCTk7U+FyUGm7OY9bgl9SytTZbqCoRnBGq OI1ee7/VDtslEX1nHRClcxxLEI80zq+HA9yv1R+viEOeSE31jOTKRfmHN3YPjMDF0F2J idbfaxRX3+eIDOovkhtXYwpgWrHkBo9d7Be+h1U9NaKLtVUO7KQaZGNAQflu1VwQdcfS AV+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jJk+sjyc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z7si2032618qtu.221.2019.09.26.09.50.59 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:50:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jJk+sjyc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40996 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWyn-0006jD-PQ for patch@linaro.org; Thu, 26 Sep 2019 12:50:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41334) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcF-0002hm-4L for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWcD-0004o2-9x for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:38 -0400 Received: from mail-pf1-f169.google.com ([209.85.210.169]:43432) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWcD-0004mQ-0p for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:37 -0400 Received: by mail-pf1-f169.google.com with SMTP id a2so2111523pfo.10 for ; Thu, 26 Sep 2019 09:27:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4k4lvT04oMAR1JlrF0Tsj3jcXJHGRIvEwhrMLXeNKHo=; b=jJk+sjyckdNb41zkRDY8tc/T8TxEHGRCkRo+tC/9PPylmD80SbU9XLU2VBAf9M+zFJ f1IPgj3urdHXsEyxiG1y44UWcRRbVtFrIWDswtzrfqEdjnJl7FYT3KeoWxKl4KNC+Ef+ aDSKO70yRiCyX6oyKf7plSNs5Go3KXAIGFW+MqGvQ8L49uRpQ8e10v0ZfR0eg+GEhv/F 18lAgJAmWhWsBltrkEFrqYZTxqt7j/FBbWBjdc8AgdZ/jJIo9geCHZKYNK+bvZwr8l94 HAFatT4dHpFRqM6w3/DnwpR08rmQuOm0gK3oGSAt6lA4hBJPUT0mXK3j8u/+zxGICtf5 k66A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4k4lvT04oMAR1JlrF0Tsj3jcXJHGRIvEwhrMLXeNKHo=; b=ZCDkSlmTbP4EVws8494Q+SWIhO95D7Eqxv8P98/qFDlWGDgljcfjSnf4C2nV72LkQ0 7ujo2ZkC+rm8vGhZp5hTNGoGQ6ZjQTNtY+gXprPfD4ZUELRoaHBmJruiZ+J6HeM9QMlg Xo7KCbjNiZ02UZPPYzJ6ylYMaKLmeiDBP6aGhW5tCNwom5P/rUj/NYW8ekJhJG4EV98N hzghqCdiYfH4DyDe+LrFBa7rLCh5VQkickaBvxsJD4O7AdSgy6/nA/lTaZ/AS1w1x9rG HO1Wcop1B0zn3KAJcw+2+RCKUlvs/cNi+HqH9ctXTKm8PGNo6rw4n7ICjoUoPKqaq+to m9jQ== X-Gm-Message-State: APjAAAUtTgiv8olhIfy24vH6D1l7DKXdU0oNksW9ITR88/JM2t1wlrOP YkbtzTQ9dCGL3JmM4LPlb+rtjGB527k= X-Received: by 2002:a17:90a:e290:: with SMTP id d16mr4579073pjz.86.1569515194863; Thu, 26 Sep 2019 09:26:34 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 12/18] target/s390x: Remove fail variable from s390_cpu_tlb_fill Date: Thu, 26 Sep 2019 09:26:09 -0700 Message-Id: <20190926162615.31168-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.210.169 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now that excp always contains a real exception number, we can use that instead of a separate fail variable. This allows a redundant test to be removed. Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 6a0728b65f..98a1ee8317 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUS390XState *env = &cpu->env; target_ulong vaddr, raddr; uint64_t asc, tec; - int prot, fail, excp; + int prot, excp; qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, address, access_type, mmu_idx); @@ -141,20 +141,18 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, vaddr &= 0x7fffffff; } excp = mmu_translate(env, vaddr, access_type, asc, &raddr, &prot, &tec); - fail = excp; } else if (mmu_idx == MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); - fail = excp; } else { g_assert_not_reached(); } /* check out of RAM access */ - if (!fail && + if (!excp && !address_space_access_valid(&address_space_memory, raddr, TARGET_PAGE_SIZE, access_type, MEMTXATTRS_UNSPECIFIED)) { @@ -163,10 +161,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, __func__, (uint64_t)raddr, (uint64_t)ram_size); excp = PGM_ADDRESSING; tec = 0; /* unused */ - fail = 1; } - if (!fail) { + if (!excp) { qemu_log_mask(CPU_LOG_MMU, "%s: set tlb %" PRIx64 " -> %" PRIx64 " (%x)\n", __func__, (uint64_t)vaddr, (uint64_t)raddr, prot); @@ -178,13 +175,11 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, return false; } - if (excp) { - if (excp != PGM_ADDRESSING) { - stq_phys(env_cpu(env)->as, - env->psa + offsetof(LowCore, trans_exc_code), tec); - } - trigger_pgm_exception(env, excp, ILEN_AUTO); + if (excp != PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); } + trigger_pgm_exception(env, excp, ILEN_AUTO); cpu_restore_state(cs, retaddr, true); /* From patchwork Thu Sep 26 16:26:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174498 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2314269ill; Thu, 26 Sep 2019 09:57:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqyHPYpWjmm/14ORnqSQmD7bmyb9H9qlj23+hhac5Rm7WHtJhZAbaHZEiUosWBB118maJ1FX X-Received: by 2002:a37:8382:: with SMTP id f124mr4285882qkd.218.1569517045987; Thu, 26 Sep 2019 09:57:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569517045; cv=none; d=google.com; s=arc-20160816; b=nfb+RRW+Cj7rM1+9UPgLXDPUuFb/IgMGPVEo0Noc22ldYtkwuir1TRIllXQGVoFH81 MxwdqTVU2TeoBGDtwQvMurBaDdVPn8eaDsxCkyqY+aXMW0SmnAew09qT+2lG2KpFz223 lcw/pfXb85d7hwTCQGX5QEF4Gs0L3yMGx9d39expaO3sn+E9+TAieY4Yw6WpAG7qeOTY TLvcyemqHHTrsP3v6jUXx9KBdYAlw3Rp7rTPy63DwOIccxRsPwJO8IArs2g2H+BhsPEE XebBN2b8gqKLs4q/L6j/1ONs5e/woNJLXq2fgMGuKA0xXyyCRsKARdsjmasM/fjjLFVM bqhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=k7SDLRyU0L6BXBxdXsZbeGOUPnjW/+4D7x0wD4wfAkI=; b=N1Rf/bEYqeo8r2su/ylgx/cibo32TQ90V0Yh1FILWQaoOnVoRF5A91g+p/UvLJ1OJR i2QRB1ViQ95JK9ujifcGJrae1c73Hn+3C81r9ppSXx4iL9YcUv14iL38VscPqDrbceyw OgTOPqsl+71Rl18Qm1o8PdRepe3ustI8nQBpQHhk3M2lvCe8OG+DjKoGsXD55rm0Kpy8 /rOP81tjkIgfEms0hYGq/EYnbBuIEIJw2WCBHSn0M6efU5gdI8UnzlwwqkGAmlaJS3h9 LusV5/dic9chrsN5Zkn5gi24tnOiT6f9SfPLjLBhPMIzS4lPsYDG1oXT3OCTsxsbSw4Y A7Nw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="JZDj7/Yl"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t15si1982293qvb.208.2019.09.26.09.57.25 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:57:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="JZDj7/Yl"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41110 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDX53-0008Lu-DR for patch@linaro.org; Thu, 26 Sep 2019 12:57:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41348) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcF-0002i5-Gg for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWcD-0004oK-Ox for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:39 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:44363) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWcD-0004nF-Fg for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:37 -0400 Received: by mail-pf1-f196.google.com with SMTP id q21so2103553pfn.11 for ; Thu, 26 Sep 2019 09:27:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=k7SDLRyU0L6BXBxdXsZbeGOUPnjW/+4D7x0wD4wfAkI=; b=JZDj7/YlPCsHNpH4dL9ZNtZwBd7wAb5Jypy78IZD4gYMegpOZFLgOlNhEn/b2b0J6W cT2jQfrWR5X4tfcJiEiDV+GpOIyRpxuko8w+kFoiN7CXSqU0+nFIWd7kflXJw8NW3uoI fSd/GyK2w5XilQ/xPWTAWKk38oJsDxD0Gt/spBOGQYeQOQZykflPJ1lFsZ8ccSruBZ9G 0WiHMq1rnkpXn+xoczrxSZlOni/N8FXXuVuQuD/rsIuqAw41YGm5InXyQvpV9pLgvXPA tmb9O96sMOvQwlNZBgTxCjFzmnHYHsFXOgsRn5iCwBXf4/6oBCBOO7RzGkCLavBOTzek Tkbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=k7SDLRyU0L6BXBxdXsZbeGOUPnjW/+4D7x0wD4wfAkI=; b=t5CZAcObfBeqYdMF6ykzElFnXPBVguWo5ssuj1D2KSF+GKYObNxOifZuTz/7XfqoTJ aK7nmtYZUlf5gdwhu+1IWEjgHS0dsBSXIqkvjjUfnJ9s0wRjlXoiZ3LLOSQM4q0A9dit araV+9i8ZojTJqFLATNx/7aFhTGpy07o3QwadWghbHzHsF6GwvDKgabox45tdIVsuLHt ArV/Jx0cdpbpPdsfTXBuBiiGfyqMJlScGjb58gn2+Owok3NlrRB+9uIh6U82RnpNXdr+ JzfGmZjqs/qcWQwzzC6aQwO9WijZkdVKOuNVzw8HjDtSrl5+TQLENdBwNnj8e99l/2EE 36ZQ== X-Gm-Message-State: APjAAAU6IsLJky35qOdyhytD2AFf+IJL6s3NWQjmRL7yRNhrpzUDlMCD nnaLfQedcqwqD5FBUvzzP5DWDGkN/ms= X-Received: by 2002:a63:fc5f:: with SMTP id r31mr4192516pgk.55.1569515196055; Thu, 26 Sep 2019 09:26:36 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 13/18] target/s390x: Simplify helper_lra Date: Thu, 26 Sep 2019 09:26:10 -0700 Message-Id: <20190926162615.31168-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.210.196 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We currently call trigger_pgm_exception to set cs->exception_index and env->int_pgm_code and then read the values back and then reset cs->exception_index so that the exception is not delivered. Instead, use the exception type that we already have directly without ever triggering an exception that must be suppressed. Signed-off-by: Richard Henderson --- target/s390x/mem_helper.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index e15aa296dd..4254548935 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2361,34 +2361,23 @@ void HELPER(sturg)(CPUS390XState *env, uint64_t addr, uint64_t v1) /* load real address */ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) { - CPUState *cs = env_cpu(env); - uint32_t cc = 0; uint64_t asc = env->psw.mask & PSW_MASK_ASC; uint64_t ret, tec; - int old_exc, flags, exc; + int flags, exc, cc; /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } - old_exc = cs->exception_index; exc = mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); if (exc) { - /* - * We don't care about ILEN or TEC, as we're not going to - * deliver the exception -- thus resetting exception_index below. - * TODO: clean this up. - */ - trigger_pgm_exception(env, exc, ILEN_UNWIND); cc = 3; - } - if (cs->exception_index == EXCP_PGM) { - ret = env->int_pgm_code | 0x80000000; + ret = exc | 0x80000000; } else { + cc = 0; ret |= addr & ~TARGET_PAGE_MASK; } - cs->exception_index = old_exc; env->cc_op = cc; return ret; From patchwork Thu Sep 26 16:26:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174490 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2300252ill; Thu, 26 Sep 2019 09:43:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqzN9gLcmT/isgZ5zR+jTIx2zqyO4rG61HZ4ho4S7+9IlzcQDJZF1c1ZOkxu0hw0EebBdOH3 X-Received: by 2002:a0c:8ad0:: with SMTP id 16mr3477408qvw.237.1569516237795; Thu, 26 Sep 2019 09:43:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569516237; cv=none; d=google.com; s=arc-20160816; b=f/HmeIpsoJGU1cf0Y5oYwL4Ujd4UIsbO+e6+pK4YJpw1JR/peVefK5KIgSsBUAfV8r cNk8MNxLCWQbW5tB7JMVmQYokoge4uuPUgT3hizOnjQOxOUtAsSVPMfgAvMcS5X2YBlY WmzwYJf1SdK0rL09qJBaQPJVQcR21VA6mm1jjVXKUc8YVeYuTiKIvuFN5EDq+sYjcTPB HdOXhoCndUnqgzFGjdnZtaRMh/g2JPhUhx8G6GkWaGl7xSXDjy4gBVSH5zRAWdcG5VfO cHo9x2y1pWv7bxj6A45P1tTFUPDdFT/WUIacKRrOPLSwkmlPD/ntYxIXx02UZe7bHpjH Dbow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=BgDvG9Al3WPKQz7RdZ0r1UKiV65zPVQZj9u9agDKhUI=; b=l1DfalYFaD57cgtRx/WnIULgB8+FdsPb7rAcYL7asM34pskQ4W0FpIjczOSWLepKtr AaAPdT/aBf4JK45N8RRqGmhA5onJSohJoW8VzXXz5EKvhu0pLYu1tG7gTihBHQbnXoSC H9tkpXRkTPFRun06NpZw4oFJVddQABWPxeUeoue1poOwlBSKo/x7RvlL++rSEbRoM3m7 ban160Df0pivEWJPGAbWn5/y0j9qNbn+YPToCyRTWRhEPq56IVG+uXOxcrIaP6VT/Hkq UmQZ37K3A5yfMEQGG4Txr7kF09uz7IZsHPN90XEWuGq8QsrEew0MWblYnfkrawMs+kIy 9a9Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=drGvDfZb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 16si2107623qkm.284.2019.09.26.09.43.57 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:43:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=drGvDfZb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40916 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWs0-000283-TG for patch@linaro.org; Thu, 26 Sep 2019 12:43:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41426) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcH-0002kQ-S2 for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWcF-0004q3-4X for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:41 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:32858) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWcE-0004oq-Tu for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:39 -0400 Received: by mail-pg1-f193.google.com with SMTP id i30so1868896pgl.0 for ; Thu, 26 Sep 2019 09:27:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BgDvG9Al3WPKQz7RdZ0r1UKiV65zPVQZj9u9agDKhUI=; b=drGvDfZb6YF/SSjGyBem6M9wPyEtLuKKsTfnqEZW829cy7+5yUob548Xe+a7ASM3Rf ttTJQcpBtqNrUBFj4KDGXBzTsF+o3ANLHINy49AGl88Gy1W0H3UOuDyIciME6fkCLAv/ aRQ8/r7wGef2Bv49+bxlfCnwRrRG6GhwIopXx2aMzd/F41jBDV3ap0cvsJbDbqitYRMb yGZhuplPQl8h7Z0BNJZ66Pqn0pEuVMuhXzxdzXQmiEdAXII2HkXuCERa+CBbnW/JeWBQ Jp1x1B2JA2s7Xq0y4ZeXgKXfgS6UKsuDYdRrac7pfh+xTdFFiTKVg9nS6QlvBKR3M3F0 yLAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BgDvG9Al3WPKQz7RdZ0r1UKiV65zPVQZj9u9agDKhUI=; b=enTWbEAV/oIDxdB+usAEibI1qkl092g9wH2nRIBzVeoPeGt3dGZdi2WwN4Pxp4Mnrs 4AXEsJrd+TOL7TwNQd1d8GkLN/KACKQ3V6XVN37WN/c83ahG76JVnABFS5JzAHghXAmQ tD/W1XyYmBX4bHr0/hzcEgHJLQLmqf4OOh8g86RLKgrK1ltVqLZa7qGmeN4PDU9LJy0O ckE9fCniDFYRf77YGhzqNgQjGKpP3ZYxMxOJgAaY8LkZ/CO3SMQK/TqQLdhPNSzLJ0f/ kXRcov42AUrckuH2qmkK+MaQbvL/kEhCm7gn1q8m8HeviBeWgMTuSbvqpnKbsWIX+N7Y R3zQ== X-Gm-Message-State: APjAAAVXJn6Bey9F+fDAxgaIHjMd7LeLT3v+3/PLgRQPYnJ/FLx2DWTT lBJ57uSQ57G/L5CidzKCK+HKSRUx8iY= X-Received: by 2002:a62:e917:: with SMTP id j23mr4667444pfh.50.1569515197306; Thu, 26 Sep 2019 09:26:37 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:36 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 14/18] target/s390x: Rely on unwinding in s390_cpu_tlb_fill Date: Thu, 26 Sep 2019 09:26:11 -0700 Message-Id: <20190926162615.31168-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.215.193 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We currently set ilen to AUTO, then overwrite that during unwinding, then overwrite that for the code access case. This can be simplified to setting ilen to our arbitrary value for the (undefined) code access case, then rely on unwinding to overwrite that with the correct value for the data access case. Signed-off-by: Richard Henderson --- target/s390x/excp_helper.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 98a1ee8317..8ce992e639 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_AUTO); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. */ cpu->env.__excp_addr = address; @@ -179,24 +179,15 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, stq_phys(env_cpu(env)->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, excp, ILEN_AUTO); - cpu_restore_state(cs, retaddr, true); /* - * The ILC value for code accesses is undefined. The important - * thing here is to *not* leave env->int_pgm_ilen set to ILEN_AUTO, - * which would cause do_program_interrupt to attempt to read from - * env->psw.addr again. C.f. the condition in trigger_page_fault, - * but is not universally applied. - * - * ??? If we remove ILEN_AUTO, by moving the computation of ILEN - * into cpu_restore_state, then we may remove this entirely. + * For data accesses, ILEN will be filled in from the unwind info, + * within cpu_loop_exit_restore. For code accesses, retaddr == 0, + * and so unwinding will not occur. However, ILEN is also undefined + * for that case -- we choose to set ILEN = 2. */ - if (access_type == MMU_INST_FETCH) { - env->int_pgm_ilen = 2; - } - - cpu_loop_exit(cs); + trigger_pgm_exception(env, excp, 2); + cpu_loop_exit_restore(cs, retaddr); } static void do_program_interrupt(CPUS390XState *env) From patchwork Thu Sep 26 16:26:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174494 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2307351ill; Thu, 26 Sep 2019 09:50:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqwHV6ALDYKjxOgcGWcVFik8P++hkbKOM5aznojQdyEYm5hLcN5ddR5Y8Z1vzlAGnPdgJ3/3 X-Received: by 2002:ac8:4504:: with SMTP id q4mr4945720qtn.354.1569516634317; Thu, 26 Sep 2019 09:50:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569516634; cv=none; d=google.com; s=arc-20160816; b=SwHK3+T1gExRxf5gX3faJbPx+XJQyJVtqpiqXpx2gDIsSSuNgxUvVVUcY+F3ipJGgw FieDvYKB7Gqf1gs0ocY+rS2440RhjOdEtPZeYECjY4knGe6q+ZQ2DwoxYM77N0qsjL58 0yB+bmfq2QQxDKAHz87KJLWnHCDs6o+JBdZhwi+l5SUqptwsqtnMq770mMi4YoZ8xZWy UCXroM/y/OQzmSJcCLSSOtsNxsQJwbzC2vFggmmxgekPHO76DjfbhuNFYLzbF4NQDcSp l6DvgS1nv4Syt7/B+xRiBcWACtUX01K+bCfJJ8SEreelEQHORUvuOddEYS7CN2GsolXB 6bjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=mWk22l7+U+HSJUTJYCZqfIFiiQLzuuV4OTUO0HR+ZVI=; b=LTc86VFMZXd6YoFXJlUMXAIKiRQJdlGS3qbnXL0ify7JKFKuz/A1vb0E/xwLmgmlh7 c8TPlvVr3IWn3JiejodLLfhh4G8wA0lhG/ByHfq6KdbqePYfB7zZCBpRTm91uqzGVzr1 4c61b/S4ocRGw9q3+hGWG3rp4EArMyMv1+MGh4UKtuXHF3bUzGtFPFNpxjNMN7zAm3K5 55SedXlXkpyedQpE0mTYcx5GPVYDZaimRQ74pEzalMTvTcl53bmvkuIWb0jWVnTK5HgP NqUZEGauIgpwOmmnrQIwnclbamgO5zHY3sau23Jv017AnEqNsKzEmzuQ2JpX8J7MTFnv VkXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ceQokZKt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 89si2046416qtc.116.2019.09.26.09.50.34 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:50:34 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ceQokZKt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40978 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWyP-0006IU-0f for patch@linaro.org; Thu, 26 Sep 2019 12:50:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41438) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcI-0002kq-4z for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWcG-0004r0-4c for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:41 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:36439) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWcF-0004qC-SK for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:40 -0400 Received: by mail-pg1-f195.google.com with SMTP id t14so1854205pgs.3 for ; Thu, 26 Sep 2019 09:27:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mWk22l7+U+HSJUTJYCZqfIFiiQLzuuV4OTUO0HR+ZVI=; b=ceQokZKt50XVq/CMsn1tkxFjfpAq5UP4WrHW1IQJuzhq4W72V9XrJPoe3GkNWN3ujo GB4DOUrn0c2456X4Zdsw/hNi2swUBXyMYFYwbA7JjkzsIIRJdeAUDlS3NihcFVFB/AaH ILWc14HZ6dmEXP7xku/epRdS1CFQS7Ro/90uWYhcS8LjFukAbfIHR6WrR0KYXHWRs6YL 1ejS5qUjwt/8RzAAgTxzjoc9BDZ7SMc2mA7u/Rsv5ImWmsuwsh853XIdBg2yI88grx4c ur79hPMLQtfv5qVylg0Ozowip85nildVPu9QpeLwOrl/5n+J9sAEDsiHqAWF+nRI30SH P8Pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mWk22l7+U+HSJUTJYCZqfIFiiQLzuuV4OTUO0HR+ZVI=; b=CoXk0qD2wWazcg53M6Arqr/5EfrmMJU1cvPyHZzKWeXdrfCSo9Y8Rxb8KtvwUx82Y8 kBYLy1jEjf2vxYaxKJ+jtmAVMJLwF8bwRQRaUy5ppwJnUUCWODOdqNLbxMJ9LTQ7nvdh TmgVTGzXd7ZGIeRy8uDS/4jqoXIDRErfuvt27VOFpMreNL7qoVRIGdgm1ueF1Od1VyV7 pyqnP2hlMqqekDanxerVA49TgxbvHHv4TixYhzTvopg7Lb20446PDfiN89FK6AtyZkbT iwYgpGSDb8z5ba2yG4kLVCjii0BoE4xweFr+l5YI+nNwfZej3VovMDNZbvoSeNGaSKTv P2CA== X-Gm-Message-State: APjAAAXH7rzIMQcxK2w3IclMDi2DwT0HtYCOVAAO6RdQpXaimvNQxKWn Ih2enZEtbzh6A50uH+2IEYK3vzt5R58= X-Received: by 2002:a62:32c5:: with SMTP id y188mr4504702pfy.97.1569515198469; Thu, 26 Sep 2019 09:26:38 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 15/18] target/s390x: Rely on unwinding in s390_cpu_virt_mem_rw Date: Thu, 26 Sep 2019 09:26:12 -0700 Message-Id: <20190926162615.31168-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.215.195 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" For TCG, we will always call s390_cpu_virt_mem_handle_exc, which will go through the unwinder to set ILEN. For KVM, we do not go through do_program_interrupt, so this argument is unused. Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 5ecd9ee87e..bf7fddb056 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -482,7 +482,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { From patchwork Thu Sep 26 16:26:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174496 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2311213ill; Thu, 26 Sep 2019 09:54:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqylk3zG8u5jPx4mohnNW7w1/+0CiPmmEX/LMqPJrqF9Uc2xXD6Dy85x67uga/l10W/0oI8E X-Received: by 2002:ac8:75c7:: with SMTP id z7mr4981439qtq.136.1569516865532; Thu, 26 Sep 2019 09:54:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569516865; cv=none; d=google.com; s=arc-20160816; b=KnBODksEyrsIaCrgmBml2c/SQuMXTTAQzaKyMWI/MmdUVZEqRoKcRldDsPCl+/EPfW W2+l5ss3aRJxZ2cBHoUbOJUgUEK3IgfWLUSi2f3DvOauiNSkkad06Lwx0GDUFcL/psyB SxdcPeeAOHt/bNUsG8kKIE0KoAZqmnFxOtgX1Qsux2lkyszn+U1fLi+c/h1bPdG5qA16 jnRbON8eZbFXyJNBZJyTx+58eL+35MM8jnIxJCXSGSQ/5IJ5byomn1BOAYTWtggnz+qv pcGOmPrLfmVCmlAd+qz/Xf6ZIeGmgvrYT7jUQenGB11AQ8laiM0+lb10fy5odnvc3Vrt IBbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=jrvKbjfU1dFIu8+98+zhi34QV271t8gxz4iMHGKRMxY=; b=N8OT3ifH+exheUkSw4gHWUAucop5kljXSyloEP8X5MW1n2MTVgG6V14F2t7QgbCImS fkJqjdgvl7F4sCkj+Td7Gy8JKa1s/0N3LGCQoBUOVe5Xcw6hEqrTE0OGFCD/65AUhRZa gh81gzgDG9iOMVFXamhk1iwxk7QDTMJZXWgZEhuYlf7CQrR/DCGuBCtXPQk0L1L8VQ72 D3jcvkZgZvCXJFtB029ZNMMApc/PLqIZMDw9MSGCTAlKkP3sRAm7Ov6Hn65hmzv3P0nm Bh0DEMQrZf9ttnKr8RYJcbmX/KmOlcMJqZzrDGu9LY2/Rmtby4/Ic4R3HlGmtRXJTQx/ V0og== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DlwvgVBM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id b10si2229349qvh.59.2019.09.26.09.54.25 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:54:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DlwvgVBM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41044 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDX28-0004Bg-U9 for patch@linaro.org; Thu, 26 Sep 2019 12:54:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41490) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcJ-0002mP-59 for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWcH-0004rr-Dp for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:42 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:43921) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWcH-0004rK-7c for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:41 -0400 Received: by mail-pf1-f196.google.com with SMTP id a2so2111639pfo.10 for ; Thu, 26 Sep 2019 09:27:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jrvKbjfU1dFIu8+98+zhi34QV271t8gxz4iMHGKRMxY=; b=DlwvgVBMjYyJV7gzhvmmTzrKx50D0/XPtcd/euRD4gb25N/dXLiE53+IXVaKki187z Y8J2+MTS7X6HmB4m5BWCacNzPNs6ph2AmFdDgZA16jIzBKGg0zw9EeS7NF3jnZmD0OTz T5pwB0P6rsge989Cfi3l55cBlvptjIjWeYvSne9fL7uLG5CTCCbApRUyAvQZ9cS7rkVe HqXVZQxq3ZCJVvLET3gHD8RPqOUX2Hgc3z6fLPgLfirJSnJZcsbuj2sMf2sA/HUSk1TB 6TMqVcUGKL2tgEXzpiHuW/nyEYKg5UNQpmrJDLWnRCVlaNo3z28tzGEWIbhCFfgeFvb+ VaSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jrvKbjfU1dFIu8+98+zhi34QV271t8gxz4iMHGKRMxY=; b=EbMgeR2KITaztSa/r/0hqMeiiGmqkv8u/BjnWFz7xBzHx5Uum/8dQreV1dVHQP9/Jn KQWURRcze/44leF4VaN3RZ4WnrYEAUa0R8LfYKrwNDQeUMOEcSp32Y7apjEgMhutCN96 iURTrRViH8sCYINQj7kMabN5sDKy8uoiPsM7MP40kwzmF9KpZD11Jf8xs0pMLkEvyZTS +HJ9y1rxMBDo603jbBjlA2dk3a7ziR/1U1bdSTlQnFBQsDwIX2DBHOyt1og3PjPbgaGP uOebHsuLYqhMWCu1PLJJ8ZpNJdF187esmlMrS/XvifrTJvIKuK13iHlmD6BktrldW82w bDDA== X-Gm-Message-State: APjAAAX3tAReYKlZoYgabEWjYoRKzX4gCC0BEXF1losYEcEL2M+GRjhg 5RSPblxo/qJSHiddccmBu/i0ijGWDM0= X-Received: by 2002:a62:5441:: with SMTP id i62mr4779630pfb.49.1569515199840; Thu, 26 Sep 2019 09:26:39 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 16/18] target/s390x: Remove ILEN_AUTO Date: Thu, 26 Sep 2019 09:26:13 -0700 Message-Id: <20190926162615.31168-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.210.196 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This setting is no longer used. Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 2 -- target/s390x/excp_helper.c | 3 --- 2 files changed, 5 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index a5eab491cd..fc941c7d76 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -816,8 +816,6 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); /* instruction length set by unwind info */ #define ILEN_UNWIND 0 -/* automatically detect the instruction length */ -#define ILEN_AUTO 0xff #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra); /* service interrupts are floating therefore we must not pass an cpustate */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 8ce992e639..c252e9a7d8 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -196,9 +196,6 @@ static void do_program_interrupt(CPUS390XState *env) LowCore *lowcore; int ilen = env->int_pgm_ilen; - if (ilen == ILEN_AUTO) { - ilen = get_ilen(cpu_ldub_code(env, env->psw.addr)); - } assert(ilen == 2 || ilen == 4 || ilen == 6); switch (env->int_pgm_code) { From patchwork Thu Sep 26 16:26:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174487 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2294891ill; Thu, 26 Sep 2019 09:39:04 -0700 (PDT) X-Google-Smtp-Source: APXvYqz0QAZ9Qlew8Y8i0CIioEf4wo/eQYchRO6gFLHEWG8ZRogryauCm3RShAMaNbRkDcWs4b94 X-Received: by 2002:a37:2e01:: with SMTP id u1mr4250459qkh.455.1569515944760; Thu, 26 Sep 2019 09:39:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569515944; cv=none; d=google.com; s=arc-20160816; b=g3JXs1zriprI4SG8+mv+Dxsb9tSjztsFPvcL1g0wHKsk9VYwlxNIf6EoVQsvBH/kwE CJdAp9M9HufdMCk0NwDibW4AoXOjro6v4mepOVdNQpZd+dnABEMqzNG+NlHYLDssQAHI DKZ7X7WexxDuzI7c6hvv91MfZhw8I2VmksJ1VVTyoJCU8rQGRKCEq3RP2gQVQgkFOme9 SfbR41idNigPG0h/kbU9H3oXkUvudG532pZumdqfAnUlxtCOYtWJfec9fMPqw7DMqKcA O1MiA6OghdSw/LRNIHb5JFLX/4idP9Mb5rklwvinYacwS031uDe5uTA/mNEgW8l0Fkip iCcA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=8blXRqcbFbTzejzjElPQzOmrEhdRtWtBUHSTiMchkDQ=; b=dDMpyzay/9G07QRZSG1RL/33dM/ie6RKIxuwBk0nHS0iwfm6dQSk2QrFI9ZQhjhNHE b1Dl+E30tKp9GbH+CHTCStgC7c6hvRnWXObVPFa7Yjyg08++T+1A6Lueoan6Kc3+rboG 6m0B3+hQIFL69kZhtTIHQRK8WSFTjL0AVo7YOKAVk4BcgDgSGCQAld6N76L8h9g127Uu LM6M1EeNccw7ltzVy5Lsa7VZCrtowh+etifHLyuUSKmDCXvHo9lr/itSb22nqt7rl0yG kLZ9PspJULqCQlJQHpNrr1f/7pm1N3wo35Qo+OEyoW4LGB0IIQJt/hf+yUy6si1uep+8 vzhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=BZ5YQquK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id x50si1934828qta.272.2019.09.26.09.39.04 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:39:04 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=BZ5YQquK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40838 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWnH-0005QE-KM for patch@linaro.org; Thu, 26 Sep 2019 12:39:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41513) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcK-0002nf-1Z for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWcI-0004ss-Kr for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:43 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:35478) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWcI-0004s9-EC for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:42 -0400 Received: by mail-pf1-f195.google.com with SMTP id 205so2145531pfw.2 for ; Thu, 26 Sep 2019 09:27:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=8blXRqcbFbTzejzjElPQzOmrEhdRtWtBUHSTiMchkDQ=; b=BZ5YQquK8X6lz7nhreQWrs1k3IxNPZv0U19B3cH71OjWHgYQqz9twCd9FekBkwb1lV YSVlN4BPR6Dh2geSQlrSTNg6Aaw3MyAoYTEVxZE2xHfwchxFgbPMS0pryPRNFDhnRJDE 3ljJL3NBBzDkaiXWDZxRB/peJCagVmefn6A+Cgs7u+61MuyixUoUKLMYkBU1/Y98mbbi jC3goPzuMX7O+shqhagS0HX/8fz0S/YdRueV1UC5ToHXBGat07X6qelwi8tLiYmREMys FpjHaUWJ5KFk0Veoxh5CmGcTU70LyDKGfsVOqTjPiGKaWH/OZ/Su/JcSotisgMZm5tiw 0lDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8blXRqcbFbTzejzjElPQzOmrEhdRtWtBUHSTiMchkDQ=; b=aRkTuBLVntM0J2lAX4LdOM6ZUKTTktZAA75ogLKgVpEOn2pprBGFgKA4hkv1IH8W9R kFJWnDU7YHrKzcLUn4YZ0xK31WbMETlOQ3FQZVQYypjbQnoAAT3ezuEDCsozDiFzt1Yx VYFjt2nm5Y5zWai7t6/+sPU0dWGAb1J4J0U5dyXWKmLKhz4ox7zdsY2RQi8b2SStyU4T HNLvRTQ6FZFzhe0c1Gh7EzwRtjKjcFQRlfhqG+0+x4vTApMz/ooAPC02q+gbEMa+96lh 43KLKrufnq28i2WEfhpq5wQ05yM/sT/efEQsHV6UcXgt5DvWdQToZe8smZQ6ttYUr8dV lhPQ== X-Gm-Message-State: APjAAAXMwwx2hIGEr26V8eBXPAofzADFLBG05CzIkiW9ao9tc9AL4FDB xJL8fWfO8WhViSyf0NZ23b9khTOMO/g= X-Received: by 2002:aa7:8e55:: with SMTP id d21mr4495837pfr.241.1569515200991; Thu, 26 Sep 2019 09:26:40 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 17/18] target/s390x: Remove ilen argument from trigger_access_exception Date: Thu, 26 Sep 2019 09:26:14 -0700 Message-Id: <20190926162615.31168-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.210.195 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The single caller passes ILEN_UNWIND; pass that along to trigger_pgm_exception directly. Signed-off-by: Richard Henderson --- target/s390x/mmu_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index bf7fddb056..e6c3139c57 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -33,7 +33,7 @@ #define FS_WRITE 0x400 static void trigger_access_exception(CPUS390XState *env, uint32_t type, - uint32_t ilen, uint64_t tec) + uint64_t tec) { S390CPU *cpu = env_archcpu(env); @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, uint32_t type, if (type != PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, type, ilen); + trigger_pgm_exception(env, type, ILEN_UNWIND); } } @@ -482,7 +482,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uint8_t ar, void *hostbuf, ret = translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); + trigger_access_exception(&cpu->env, ret, tec); } else if (hostbuf != NULL) { /* Copy data by stepping through the area page by page */ for (i = 0; i < nr_pages; i++) { From patchwork Thu Sep 26 16:26:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174501 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2330261ill; Thu, 26 Sep 2019 10:09:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqzCjk8f28ZAMl5kZIWl6GEbNEpieXOo+OKzjd9c0nxJCdL7VQuFmY5im3H6KkW9+ntyu8Xg X-Received: by 2002:ac8:1af3:: with SMTP id h48mr4953484qtk.270.1569517765190; Thu, 26 Sep 2019 10:09:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569517765; cv=none; d=google.com; s=arc-20160816; b=dfNmv95vQPjvxbcdOlP72eYfy0+KQvThGtRxek0gXwly33Tx4OPL2xou7JJlBLBZtB wAZefnxWmB866kEbvQKHF94XZ5Lr1xbnOHxwW1zL7GGRuGbyYUJE9Unuvutql5HZwhin pKndcN51xTNXS/kTfb3Az5XQ1xmhEvg/Aif4jjA4U71neT2s6kJ9QMVsHCBzDvSQp5+H 9iWYMvbJZTT5wAk+SiT6ttcnz8SIDcDdN6Y+zmO9vJwWWWNnGxQgC71qOxURLaK8CDaX NS0iiSPoB0a7veNp9TN+VPqfwUgobSL5ZpbKkGQnf/s2TfyC0UhRjYHjRvNsQCAdrfxS 0aAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=UQnfTCEnnIKKltvdbz7D/30XUobqe+yYKsVnosX+zfQ=; b=vTwL380LAAqMhBNIkFsOarZGLe/fYhzJOkN2ykXBCqspS9p56I9yvi1CVZddFWaseH OTg5g5ib5Iugih3mBW0URFdgNNdyfqZdZBp2l0Nuy0rTBmuydfLEoRcBGMzZUZ3tJapO AYj9unrUZqgpdHvhxPq7bgAgTXbCD3OxTKNC1Ehmo4yPSAwnY3GuGP0W9VzXCwpJya6w y06ni0IPHqkUgK1vXOm9p1FZPGLBhvy9Hz0u6fJjBl5FXhX9ynZFC1XqFotfNXGr+jK0 r6DP146lssqhrA6z9U13MsYFHPCPEuV1fXz9Z43AH677puFiLDPNE6dqk/aFv/i7wo5y grwg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=PWIXiiPB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 125si2182592qkn.156.2019.09.26.10.09.25 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 10:09:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=PWIXiiPB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41298 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDXGe-0003aD-Hk for patch@linaro.org; Thu, 26 Sep 2019 13:09:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41543) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWcL-0002pj-Vt for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWcK-0004u3-CB for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:45 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:43246) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWcK-0004tc-79 for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:44 -0400 Received: by mail-pg1-f194.google.com with SMTP id v27so1820847pgk.10 for ; Thu, 26 Sep 2019 09:27:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UQnfTCEnnIKKltvdbz7D/30XUobqe+yYKsVnosX+zfQ=; b=PWIXiiPBIOpJcCFllmzuD0SDAl9KlayLjCziHUGt+QVFFoDwoxV5h6wPGQHKi/5PRH InM8sMI+d7VTXQ/krwu5I8oU4WiNEHzZ4WrNLeAE5GfvB/fzsTEW3ajNY28rzYzazIW9 QyIpRWIJf7VGsBFwgqo1SDJlRys8swruRNCtS2pm8yYLZh3UTxAkDC4g9MK+/9Mc/v6Q ASu2/YWHu45VdyvY+9dnr1GY6j0PaNLjEh3Gc8Rg5UrJp13ZJ2Rk85H9jvsH3MINWS02 eaFirR9oVneG9mb767BB5+VgfNpoxy+0ZyZkFpQESneeAbSUieJMLOnRwg/pbUNl0t2i eFZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UQnfTCEnnIKKltvdbz7D/30XUobqe+yYKsVnosX+zfQ=; b=TqAmjlx/t/xMacGMfwLYtjcoIIJr9k21zqttoeZZIdTQkXb9DSeogugltvoYe0s/YQ ILVpcMniTfH7+NUgVY5jxsL7ixvcxumJw0EqK7ojsM5QnCTj0ric3UlqsFCurPC5A328 qu2LV0U1KSJvtLAYf8ItGk4U/8gzWXA0VNUncMzC3CiNXupYnAEg+amh/lUMq4qcPY3u eVisK7rMyDSWP3a2M0ZsByaGrWRx661xk1vlVkE/DRhAPFus+VZqQzydpWQNc3eoCXm9 6lwbHxxk1VKAVWuyHT+joj/isYMQwf8t8Bi1PGMsAEIEgQE8sz2sKweS3HdEULFF0+C5 JwpA== X-Gm-Message-State: APjAAAUNNBn0zho80za0m2/wX0hqFXJe6FlMaq9LCYKDPJpoBNmfpt+0 3lUWMtdVBskomcWVQ5rT9Z5YMpMmGpQ= X-Received: by 2002:a17:90a:310:: with SMTP id 16mr4580718pje.100.1569515202853; Thu, 26 Sep 2019 09:26:42 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 18/18] target/s390x: Remove ilen argument from trigger_pgm_exception Date: Thu, 26 Sep 2019 09:26:15 -0700 Message-Id: <20190926162615.31168-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.215.194 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All but one caller passes ILEN_UNWIND, which is not stored. For the one use case in s390_cpu_tlb_fill, set int_pgm_ilen directly, simply to avoid the assert within do_program_interrupt. Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 7 ++++--- target/s390x/interrupt.c | 7 ++----- target/s390x/mmu_helper.c | 2 +- 4 files changed, 8 insertions(+), 10 deletions(-) -- 2.17.1 Reviewed-by: David Hildenbrand diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c993c3ef40..d37816104d 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -317,7 +317,7 @@ void cpu_unmap_lowcore(LowCore *lowcore); /* interrupt.c */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen); +void trigger_pgm_exception(CPUS390XState *env, uint32_t code); void cpu_inject_clock_comparator(S390CPU *cpu); void cpu_inject_cpu_timer(S390CPU *cpu); void cpu_inject_emergency_signal(S390CPU *cpu, uint16_t src_cpu_addr); diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index c252e9a7d8..e70c20d363 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -42,7 +42,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ILEN_UNWIND); + trigger_pgm_exception(env, code); cpu_loop_exit(cs); } @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, { S390CPU *cpu = S390_CPU(cs); - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. */ cpu->env.__excp_addr = address; @@ -186,7 +186,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, * and so unwinding will not occur. However, ILEN is also undefined * for that case -- we choose to set ILEN = 2. */ - trigger_pgm_exception(env, excp, 2); + env->int_pgm_ilen = 2; + trigger_pgm_exception(env, excp); cpu_loop_exit_restore(cs, retaddr); } diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 2b71e03914..4cdbbc8849 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -22,16 +22,13 @@ #endif /* Ensure to exit the TB after this call! */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilen) +void trigger_pgm_exception(CPUS390XState *env, uint32_t code) { CPUState *cs = env_cpu(env); cs->exception_index = EXCP_PGM; env->int_pgm_code = code; - /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ - if (ilen != ILEN_UNWIND) { - env->int_pgm_ilen = ilen; - } + /* env->int_pgm_ilen is already set, or will be set during unwinding */ } void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t ra) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index e6c3139c57..ba02d33e86 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, uint32_t type, if (type != PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, type, ILEN_UNWIND); + trigger_pgm_exception(env, type); } }