From patchwork Thu Mar 21 14:39:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 781686 Received: from mail-ed1-f53.google.com (mail-ed1-f53.google.com [209.85.208.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B035A947; Thu, 21 Mar 2024 14:39:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031979; cv=none; b=l+Uu3PzL56dje+wId9Lr50EHWRVXi8hIKK2dkYonaOGeuLF0XYjKKnO9M3OZJvJm7tCb84Nrq2Q5ZSv+FE2rXjgtzPCaeuwwZxuBuyfQhwai9qXXqgjehZHm7uIJyCd6OwAe5bpolZX8GDMuY+re2El0Whl56ZSa09FMQUBaDt0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031979; c=relaxed/simple; bh=+NpUKQ5iB0YePuDf7WiBAzzLkKvERDjDBLGFEo9274o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tYGcvL56DQ4yI0BHp0IXKbjSsMtj2QqoMtLhPLfIS1U78jJhdSPIaXvf1tbrT7B3ji6Gdxp63PhGEqxZ2wg+Yf/E9Hw8+YmEjIgIdEUYOEP7b0QyZvziqBGcmG05g6AuoTuZSwnhpO7QSk0gFxnwXB8re5TAJnLKRkIcX+6Y77g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=nRkfBUNz; arc=none smtp.client-ip=209.85.208.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nRkfBUNz" Received: by mail-ed1-f53.google.com with SMTP id 4fb4d7f45d1cf-55a179f5fa1so1496092a12.0; Thu, 21 Mar 2024 07:39:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711031975; x=1711636775; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lt8p4RY6k043MwULpqhdmkYzdtutmtSYnRG7ixAL6cQ=; b=nRkfBUNzfNPBYlT9stuiyIVuC36nM8CMJBG3TKNTNLy08HB5BQZT2iWfyiOhT6kH1b sSpDAKUtDukktnv34mqhHft6nb/E3lPM7AJIn8B0hbnTIV/d3IVpzdjDk9kP5x0egNGo qdg0jUwRwWjaTUI9nMiG4x6ldgtH5QArhlb70KXmqXtCCfuTKvtjYfwvDpXhz8ZdvZsi 71GifZ1ITndsFyz8lcUmVTHlYyBl2V4NpvZS+VwL1hAYEppb1DRM350hhjwnO595BqYo Eq1um3x3lr+LLjropu/drnjMu9fh58UV8We0uAo72TymKVa55In8iO0w8a+94CaufQWD sWtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711031975; x=1711636775; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lt8p4RY6k043MwULpqhdmkYzdtutmtSYnRG7ixAL6cQ=; b=FxOrWFspf/UXFICmiUtS80QG9ORRin+VQi6z91zthsUE/NWB30DWi45sEMUTnUjYpr bPD5Ctr30yybFt+sS9EmO3JFS81ICJFs6Jm1Jn/Dbp/htk04EDIV7ORwj33p1lWSEWi/ K5GdkmgfBNv0DYtKWQTbwuIfEl78n7p8fcEJ7zz1nY7kllDZaRBUsn4bSvUu+89G8WDP 5ZKzOlSv7bfJG3bkCBYbuZHjRPPaKnt1TXGRaHbaWVtVghy/mb2GKAUCRQxswjk+0McO rGm14vaUgNxZ3bAiWDxGxMVGe5CvPUgTf9W34zbHuDQ6JkLfbc9X9LZEzq0FNeL6VoeL Q2iA== X-Forwarded-Encrypted: i=1; AJvYcCVc733oj+no8dDja5iEy1HW9Q9wdfn8ztkIjc1t29yxEp1FeKAAeUYWB0I3wZbCnmsl2b1bIGU1SDZk7U9P4HW419zgBVkJAjBmwNsBbfRlObhKSIzU/wea2knX2vkXcYrzuKKWyfQqmzrS1j7qoyr3GH5s22gYTG1GZH3l12kP7TCJ7Hg= X-Gm-Message-State: AOJu0YyCZ9uTJCDXjB2RfKgwB2JnrqBSlJA6TabaFBJFU7qFXLP1EEm5 s2dzycigERb9sVk56YVGFlu1TiKudYzL358XDIH271JIY2nRDuE= X-Google-Smtp-Source: AGHT+IGjKKL/8jQHlXcH90JXlNKIhdKLi9UJuSrfaawd5b8R4sBEFnY1PIvJdbq4+rqf2e0WmemiTA== X-Received: by 2002:a17:906:254b:b0:a46:cf63:d96b with SMTP id j11-20020a170906254b00b00a46cf63d96bmr3819163ejb.51.1711031975555; Thu, 21 Mar 2024 07:39:35 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:b39:dab4:8e20:e918]) by smtp.gmail.com with ESMTPSA id e3-20020a170906248300b00a46abaeeb1csm6147923ejb.104.2024.03.21.07.39.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Mar 2024 07:39:35 -0700 (PDT) From: Alex Bee To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Linus Walleij , Liam Girdwood , Mark Brown Cc: Chris Zhong , Zhang Qing , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Alex Bee Subject: [PATCH 1/5] dt-bindings: mfd: Add rk816 binding Date: Thu, 21 Mar 2024 15:39:09 +0100 Message-ID: <20240321143911.90210-4-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240321143911.90210-2-knaerzche@gmail.com> References: <20240321143911.90210-2-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add DT binding document for Rockchip's RK816 PMIC Signed-off-by: Alex Bee --- .../bindings/mfd/rockchip,rk816.yaml | 259 ++++++++++++++++++ 1 file changed, 259 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml new file mode 100644 index 000000000000..b46de99f60ff --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk816.yaml @@ -0,0 +1,259 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rockchip,rk816.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RK816 Power Management Integrated Circuit + +maintainers: + - Chris Zhong + - Zhang Qing + +description: | + Rockchip RK816 series PMIC. This device consists of an i2c controlled MFD + that includes regulators, a RTC, a gpio controller, and a power button. + +properties: + compatible: + enum: + - rockchip,rk816 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#clock-cells': + description: | + See for clock IDs. + const: 1 + + clock-output-names: + description: + From common clock binding to override the default output clock name. + maxItems: 2 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + system-power-controller: + type: boolean + description: + Telling whether or not this PMIC is controlling the system power. + + wakeup-source: + type: boolean + description: + Device can be used as a wakeup source. + + vcc1-supply: + description: + The input supply for DCDC_REG1. + + vcc2-supply: + description: + The input supply for DCDC_REG2. + + vcc3-supply: + description: + The input supply for DCDC_REG3. + + vcc4-supply: + description: + The input supply for DCDC_REG4. + + vcc5-supply: + description: + The input supply for LDO_REG1, LDO_REG2, and LDO_REG3. + + vcc6-supply: + description: + The input supply for LDO_REG4, LDO_REG5, and LDO_REG6. + + vcc7-supply: + description: + The input supply for BOOST. + + vcc8-supply: + description: + The input supply for OTG_SWITCH. + + regulators: + type: object + patternProperties: + "^(DCDC_REG[1-4]|LDO_REG[1-6]|BOOST|OTG_SWITCH)$": + type: object + $ref: ../regulator/regulator.yaml# + unevaluatedProperties: false + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - "#clock-cells" + +additionalProperties: false + +examples: + - | + #include + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rk816: pmic@1a { + compatible = "rockchip,rk816"; + reg = <0x1a>; + interrupt-parent = <&gpio0>; + interrupts = ; + + clock-output-names = "xin32k", "rk816-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + gpio-controller; + system-power-controller; + wakeup-source; + #clock-cells = <1>; + #gpio-cells = <2>; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc33_io>; + vcc6-supply = <&vcc_sys>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <1>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic: DCDC_REG2 { + regulator-name = "vdd_logic"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1250000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <1>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-initial-mode = <1>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc33_io: DCDC_REG4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33_io"; + regulator-initial-mode = <1>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_pmu: LDO_REG1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_pmu"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_tp: LDO_REG2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_tp"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_10: LDO_REG3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc18_lcd: LDO_REG4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd10_lcd: LDO_REG6 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + }; + }; + }; From patchwork Thu Mar 21 14:39:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 781912 Received: from mail-ed1-f51.google.com (mail-ed1-f51.google.com [209.85.208.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 640928613F; Thu, 21 Mar 2024 14:39:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031984; cv=none; b=gLk3IwzuJKnmnnipiNotaN3bLuAS4lrOrF22jO6EIzHPfjUsgjW11pe4bvbBRlZgG6DPH2Pf2FX1iVvhGmLlMxK7C6V0Mcr+USlXD51TEOxHQe+4LM5qzwgXRcxekqj/YEevtHQIS8J+9S1S+WI1OSDY8GNFt+fbDeYW1Q50+zA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031984; c=relaxed/simple; bh=O7ugDoNZZgm0a4P1HqPuzSFXp9R7YHvdFQ7coGOXL6Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ej0YxnVg8jXXAaIux5KEn3509khGxJYZQWOACV2ItHLu/syh6YSeLcJ8nggcXHMap4rbNKA2RbC6nSt9KZaDeUtBpw7r4HYO8PKeeE426tsQwcZGHxOYCC3M54g8BOPWmq2dLorUR9JKm4KIffNNXXLtaONj6Gn4HODpKBM71nk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=DD/A0moG; arc=none smtp.client-ip=209.85.208.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="DD/A0moG" Received: by mail-ed1-f51.google.com with SMTP id 4fb4d7f45d1cf-563c403719cso1263121a12.2; Thu, 21 Mar 2024 07:39:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711031981; x=1711636781; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aQL77I0RDWDyolkQWE/R2ZxVS1GwI+NfUnobsEhFvyE=; b=DD/A0moGcR8DwtSHaaTSJaDesXKhmSwlEB78Y6zSzd6yGR9aR0zpBlHQbEpQ/R820m pGJn/+A/0vO5tfelx54ZQtzg6jcQ8RNFYSBhpTi7vA+3AotT2evbsE8MQt0IB9iLWB8j GG2ZaLntQpPZ+m2CewcN0Hq9zgnLzRXMSDDKCC59KMvIuRgMYzV1o7o886+kQTSuyrGj iW9ZJC2y8nSOhloNYcmkKZJJX/byj29rzjmw8LXTVbCIW8cmQEk5RMv93XzJ1hzO+KDX iIHMpoNgmpBwu+soivJP5/Vc7ohuYXKzkVH22k4pUI8FzfISV0P4zVFaXUbYmzrDO23O +9mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711031981; x=1711636781; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aQL77I0RDWDyolkQWE/R2ZxVS1GwI+NfUnobsEhFvyE=; b=FyU/Ckdm+eiFA0lOOLUvYm7U1UksLKLYXmaTqjo63LrPob5NbN4zPDEOlTZZ5EEQvv XXY0LP0SjrmXq902b1f2BUo8bXHkLyuXOfQ6R6WxloKTNLlRzwa1hygXeHrBTXHGN1OV l7JnwUtrf7IFq/ukFCmhviLu9KuUaxoBO4hcevjVDR4UFAhemRrCNQLuOJTUmw34fKHB RRHs/Gy36/qJ6dYujG3ipQ/8BqyTCmlskWjEwkSW6uJ4hvWWiKcakc7eDRgKaOTTR8y/ 9sXM1kSyct3ixLTU4Zp1H164ZdMkbzboshlyi0czfrXfMmCl1/Gp19xiofqCnOjJJqMo BOqw== X-Forwarded-Encrypted: i=1; AJvYcCUUpuBZrEFZ0w1pFXr90TOWF369JWLRCYMWTknOn535Ht/ZNH02WJKzdqS2dnCTTcr+W/1cp2gfAYhsrijyOheSEhRMxjwoQuwx3WNnDX27sZ86IiFp+wHk9ZgS0K6DCwVaukrAHPbyxKWKrRdFir6fXFWFa2rI13NaCn2alCzn9oAt11A= X-Gm-Message-State: AOJu0YwiD8w40i8JG+OJ30bViONdGW9zJdSGCNFvC8ct1Kqp/z/BmrmM Je3Y3RpCIXgCLQ7i9tl6nqPeyRrDibz566iSpjcB16BhoFaojOA= X-Google-Smtp-Source: AGHT+IEVZEHMXFIEC1ZqlzvMK9FTABD6kpOJmZbZ+Y27AzRuCRvgkyC1vLyN7ZPDu7eN6RgBmQ1uWg== X-Received: by 2002:a17:906:7f0b:b0:a46:e8dc:5d51 with SMTP id d11-20020a1709067f0b00b00a46e8dc5d51mr4900400ejr.25.1711031980768; Thu, 21 Mar 2024 07:39:40 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:b39:dab4:8e20:e918]) by smtp.gmail.com with ESMTPSA id e3-20020a170906248300b00a46abaeeb1csm6147923ejb.104.2024.03.21.07.39.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Mar 2024 07:39:40 -0700 (PDT) From: Alex Bee To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Linus Walleij , Liam Girdwood , Mark Brown Cc: Chris Zhong , Zhang Qing , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Alex Bee Subject: [PATCH 2/5] mfd: rk8xx: Add RK816 support Date: Thu, 21 Mar 2024 15:39:10 +0100 Message-ID: <20240321143911.90210-5-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240321143911.90210-2-knaerzche@gmail.com> References: <20240321143911.90210-2-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This integrates RK816 support in the this existing rk8xx mfd driver. This version has unaligned interrupt registers, which requires to define a separate get_irq_reg callback for the regmap. Apart from that the integration is straightforward and the existing structures can be used as is. The initialisation sequence has been taken from vendor kernel. Signed-off-by: Alex Bee --- drivers/mfd/Kconfig | 4 +- drivers/mfd/rk8xx-core.c | 103 ++++++++++++++++++++++++++++ drivers/mfd/rk8xx-i2c.c | 45 +++++++++++- include/linux/mfd/rk808.h | 141 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 290 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 4b023ee229cf..2e7286cc98e4 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1225,7 +1225,7 @@ config MFD_RK8XX select MFD_CORE config MFD_RK8XX_I2C - tristate "Rockchip RK805/RK808/RK809/RK817/RK818 Power Management Chip" + tristate "Rockchip RK805/RK808/RK809/RK816/RK817/RK818 Power Management Chip" depends on I2C && OF select MFD_CORE select REGMAP_I2C @@ -1233,7 +1233,7 @@ config MFD_RK8XX_I2C select MFD_RK8XX help If you say yes here you get support for the RK805, RK808, RK809, - RK817 and RK818 Power Management chips. + RK816, RK817 and RK818 Power Management chips. This driver provides common support for accessing the device through I2C interface. The device supports multiple sub-devices including interrupts, RTC, LDO & DCDC regulators, and onkey. diff --git a/drivers/mfd/rk8xx-core.c b/drivers/mfd/rk8xx-core.c index e2261b68b844..a616f159d8d4 100644 --- a/drivers/mfd/rk8xx-core.c +++ b/drivers/mfd/rk8xx-core.c @@ -28,6 +28,10 @@ static const struct resource rtc_resources[] = { DEFINE_RES_IRQ(RK808_IRQ_RTC_ALARM), }; +static const struct resource rk816_rtc_resources[] = { + DEFINE_RES_IRQ(RK816_IRQ_RTC_ALARM), +}; + static const struct resource rk817_rtc_resources[] = { DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM), }; @@ -87,6 +91,21 @@ static const struct mfd_cell rk808s[] = { }, }; +static const struct mfd_cell rk816s[] = { + { .name = "rk805-pinctrl", }, + { .name = "rk808-clkout", }, + { .name = "rk808-regulator", }, + { .name = "rk805-pwrkey", + .num_resources = ARRAY_SIZE(rk805_key_resources), + .resources = rk805_key_resources, + }, + { + .name = "rk808-rtc", + .num_resources = ARRAY_SIZE(rk816_rtc_resources), + .resources = rk816_rtc_resources, + }, +}; + static const struct mfd_cell rk817s[] = { { .name = "rk808-clkout", }, { .name = "rk808-regulator", }, @@ -148,6 +167,17 @@ static const struct rk808_reg_data rk808_pre_init_reg[] = { VB_LO_SEL_3500MV }, }; +static const struct rk808_reg_data rk816_pre_init_reg[] = { + { RK818_BUCK1_CONFIG_REG, RK817_RAMP_RATE_MASK, + RK817_RAMP_RATE_12_5MV_PER_US }, + { RK818_BUCK2_CONFIG_REG, RK817_RAMP_RATE_MASK, + RK817_RAMP_RATE_12_5MV_PER_US }, + { RK818_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_250MA }, + { RK808_THERMAL_REG, TEMP_HOTDIE_MSK, TEMP105C}, + { RK808_VB_MON_REG, VBAT_LOW_VOL_MASK | VBAT_LOW_ACT_MASK, + RK808_VBAT_LOW_3V0 | EN_VABT_LOW_SHUT_DOWN }, +}; + static const struct rk808_reg_data rk817_pre_init_reg[] = { {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP}, /* Codec specific registers */ @@ -350,6 +380,59 @@ static const struct regmap_irq rk808_irqs[] = { }, }; +static const unsigned int rk816_irq_status_offsets[] = { + (RK816_INT_STS_REG1 - RK816_INT_STS_REG1), + (RK816_INT_STS_REG2 - RK816_INT_STS_REG1), + (RK816_INT_STS_REG3 - RK816_INT_STS_REG1), +}; + +static const unsigned int rk816_irq_mask_offsets[] = { + (RK816_INT_STS_MSK_REG1 - RK816_INT_STS_MSK_REG1), + (RK816_INT_STS_MSK_REG2 - RK816_INT_STS_MSK_REG1), + (RK816_INT_STS_MSK_REG3 - RK816_INT_STS_MSK_REG1), +}; + +static const unsigned int rk816_get_irq_reg(struct regmap_irq_chip_data *data, + unsigned int base, int index) +{ + unsigned int irq_reg = base; + + switch (base) { + case RK816_INT_STS_REG1: + irq_reg += rk816_irq_status_offsets[index]; + break; + case RK816_INT_STS_MSK_REG1: + irq_reg += rk816_irq_mask_offsets[index]; + break; + } + + return irq_reg; +}; + +static const struct regmap_irq rk816_irqs[] = { + /* INT_STS_REG1 IRQs */ + REGMAP_IRQ_REG(RK816_IRQ_PWRON_FALL, 0, RK816_INT_STS_PWRON_FALL), + REGMAP_IRQ_REG(RK816_IRQ_PWRON_RISE, 0, RK816_INT_STS_PWRON_RISE), + + /* INT_STS_REG2 IRQs */ + REGMAP_IRQ_REG(RK816_IRQ_VB_LOW, 1, RK816_INT_STS_VB_LOW), + REGMAP_IRQ_REG(RK816_IRQ_PWRON, 1, RK816_INT_STS_PWRON), + REGMAP_IRQ_REG(RK816_IRQ_PWRON_LP, 1, RK816_INT_STS_PWRON_LP), + REGMAP_IRQ_REG(RK816_IRQ_HOTDIE, 1, RK816_INT_STS_HOTDIE), + REGMAP_IRQ_REG(RK816_IRQ_RTC_ALARM, 1, RK816_INT_STS_RTC_ALARM), + REGMAP_IRQ_REG(RK816_IRQ_RTC_PERIOD, 1, RK816_INT_STS_RTC_PERIOD), + REGMAP_IRQ_REG(RK816_IRQ_USB_OV, 1, RK816_INT_STS_USB_OV), + + /* INT_STS3 IRQs */ + REGMAP_IRQ_REG(RK816_IRQ_PLUG_IN, 2, RK816_INT_STS_PLUG_IN), + REGMAP_IRQ_REG(RK816_IRQ_PLUG_OUT, 2, RK816_INT_STS_PLUG_OUT), + REGMAP_IRQ_REG(RK816_IRQ_CHG_OK, 2, RK816_INT_STS_CHG_OK), + REGMAP_IRQ_REG(RK816_IRQ_CHG_TE, 2, RK816_INT_STS_CHG_TE), + REGMAP_IRQ_REG(RK816_IRQ_CHG_TS, 2, RK816_INT_STS_CHG_TS), + REGMAP_IRQ_REG(RK816_IRQ_CHG_CVTLIM, 2, RK816_INT_STS_CHG_CVTLIM), + REGMAP_IRQ_REG(RK816_IRQ_DISCHG_ILIM, 2, RK816_INT_STS_DISCHG_ILIM), +}; + static const struct regmap_irq rk818_irqs[] = { /* INT_STS */ [RK818_IRQ_VOUT_LO] = { @@ -482,6 +565,18 @@ static const struct regmap_irq_chip rk808_irq_chip = { .init_ack_masked = true, }; +static const struct regmap_irq_chip rk816_irq_chip = { + .name = "rk816", + .irqs = rk816_irqs, + .num_irqs = ARRAY_SIZE(rk816_irqs), + .num_regs = 3, + .get_irq_reg = rk816_get_irq_reg, + .status_base = RK816_INT_STS_REG1, + .mask_base = RK816_INT_STS_MSK_REG1, + .ack_base = RK816_INT_STS_REG1, + .init_ack_masked = true, +}; + static struct regmap_irq_chip rk817_irq_chip = { .name = "rk817", .irqs = rk817_irqs, @@ -530,6 +625,7 @@ static int rk808_power_off(struct sys_off_data *data) reg = RK817_SYS_CFG(3); bit = DEV_OFF; break; + case RK816_ID: case RK818_ID: reg = RK818_DEVCTRL_REG; bit = DEV_OFF; @@ -637,6 +733,13 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap cells = rk808s; nr_cells = ARRAY_SIZE(rk808s); break; + case RK816_ID: + rk808->regmap_irq_chip = &rk816_irq_chip; + pre_init_reg = rk816_pre_init_reg; + nr_pre_init_regs = ARRAY_SIZE(rk816_pre_init_reg); + cells = rk816s; + nr_cells = ARRAY_SIZE(rk816s); + break; case RK818_ID: rk808->regmap_irq_chip = &rk818_irq_chip; pre_init_reg = rk818_pre_init_reg; diff --git a/drivers/mfd/rk8xx-i2c.c b/drivers/mfd/rk8xx-i2c.c index 75b5cf09d5a0..69a6b297d723 100644 --- a/drivers/mfd/rk8xx-i2c.c +++ b/drivers/mfd/rk8xx-i2c.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Rockchip RK808/RK818 Core (I2C) driver + * Rockchip RK805/RK808/RK816/RK817/RK818 Core (I2C) driver * * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd * Copyright (C) 2016 PHYTEC Messtechnik GmbH @@ -49,6 +49,35 @@ static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg) return false; } +static bool rk816_is_volatile_reg(struct device *dev, unsigned int reg) +{ + /* + * Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but + * we don't use that feature. It's better to cache. + */ + + switch (reg) { + case RK808_SECONDS_REG ... RK808_WEEKS_REG: + case RK808_RTC_STATUS_REG: + case RK808_VB_MON_REG: + case RK808_THERMAL_REG: + case RK816_DCDC_EN_REG1: + case RK816_DCDC_EN_REG2: + case RK816_INT_STS_REG1: + case RK816_INT_STS_REG2: + case RK816_INT_STS_REG3: + case RK808_DEVCTRL_REG: + case RK816_SUP_STS_REG: + case RK816_GGSTS_REG: + case RK816_ZERO_CUR_ADC_REGH: + case RK816_ZERO_CUR_ADC_REGL: + case RK816_GASCNT_REG(0) ... RK816_BAT_VOL_REGL: + return true; + } + + return false; +} + static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg) { /* @@ -100,6 +129,14 @@ static const struct regmap_config rk808_regmap_config = { .volatile_reg = rk808_is_volatile_reg, }; +static const struct regmap_config rk816_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RK816_DATA_REG(18), + .cache_type = REGCACHE_MAPLE, + .volatile_reg = rk816_is_volatile_reg, +}; + static const struct regmap_config rk817_regmap_config = { .reg_bits = 8, .val_bits = 8, @@ -123,6 +160,11 @@ static const struct rk8xx_i2c_platform_data rk809_data = { .variant = RK809_ID, }; +static const struct rk8xx_i2c_platform_data rk816_data = { + .regmap_cfg = &rk816_regmap_config, + .variant = RK816_ID, +}; + static const struct rk8xx_i2c_platform_data rk817_data = { .regmap_cfg = &rk817_regmap_config, .variant = RK817_ID, @@ -161,6 +203,7 @@ static const struct of_device_id rk8xx_i2c_of_match[] = { { .compatible = "rockchip,rk805", .data = &rk805_data }, { .compatible = "rockchip,rk808", .data = &rk808_data }, { .compatible = "rockchip,rk809", .data = &rk809_data }, + { .compatible = "rockchip,rk816", .data = &rk816_data }, { .compatible = "rockchip,rk817", .data = &rk817_data }, { .compatible = "rockchip,rk818", .data = &rk818_data }, { }, diff --git a/include/linux/mfd/rk808.h b/include/linux/mfd/rk808.h index 78e167a92483..8b27fb2fafa8 100644 --- a/include/linux/mfd/rk808.h +++ b/include/linux/mfd/rk808.h @@ -113,6 +113,145 @@ enum rk808_reg { #define RK808_INT_STS_MSK_REG2 0x4f #define RK808_IO_POL_REG 0x50 +/* RK816 */ +enum rk816_reg { + RK816_ID_DCDC1, + RK816_ID_DCDC2, + RK816_ID_DCDC3, + RK816_ID_DCDC4, + RK816_ID_LDO1, + RK816_ID_LDO2, + RK816_ID_LDO3, + RK816_ID_LDO4, + RK816_ID_LDO5, + RK816_ID_LDO6, + RK816_ID_BOOST, + RK816_ID_OTG_SW, +}; + +enum rk816_irqs { + /* INT_STS_REG1 */ + RK816_IRQ_PWRON_FALL, + RK816_IRQ_PWRON_RISE, + + /* INT_STS_REG2 */ + RK816_IRQ_VB_LOW, + RK816_IRQ_PWRON, + RK816_IRQ_PWRON_LP, + RK816_IRQ_HOTDIE, + RK816_IRQ_RTC_ALARM, + RK816_IRQ_RTC_PERIOD, + RK816_IRQ_USB_OV, + + /* INT_STS_REG3 */ + RK816_IRQ_PLUG_IN, + RK816_IRQ_PLUG_OUT, + RK816_IRQ_CHG_OK, + RK816_IRQ_CHG_TE, + RK816_IRQ_CHG_TS, + RK816_IRQ_CHG_CVTLIM, + RK816_IRQ_DISCHG_ILIM, +}; + +/* power channel registers */ +#define RK816_DCDC_EN_REG1 0x23 + +#define RK816_DCDC_EN_REG2 0x24 +#define RK816_BOOST_EN BIT(1) +#define RK816_OTG_EN BIT(2) +#define RK816_BOOST_EN_MSK BIT(5) +#define RK816_OTG_EN_MSK BIT(6) +#define RK816_BUCK_DVS_CONFIRM BIT(7) + +#define RK816_LDO_EN_REG1 0x27 + +#define RK816_LDO_EN_REG2 0x28 + +/*interrupt registers and irq definitions*/ +#define RK816_INT_STS_REG1 0x49 +#define RK816_INT_STS_MSK_REG1 0x4a +#define RK816_INT_STS_PWRON_FALL BIT(5) +#define RK816_INT_STS_PWRON_RISE BIT(6) + +#define RK816_INT_STS_REG2 0x4c +#define RK816_INT_STS_MSK_REG2 0x4d +#define RK816_INT_STS_VB_LOW BIT(1) +#define RK816_INT_STS_PWRON BIT(2) +#define RK816_INT_STS_PWRON_LP BIT(3) +#define RK816_INT_STS_HOTDIE BIT(4) +#define RK816_INT_STS_RTC_ALARM BIT(5) +#define RK816_INT_STS_RTC_PERIOD BIT(6) +#define RK816_INT_STS_USB_OV BIT(7) + +#define RK816_INT_STS_REG3 0x4e +#define RK816_INT_STS_MSK_REG3 0x4f +#define RK816_INT_STS_PLUG_IN BIT(0) +#define RK816_INT_STS_PLUG_OUT BIT(1) +#define RK816_INT_STS_CHG_OK BIT(2) +#define RK816_INT_STS_CHG_TE BIT(3) +#define RK816_INT_STS_CHG_TS BIT(4) +#define RK816_INT_STS_CHG_CVTLIM BIT(6) +#define RK816_INT_STS_DISCHG_ILIM BIT(7) + +/* charger, boost and OTG registers */ +#define RK816_OTG_BUCK_LDO_CONFIG_REG 0x2a +#define RK816_CHRG_CONFIG_REG 0x2b +#define RK816_BOOST_ON_VESL_REG 0x54 +#define RK816_BOOST_SLP_VSEL_REG 0x55 +#define RK816_CHRG_BOOST_CONFIG_REG 0x9a +#define RK816_SUP_STS_REG 0xa0 +#define RK816_USB_CTRL_REG 0xa1 +#define RK816_CHRG_CTRL(x) (0xa3 + (x)) +#define RK816_BAT_CTRL_REG 0xa6 +#define RK816_BAT_HTS_TS_REG 0xa8 +#define RK816_BAT_LTS_TS_REG 0xa9 + +/* adc and fuel gauge registers */ +#define RK816_TS_CTRL_REG 0xac +#define RK816_ADC_CTRL_REG 0xad +#define RK816_GGCON_REG 0xb0 +#define RK816_GGSTS_REG 0xb1 +#define RK816_ZERO_CUR_ADC_REGH 0xb2 +#define RK816_ZERO_CUR_ADC_REGL 0xb3 +#define RK816_GASCNT_CAL_REG(x) (0xb7 - (x)) +#define RK816_GASCNT_REG(x) (0xbb - (x)) +#define RK816_BAT_CUR_AVG_REGH 0xbc +#define RK816_BAT_CUR_AVG_REGL 0xbd +#define RK816_TS_ADC_REGH 0xbe +#define RK816_TS_ADC_REGL 0xbf +#define RK816_USB_ADC_REGH 0xc0 +#define RK816_USB_ADC_REGL 0xc1 +#define RK816_BAT_OCV_REGH 0xc2 +#define RK816_BAT_OCV_REGL 0xc3 +#define RK816_BAT_VOL_REGH 0xc4 +#define RK816_BAT_VOL_REGL 0xc5 +#define RK816_RELAX_ENTRY_THRES_REGH 0xc6 +#define RK816_RELAX_ENTRY_THRES_REGL 0xc7 +#define RK816_RELAX_EXIT_THRES_REGH 0xc8 +#define RK816_RELAX_EXIT_THRES_REGL 0xc9 +#define RK816_RELAX_VOL1_REGH 0xca +#define RK816_RELAX_VOL1_REGL 0xcb +#define RK816_RELAX_VOL2_REGH 0xcc +#define RK816_RELAX_VOL2_REGL 0xcd +#define RK816_RELAX_CUR1_REGH 0xce +#define RK816_RELAX_CUR1_REGL 0xcf +#define RK816_RELAX_CUR2_REGH 0xd0 +#define RK816_RELAX_CUR2_REGL 0xd1 +#define RK816_CAL_OFFSET_REGH 0xd2 +#define RK816_CAL_OFFSET_REGL 0xd3 +#define RK816_NON_ACT_TIMER_CNT_REG 0xd4 +#define RK816_VCALIB0_REGH 0xd5 +#define RK816_VCALIB0_REGL 0xd6 +#define RK816_VCALIB1_REGH 0xd7 +#define RK816_VCALIB1_REGL 0xd8 +#define RK816_FCC_GASCNT_REG(x) (0xdc - (x)) +#define RK816_IOFFSET_REGH 0xdd +#define RK816_IOFFSET_REGL 0xde +#define RK816_SLEEP_CON_SAMP_CUR_REG 0xdf + +/* general purpose data registers 0xe0 ~ 0xf2 */ +#define RK816_DATA_REG(x) (0xe0 + (x)) + /* RK818 */ #define RK818_DCDC1 0 #define RK818_LDO1 4 @@ -791,6 +930,7 @@ enum rk806_dvs_mode { #define VOUT_LO_INT BIT(0) #define CLK32KOUT2_EN BIT(0) +#define TEMP105C 0x08 #define TEMP115C 0x0c #define TEMP_HOTDIE_MSK 0x0c #define SLP_SD_MSK (0x3 << 2) @@ -1191,6 +1331,7 @@ enum { RK806_ID = 0x8060, RK808_ID = 0x0000, RK809_ID = 0x8090, + RK816_ID = 0x8160, RK817_ID = 0x8170, RK818_ID = 0x8180, }; From patchwork Thu Mar 21 14:39:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 781685 Received: from mail-ej1-f43.google.com (mail-ej1-f43.google.com [209.85.218.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AFC1A8624D; Thu, 21 Mar 2024 14:39:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031986; cv=none; b=AsFY4D9Uly3TTDCGJKoBP6RUgpw/6Fc2CV9nUQLGJppaZOC55ZdQOrW05UVNt6mjzdgXKDGWtz7GYLbxdA6qcIOf4oPafGP8zQzjuffIXLKE4X/33wE29HXCiSRVDKl1JygsjpvU3HAooLvq++4zZWDd7aYgPhVvH/D3yDbZdmg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031986; c=relaxed/simple; bh=tJ9hbQiysGyoAPEFuwDReWE+Dwbl9fkBDGOp/9MxoTM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rTGH6J9KT9YOuTc3Pl4/FDGT5fvi5LZnCKeNU582xMx4i93d5Vs3TD4tppM729OJQtU3jrvwtyTsQYXF8r3YZwQKnKbnhteKFKU3Zpzy8LPYl5pxcATELeElsOzwUseae13VT56fsqpgjfxlUIslv2GW0rqJKhdu1isJoTr5hZk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=YKeQjSbp; arc=none smtp.client-ip=209.85.218.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="YKeQjSbp" Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-a4675aaa2e8so145886266b.0; Thu, 21 Mar 2024 07:39:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711031983; x=1711636783; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=twALFnMM+Yr/AtveAMdUdW9D1Ib6MBFOTxAn/sC1EOM=; b=YKeQjSbpOMZlreBG9l2p9JGZx7HKsdNL+I4K1b6sgp9ZJXfvchoqcw0ghqEViYWKsZ R148gHGorZVL2Oq3XWiwChqDC4cbmGHYOMTJAF525V7lf2VDH7wyeTMg21lLFvw4rOPW An4hGH5os0R4Ucm4xAE1Ne7BSh7KxGE5eAaIjhiNftG2CdKBZaJqW3BdADmr3qozO1pL LPiQ9K+2SozQ3XunJRxtQThm89x2pD5pQqYmZ6D0FRWb/isV+DQhXfqUCllYnJq7oURD 1Lfy269imRpDWpZk0qQRFAymPmtP1eFS8XCP35MoyuLU/3zfVW39PEhCboEOSpIfBHSr S9eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711031983; x=1711636783; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=twALFnMM+Yr/AtveAMdUdW9D1Ib6MBFOTxAn/sC1EOM=; b=Vv4/PsdayYiTQdyDkPrnQ1WZOBYODk/X1K9n5w7EQE66n+l7YuW301fkat+Hx3x8ec 7OcyjzL+NniS3g8c4cKFRMnqaNyxslSqmACXBtMhHTZs0asu/J6MO+M0lXoFG2Eap6Af NdENI5+9nMsgbV9yeg4gRlG0CGwS37/ILjX6LY/D/iynNVlNqBls4BJ7RulHaNKZWf1s mqYJcm+cdKIYe79bqG5Yjjs4F2EmrIq60suY8PXxCP7Ocm8OoMI9ypNWxZZxonNvWCM2 3BM8X4JxTUWJ3SsBrlHHOd8C2eJXbidpwcLtqf/LPlyn0vQcoFJ0tHxmoFS/4g7Vjwst zgUQ== X-Forwarded-Encrypted: i=1; AJvYcCWcjyf64ZOoUrGYhIZvgP3hvMcfKPkL2PFUzHBQfkXQP0xH6dXnOe7DS4PbLNzcxw64mysaNZkhc2svQAscFBLADZS+4z/NAVE9eZ4JTUaRaMIShCI+gfU4QKeOsASZNcQjp7/qVyp/JdulPi5JK2O2tN71/UHt6YMer8U2QY1BoPRRGEw= X-Gm-Message-State: AOJu0YwoMjJ8Sk9JhTRqECOAJ6nKrS3Vsrqkj6qRwcCiiTc9Um3WkpmA ktznULucJati/jpbQco9XjhAbs9EwIo3iCqWR4vG2CV+o3z1u1w= X-Google-Smtp-Source: AGHT+IHHA5j+8Uv6vMC1shrAnIAOqjVLHuTxodIzbNrCfwgHuprghUuMvhHuxk7nkEZPu7NmVb//+A== X-Received: by 2002:a17:906:ca54:b0:a46:f564:ff80 with SMTP id jx20-20020a170906ca5400b00a46f564ff80mr1568277ejb.68.1711031982941; Thu, 21 Mar 2024 07:39:42 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:b39:dab4:8e20:e918]) by smtp.gmail.com with ESMTPSA id e3-20020a170906248300b00a46abaeeb1csm6147923ejb.104.2024.03.21.07.39.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Mar 2024 07:39:42 -0700 (PDT) From: Alex Bee To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Linus Walleij , Liam Girdwood , Mark Brown Cc: Chris Zhong , Zhang Qing , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Alex Bee Subject: [PATCH 3/5] pinctrl: rk805: Add rk816 pinctrl support Date: Thu, 21 Mar 2024 15:39:11 +0100 Message-ID: <20240321143911.90210-6-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240321143911.90210-2-knaerzche@gmail.com> References: <20240321143911.90210-2-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This adds support for RK816 to the exising rk805 pinctrl driver It has a single pin which can be configured as input from a thermistor (for instance in an attached battery) or as a gpio. Signed-off-by: Alex Bee --- drivers/pinctrl/pinctrl-rk805.c | 68 +++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rk805.c b/drivers/pinctrl/pinctrl-rk805.c index 56d916f2cee6..cf0305477e7a 100644 --- a/drivers/pinctrl/pinctrl-rk805.c +++ b/drivers/pinctrl/pinctrl-rk805.c @@ -93,6 +93,11 @@ enum rk806_pinmux_option { RK806_PINMUX_FUN5, }; +enum rk816_pinmux_option { + RK816_PINMUX_GPIO, + RK816_PINMUX_TS, +}; + enum { RK805_GPIO0, RK805_GPIO1, @@ -104,6 +109,10 @@ enum { RK806_GPIO_DVS3 }; +enum { + RK816_GPIO0, +}; + static const char *const rk805_gpio_groups[] = { "gpio0", "gpio1", @@ -115,6 +124,10 @@ static const char *const rk806_gpio_groups[] = { "gpio_pwrctrl3", }; +static const char *const rk816_gpio_groups[] = { + "gpio0", +}; + /* RK805: 2 output only GPIOs */ static const struct pinctrl_pin_desc rk805_pins_desc[] = { PINCTRL_PIN(RK805_GPIO0, "gpio0"), @@ -128,6 +141,11 @@ static const struct pinctrl_pin_desc rk806_pins_desc[] = { PINCTRL_PIN(RK806_GPIO_DVS3, "gpio_pwrctrl3"), }; +/* RK816 */ +static const struct pinctrl_pin_desc rk816_pins_desc[] = { + PINCTRL_PIN(RK816_GPIO0, "gpio0"), +}; + static const struct rk805_pin_function rk805_pin_functions[] = { { .name = "gpio", @@ -176,6 +194,21 @@ static const struct rk805_pin_function rk806_pin_functions[] = { }, }; +static const struct rk805_pin_function rk816_pin_functions[] = { + { + .name = "gpio", + .groups = rk816_gpio_groups, + .ngroups = ARRAY_SIZE(rk816_gpio_groups), + .mux_option = RK816_PINMUX_GPIO, + }, + { + .name = "ts", + .groups = rk816_gpio_groups, + .ngroups = ARRAY_SIZE(rk816_gpio_groups), + .mux_option = RK816_PINMUX_TS, + }, +}; + static const struct rk805_pin_group rk805_pin_groups[] = { { .name = "gpio0", @@ -207,6 +240,14 @@ static const struct rk805_pin_group rk806_pin_groups[] = { } }; +static const struct rk805_pin_group rk816_pin_groups[] = { + { + .name = "gpio0", + .pins = { RK816_GPIO0 }, + .npins = 1, + }, +}; + #define RK805_GPIO0_VAL_MSK BIT(0) #define RK805_GPIO1_VAL_MSK BIT(1) @@ -255,6 +296,19 @@ static struct rk805_pin_config rk806_gpio_cfgs[] = { } }; +#define RK816_FUN_MASK BIT(2) +#define RK816_VAL_MASK BIT(3) +#define RK816_DIR_MASK BIT(4) + +static struct rk805_pin_config rk816_gpio_cfgs[] = { + { + .reg = RK818_IO_POL_REG, + .val_msk = RK816_VAL_MASK, + .fun_msk = RK816_FUN_MASK, + .dir_msk = RK816_DIR_MASK, + }, +}; + /* generic gpio chip */ static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset) { @@ -439,6 +493,8 @@ static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev, return _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO); case RK806_ID: return _rk805_pinctrl_set_mux(pctldev, offset, RK806_PINMUX_FUN5); + case RK816_ID: + return _rk805_pinctrl_set_mux(pctldev, offset, RK816_PINMUX_GPIO); } return -ENOTSUPP; @@ -588,6 +644,18 @@ static int rk805_pinctrl_probe(struct platform_device *pdev) pci->pin_cfg = rk806_gpio_cfgs; pci->gpio_chip.ngpio = ARRAY_SIZE(rk806_gpio_cfgs); break; + case RK816_ID: + pci->pins = rk816_pins_desc; + pci->num_pins = ARRAY_SIZE(rk816_pins_desc); + pci->functions = rk816_pin_functions; + pci->num_functions = ARRAY_SIZE(rk816_pin_functions); + pci->groups = rk816_pin_groups; + pci->num_pin_groups = ARRAY_SIZE(rk816_pin_groups); + pci->pinctrl_desc.pins = rk816_pins_desc; + pci->pinctrl_desc.npins = ARRAY_SIZE(rk816_pins_desc); + pci->pin_cfg = rk816_gpio_cfgs; + pci->gpio_chip.ngpio = ARRAY_SIZE(rk816_gpio_cfgs); + break; default: dev_err(&pdev->dev, "unsupported RK805 ID %lu\n", pci->rk808->variant); From patchwork Thu Mar 21 14:39:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 781911 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB64686256; Thu, 21 Mar 2024 14:39:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031987; cv=none; b=bDJhVpb/ApyBhRNcs9nQ65kS2+xUB02auMR7v6DHGfsnRZVCornEtRONu8HBPgaqodOV1bOa6yXoitU60gs/F9LsKzBzb/HA/39540vLhIuf6b/eiOU1A0StxQbAD/FrLtcXyYErU996cy/AM7NClM7+6nm88c1BIAPn5v8FgUo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031987; c=relaxed/simple; bh=vnmE19zTDbQRmq0wlWnWJ4jiLaVlkiQiimfWdUTie2I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=r7CeiCIoxsiPNMBa70pu/SZtoNsKbYu7AvUplEJWVjz20npzEQXixw10NAoI1XFQQOo7qLlNMicZ/rL98M7XE0rReiFFgHycbKo8A32PE/L+2wGk8UVKLM5GCnskDvoQZx4A6y70e1U1TC+mzzHWdC1toLHdVD2h4hZ+UJAauCE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=VjrIB8hv; arc=none smtp.client-ip=209.85.218.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VjrIB8hv" Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-a450bedffdfso128564566b.3; Thu, 21 Mar 2024 07:39:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711031984; x=1711636784; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LydLOROwhTaCdZynw6Kh4hckrTZmMO+b98vvkEN6A+s=; b=VjrIB8hvTlyM3meMfUY6hmSYv9L43XT4X4niNccH9ytriUHJuAkQmniKRLP2LAYlXe nSXvFne4rEcsZi9llGKxupZVPQGNzs0MR0HmeoZBNRzO5omPhMWN5TbbbfCjLRqLC0tn axQM+a9ryze6JQqjtR217HEvx02oUEsgEluwy2GqWeRF+/XaTkrqbN5WJNerRwB6KX4h FHxCVKKDEoTOJ0rFdEZaX+W3T4Zz06/XN8wky0H/McbO+fk9AUQ3g5q7+T9vve6y94hl owJ/7dt5aqJfVcIhHGrMSCC6ziCLnSd6k1QK46DQ495T1S3JkyCBEPZvaJbLV4g90q91 RjDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711031984; x=1711636784; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LydLOROwhTaCdZynw6Kh4hckrTZmMO+b98vvkEN6A+s=; b=uhum54Ig7KgUi5tr4aw3GR8Ezuq2JUQCyk+wP2xdepxyH5p3lmlyqv31n1qk3t64r0 5wGuw5MMBgGZx5Yvs8YEduByuguUCdKPFOtb3Ocf8oUHN4+iNyIN0Ud4J6N2Ny9QgViY ocZh45JZeNUBCeGAHkHu22Tvp1VKxSTpJLwQ7oGmurktwo+YxHvnoRvM6hvzazhS1L74 7vuCOa1lPK9fsWuedflM1fiWfPXbgj1Rl67srAqNFgqUL8Hn619gzhh9mWnWHwJV2tVT V6d6/c0Jbt6fWfCHDNRmMTbhYxGpx00Rjplw0NsLaxNqEmKAucnycVnhlrMG78F6DX2R F+UQ== X-Forwarded-Encrypted: i=1; AJvYcCXB7+A6cQyzGarbiVIGKtgLvrNwanET+VNR4jJWaDIRW3fI9GxIi1ZA4uF+Lxzrl1lpLSBSJBYfZZVWHgtN/JHuQPN1GOdIR6bc72MJLGJQYxpe/edCt58Tt/NXgSIldFOwShuyFNsRqhAyu1oRGCqeNoX8+vMM4opkJeel+t4DU67RBB0= X-Gm-Message-State: AOJu0YxWbr7T+xhhhhj121sxRlvpVeGR8AmxegNpi2G4pIsPa7z+MFqR zUouSnSN/I+w94lNk9SgasCmRb160/uBudqxCvv7UXrNLtV3Qgw= X-Google-Smtp-Source: AGHT+IHH3uZgNQyrPnC5b0jWraJRMEbzRmtQtPcEw0er8UiT9MbitrNSKUukclX6EZyeBR499tLRkg== X-Received: by 2002:a17:906:f908:b0:a46:ecdd:6a2 with SMTP id lc8-20020a170906f90800b00a46ecdd06a2mr4149893ejb.53.1711031984307; Thu, 21 Mar 2024 07:39:44 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:b39:dab4:8e20:e918]) by smtp.gmail.com with ESMTPSA id e3-20020a170906248300b00a46abaeeb1csm6147923ejb.104.2024.03.21.07.39.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Mar 2024 07:39:44 -0700 (PDT) From: Alex Bee To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Linus Walleij , Liam Girdwood , Mark Brown Cc: Chris Zhong , Zhang Qing , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Alex Bee Subject: [PATCH 4/5] regulator: rk808: Support apply_bit for rk808_set_suspend_voltage_range Date: Thu, 21 Mar 2024 15:39:12 +0100 Message-ID: <20240321143911.90210-7-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240321143911.90210-2-knaerzche@gmail.com> References: <20240321143911.90210-2-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 rk808_set_suspend_voltage_range currently does not account the existence of apply_bit/apply_reg. This adds support for those in same way it is done in regulator_set_voltage_sel_regmap and is required for the upcoming RK816 support Signed-off-by: Alex Bee --- drivers/regulator/rk808-regulator.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c index d89ae7f16d7a..a6a563e402d0 100644 --- a/drivers/regulator/rk808-regulator.c +++ b/drivers/regulator/rk808-regulator.c @@ -534,15 +534,25 @@ static int rk808_set_suspend_voltage_range(struct regulator_dev *rdev, int uv) { unsigned int reg; int sel = regulator_map_voltage_linear_range(rdev, uv, uv); + int ret; if (sel < 0) return -EINVAL; reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; - return regmap_update_bits(rdev->regmap, reg, - rdev->desc->vsel_mask, - sel); + ret = regmap_update_bits(rdev->regmap, reg, + rdev->desc->vsel_mask, + sel); + if (ret) + return ret; + + if (rdev->desc->apply_bit) + ret = regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, + rdev->desc->apply_bit, + rdev->desc->apply_bit); + + return ret; } static int rk805_set_suspend_enable(struct regulator_dev *rdev) From patchwork Thu Mar 21 14:39:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Bee X-Patchwork-Id: 781684 Received: from mail-ej1-f41.google.com (mail-ej1-f41.google.com [209.85.218.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF7F285624; Thu, 21 Mar 2024 14:39:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031989; cv=none; b=ory7QGnMci/8v9UGcPDApv8iCxI15Z5M2NuDlYpNY2sY+z/RvtQ1fAOq350A1ysXDUmVL7vtnSGOZxaaB6WtYhZDOwRH57mXG8lxB788PhDuauMR0aqjc9TSBTmudyXTRIfqMQMcdh+MzLR2cAa/PJNWWQcF9bxFYWQ+IULo4DY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711031989; c=relaxed/simple; bh=nD6bMf7Xr8n3v+b5OzhAL7f+FUoIz+AiyDQfstHETQY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=K/cyoko+8Yk1khe4zwMavanG7i6VrRVrnMC7Vk7J5QcAl+wWP5hsw7xbw3O8CIED38t6dDZdlRM4FcgIKJSQkrBInk4PpzxiaKCjzfgu4X5cAHeNQrUMq5aX7I4Xr/7obVzwJNGmwLiS4uGVIeM+eV5HICLMynRjNPf0Bqnuwbs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=bu55E+89; arc=none smtp.client-ip=209.85.218.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bu55E+89" Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-a46f0da1b4fso140408566b.2; Thu, 21 Mar 2024 07:39:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1711031986; x=1711636786; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OXdUi70LVWiCFaEv3hJR6QqlTeECRXc1VTJKBn3DQG8=; b=bu55E+89ZhlJaXTmF2BgImiSgMF1HoNwc5eucR6CdrLTd/Krm7Q0pQex58B3i04n39 YeBw0CfeBpzFWaB8/16S35ZP26s/isUFAnSjEbaF79r4lZCihWsamCp+KpxGmatgIVgk PN+XW4hV6Agrpdonb4Ju4U/r1rjDeFw9Lt7AVWj/A3vrHbTv1CDsIS9Ih+TH27U3skuq vfbNTnhqPgJAZ+N8ZokN3knvh/qopLju3okVQXF6J5gRLwXAmhSl1wiCh50fIfauhMk6 HQA2OP51jO0TJDlRS7QdmYzcbTpkWckrsssbQPl6tasDJoY9YxfjmL9PleCtQ3UvuZS7 GOAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711031986; x=1711636786; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OXdUi70LVWiCFaEv3hJR6QqlTeECRXc1VTJKBn3DQG8=; b=CAUo+z19oOWdw/jgLsCCBSEVRmAbqoRkVemFeQNT0bTdEOR+byw+mxHmA/+JU5nzS/ Pi4eRgewyQJ5W1QWVIuhV/2TPtaDq6zyBygGw4wlurEKV+5tZJjgbzJH3YnQDA4Pq+r4 OHfQ1R9x93/JVsBcJ3LtlwsgKm9gX9eIWGDsG6Kry+BPD0iLQjUL5leyHXoLs7S5LpVX w9ZRrfjh1vg+lNKwyFUtF4ZD7MiCLF3wJUCLpDt2IRkEISdm0FwbGNydSKueOPSZchDn IIo+v55PgvKuToavKOYndsr66w+on7uMScYKknkl4i2HZo9Wv261zh8DAsO8bm/deWh2 l9KA== X-Forwarded-Encrypted: i=1; AJvYcCUGAaoE65tJaAyh3vh+lyjtacH5fJsFJOCScgzFHIboP/f0XeBjmbWCCtQ8sIXLw7MOmttuR+mNCXwf+EjXM1k5JkmqUXsYvVkz8z2nnIgT8Xx9DaH9ZQRPWjJfxUcHbdi2NFp+8ZBKV0UafBegLmEVbEzPnocGfgVOG8VK+0K1NSWl+cc= X-Gm-Message-State: AOJu0YxQujKffi9B4f4rp9g4ihNm58uUnw21LJr4uv1w5pPjBuL03tpg AY2YZ3NSSPUkqRAJOPAR45UDJG2+kJSy9KHCmy/rRBFuFg5l8zc= X-Google-Smtp-Source: AGHT+IEvmqJxcgqCs9F+eugbA6eGhxim0tnRpaHrzHeGvksZYvis0wjT7sLG+3A8uZaxlaeZJkatXg== X-Received: by 2002:a17:906:e2c6:b0:a47:fdd:e97d with SMTP id gr6-20020a170906e2c600b00a470fdde97dmr1586471ejb.51.1711031986124; Thu, 21 Mar 2024 07:39:46 -0700 (PDT) Received: from U4.lan ([2a02:810b:f40:4600:b39:dab4:8e20:e918]) by smtp.gmail.com with ESMTPSA id e3-20020a170906248300b00a46abaeeb1csm6147923ejb.104.2024.03.21.07.39.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Mar 2024 07:39:45 -0700 (PDT) From: Alex Bee To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Linus Walleij , Liam Girdwood , Mark Brown Cc: Chris Zhong , Zhang Qing , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Alex Bee Subject: [PATCH 5/5] regulator: rk808: Add RK816 support Date: Thu, 21 Mar 2024 15:39:13 +0100 Message-ID: <20240321143911.90210-8-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240321143911.90210-2-knaerzche@gmail.com> References: <20240321143911.90210-2-knaerzche@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for rk816 to the exisiting rk808 regulator driver. The infrastructure of the driver can be re-used as is. A peculiarity for this version is, that BUCK1/BUCK2 have a (common) bit which needs to toggled after a voltage change to "confirm" the change. Regulator regmap takes care of that by defining a apply_bit and apply_reg for those regulators. Signed-off-by: Alex Bee --- drivers/regulator/rk808-regulator.c | 202 +++++++++++++++++++++++++++- 1 file changed, 201 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c index a6a563e402d0..7a9cd991039b 100644 --- a/drivers/regulator/rk808-regulator.c +++ b/drivers/regulator/rk808-regulator.c @@ -158,6 +158,11 @@ RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ _vmask, _ereg, _emask, 0, 0, _etime, &rk808_reg_ops) +#define RK816_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _disval, _etime) \ + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ + _vmask, _ereg, _emask, _emask, _disval, _etime, &rk816_reg_ops) + #define RK817_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ _vmask, _ereg, _emask, _disval, _etime) \ RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ @@ -258,7 +263,7 @@ static const unsigned int rk808_buck1_2_ramp_table[] = { 2000, 4000, 6000, 10000 }; -/* RK817 RK809 */ +/* RK817/RK809/RK816 (buck 1/2 only) */ static const unsigned int rk817_buck1_4_ramp_table[] = { 3000, 6300, 12500, 25000 }; @@ -640,6 +645,38 @@ static int rk808_set_suspend_disable(struct regulator_dev *rdev) rdev->desc->enable_mask); } +static const struct rk8xx_register_bit rk816_suspend_bits[] = { + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 0), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 1), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 2), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 3), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 0), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 1), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 2), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 3), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 4), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG2, 5), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 5), + RK8XX_REG_BIT(RK818_SLEEP_SET_OFF_REG1, 6), +}; + +static int rk816_set_suspend_enable(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + + return regmap_update_bits(rdev->regmap, rk816_suspend_bits[rid].reg, + rk816_suspend_bits[rid].bit, + rk816_suspend_bits[rid].bit); +} + +static int rk816_set_suspend_disable(struct regulator_dev *rdev) +{ + int rid = rdev_get_id(rdev); + + return regmap_update_bits(rdev->regmap, rk816_suspend_bits[rid].reg, + rk816_suspend_bits[rid].bit, 0); +} + static int rk817_set_suspend_enable_ctrl(struct regulator_dev *rdev, unsigned int en) { @@ -913,6 +950,54 @@ static const struct regulator_ops rk809_buck5_ops_range = { .set_suspend_disable = rk817_set_suspend_disable, }; +static const struct regulator_ops rk816_buck1_2_ops_ranges = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = rk8xx_set_mode, + .get_mode = rk8xx_get_mode, + .set_suspend_mode = rk8xx_set_suspend_mode, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + +static const struct regulator_ops rk816_buck4_ops_ranges = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_mode = rk8xx_set_mode, + .get_mode = rk8xx_get_mode, + .set_suspend_mode = rk8xx_set_suspend_mode, + .set_suspend_voltage = rk808_set_suspend_voltage_range, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + +static const struct regulator_ops rk816_reg_ops = { + .list_voltage = regulator_list_voltage_linear, + .map_voltage = regulator_map_voltage_linear, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = rk8xx_is_enabled_wmsk_regmap, + .set_suspend_voltage = rk808_set_suspend_voltage, + .set_suspend_enable = rk816_set_suspend_enable, + .set_suspend_disable = rk816_set_suspend_disable, +}; + static const struct regulator_ops rk817_reg_ops = { .list_voltage = regulator_list_voltage_linear, .map_voltage = regulator_map_voltage_linear, @@ -1392,6 +1477,117 @@ static const struct regulator_desc rk809_reg[] = { DISABLE_VAL(3)), }; +static const struct linear_range rk816_buck_4_voltage_ranges[] = { + REGULATOR_LINEAR_RANGE(800000, 0, 26, 100000), + REGULATOR_LINEAR_RANGE(3500000, 27, 31, 0), +}; + +static const struct regulator_desc rk816_reg[] = { + { + .name = "DCDC_REG1", + .supply_name = "vcc1", + .of_match = of_match_ptr("DCDC_REG1"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC1, + .ops = &rk816_buck1_2_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 64, + .linear_ranges = rk805_buck_1_2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), + .vsel_reg = RK818_BUCK1_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .apply_reg = RK816_DCDC_EN_REG2, + .apply_bit = RK816_BUCK_DVS_CONFIRM, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(4) | BIT(0), + .enable_val = BIT(4) | BIT(0), + .disable_val = BIT(4), + .ramp_reg = RK818_BUCK1_CONFIG_REG, + .ramp_mask = RK808_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG2", + .supply_name = "vcc2", + .of_match = of_match_ptr("DCDC_REG2"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC2, + .ops = &rk816_buck1_2_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 64, + .linear_ranges = rk805_buck_1_2_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk805_buck_1_2_voltage_ranges), + .vsel_reg = RK818_BUCK2_ON_VSEL_REG, + .vsel_mask = RK818_BUCK_VSEL_MASK, + .apply_reg = RK816_DCDC_EN_REG2, + .apply_bit = RK816_BUCK_DVS_CONFIRM, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(5) | BIT(1), + .enable_val = BIT(5) | BIT(1), + .disable_val = BIT(5), + .ramp_reg = RK818_BUCK2_CONFIG_REG, + .ramp_mask = RK808_RAMP_RATE_MASK, + .ramp_delay_table = rk817_buck1_4_ramp_table, + .n_ramp_values = ARRAY_SIZE(rk817_buck1_4_ramp_table), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG3", + .supply_name = "vcc3", + .of_match = of_match_ptr("DCDC_REG3"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC3, + .ops = &rk808_switch_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 1, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(6) | BIT(2), + .enable_val = BIT(6) | BIT(2), + .disable_val = BIT(6), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, { + .name = "DCDC_REG4", + .supply_name = "vcc4", + .of_match = of_match_ptr("DCDC_REG4"), + .regulators_node = of_match_ptr("regulators"), + .id = RK816_ID_DCDC4, + .ops = &rk816_buck4_ops_ranges, + .type = REGULATOR_VOLTAGE, + .n_voltages = 32, + .linear_ranges = rk816_buck_4_voltage_ranges, + .n_linear_ranges = ARRAY_SIZE(rk816_buck_4_voltage_ranges), + .vsel_reg = RK818_BUCK4_ON_VSEL_REG, + .vsel_mask = RK818_BUCK4_VSEL_MASK, + .enable_reg = RK816_DCDC_EN_REG1, + .enable_mask = BIT(7) | BIT(3), + .enable_val = BIT(7) | BIT(3), + .disable_val = BIT(7), + .of_map_mode = rk8xx_regulator_of_map_mode, + .owner = THIS_MODULE, + }, + RK816_DESC(RK816_ID_LDO1, "LDO_REG1", "vcc5", 800, 3400, 100, + RK818_LDO1_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(0), DISABLE_VAL(0), 400), + RK816_DESC(RK816_ID_LDO2, "LDO_REG2", "vcc5", 800, 3400, 100, + RK818_LDO2_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(1), DISABLE_VAL(1), 400), + RK816_DESC(RK816_ID_LDO3, "LDO_REG3", "vcc5", 800, 3400, 100, + RK818_LDO3_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(2), DISABLE_VAL(2), 400), + RK816_DESC(RK816_ID_LDO4, "LDO_REG4", "vcc6", 800, 3400, 100, + RK818_LDO4_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG1, ENABLE_MASK(3), DISABLE_VAL(3), 400), + RK816_DESC(RK816_ID_LDO5, "LDO_REG5", "vcc6", 800, 3400, 100, + RK818_LDO5_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG2, ENABLE_MASK(0), DISABLE_VAL(0), 400), + RK816_DESC(RK816_ID_LDO6, "LDO_REG6", "vcc6", 800, 3400, 100, + RK818_LDO6_ON_VSEL_REG, RK818_LDO_VSEL_MASK, + RK816_LDO_EN_REG2, ENABLE_MASK(1), DISABLE_VAL(1), 400), +}; + static const struct regulator_desc rk817_reg[] = { { .name = "DCDC_REG1", @@ -1714,6 +1910,10 @@ static int rk808_regulator_probe(struct platform_device *pdev) regulators = rk809_reg; nregulators = RK809_NUM_REGULATORS; break; + case RK816_ID: + regulators = rk816_reg; + nregulators = ARRAY_SIZE(rk816_reg); + break; case RK817_ID: regulators = rk817_reg; nregulators = RK817_NUM_REGULATORS;