From patchwork Thu Oct 10 20:30:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 175875 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp2817105ill; Thu, 10 Oct 2019 13:51:59 -0700 (PDT) X-Google-Smtp-Source: APXvYqxobsGWV5oRM8dP8Hq60AaWD6tk4vXv4fgrZQuggNIuk5aOOjmVko2CcQoKwhP9CCRZZfmc X-Received: by 2002:a05:6402:503:: with SMTP id m3mr10216577edv.157.1570740719260; Thu, 10 Oct 2019 13:51:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570740719; cv=none; d=google.com; s=arc-20160816; b=xV5vcHtYP2hwmjj/I7HtWuDirA5ZIP9o51DmWWWManLU+KDHB5U2aa9SG139WRTzp2 a9A5pkhqkDr9LhRIiBxwm1bi31DdvvDX6D7MDsCc3VU2NPmN/dM9oyMJ0VPZrSzbOZ9v XvRt3LPbt/6WlNVa5bgi8z5uBxFTvltZf7RApSxhIIf038L/snoYcZP1eeWG1CAMvP7n c5Eh2DA+vOUYYVfZYc7siBQd1hvysnoj3G5wbRfhlhDrkPSslpLUnLnomBG82C+O40G1 J9WUQsff1lqDLpNMZOCubZZnvXGa7rWnQUnPuKktIqNJneoBosDZBFolXNib5n2vwAw3 f9qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=OMmB9j8LwvCy066twJQdBvVFNChhi8Ao4u75mMyl/GE=; b=eYCfVFPE2frGP9IGqajJGs253NRj+BbFORHWQt9NvNtrhe0Wrwzy8k6799XUulSvRL hf4ZFaktZX4Vz0gDywm0/mqYy+UOorOK3GaRTgtxuLX343FFZxytCpApn8yOqcv/W1Hn hSer6kknJPZhTyg/VOVucjJW+P7CnXuk2uVGNydhVd/2wI7cKT4Xf6NASpqzzPgX01Xo kIVgPL1QaNygRhnpkjmtWG4e3th2IrORcGjL30esILWdBfj8suGfK8+oV/vKzHJHwDa9 OoVcOI9LDBwiiTOWV4+F1MzA98UkAFADfwNHB5bS46LITbwA503h+a7+osVxPQheneHu RnLQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g38si4454495edg.127.2019.10.10.13.51.59; Thu, 10 Oct 2019 13:51:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726595AbfJJUv6 (ORCPT + 10 others); Thu, 10 Oct 2019 16:51:58 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:43081 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725867AbfJJUv6 (ORCPT ); Thu, 10 Oct 2019 16:51:58 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MElhb-1iK3Fg1ttL-00GGXZ; Thu, 10 Oct 2019 22:51:47 +0200 From: Arnd Bergmann To: Kukjin Kim , Krzysztof Kozlowski , "Rafael J. Wysocki" , Viresh Kumar Cc: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, Arnd Bergmann , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 29/36] ARM: s3c: cpufreq: split out registers Date: Thu, 10 Oct 2019 22:30:13 +0200 Message-Id: <20191010203043.1241612-29-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20191010203043.1241612-1-arnd@arndb.de> References: <20191010202802.1132272-1-arnd@arndb.de> <20191010203043.1241612-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:bYQlhXWih+C+Vcg6wO+eWmRG6N2NRKtj6W4Hj2uqCeTtCslL0ZM 9F8De2sKc7IKBqRY2Nooec09SugipJalqwYSBuom/M0Q7jMOU80rbBavRj/rupElvHljI9R 7wVD6N+xlArvPcXU7uItBt/J/DMkMKw+rjtCrZ6Dvks52NCAIf/R/bydDOuefGky+4kj3uG 5FzyYB+d0Q7IUdCX/eR3w== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:2I5d1BQgx7M=:/O1F8DhCPGZVpo6kO5MbB/ qMPymzDv9efv3DZA3gPjkQK1K3WnXOpZs8B/HcC7sj9w95ARoeV5v//SqkJ/2bc0oxufpc4uV Udphzs7KpKDwHAQaSUw8X7PcsBoIjtBencMvhaDlS0ac+pqCSoHLx81VaNagzEnjlGR466nyo Y7BT3EJ3TnYITjiEYYhD9N1ikODxKBNDCopdUAVhSY+ljf5ecCiQf9SM0us40TuIQ8y2k6ENf UWacDF3jEYZfZIBnFX1pUOKWQYUA3ogZ22s0JCT9m0RBW6IHejwo9Q3Gl8EGZpoUdFLryWLqU Cl1dzvkaQ59rkGl+LgVqZF/67QhRhp1qaZQuJyIcvi4ooCmZ2efq3JY4HMAijLAf4jY9soaAz sP9PIhvkudaX1CfiRIjwiovnkg2HtpVt8Z6w9kpEZzQolrzZff/strXT7rRG6OiWa/Qhude6O gW3ahYATIlh4MsukJGXTxDN/GdjzuaYyr9pP7OEpMIYPqAldBUXZHH3yRKvbyCII27zAW2SBR yjIylHgLS98O67iGjD6hLQLgRWMd4CxH12bJXckcZwwco9rbVtOKblDUlFH3bExyPj+5+bmAq LbbUSesRDUasSBaaJcs/R+LOAmGiUjX7tJQQ26drw9NqRu0D3AaB1v1b4KnswjhV63TBmIrqv lEeEiEStguiEVr218efJgCJu9BsJAopwwmhq4hh3JYwurzqeXQ2zVd/0DpW48FzAS61Z3IdRs NPKMd2BAn+/iM/8I7XmpPAEtQHrgXC9r0f422rSDMG4thRdLPiAFpk66T/cAQuZonxIRLUR86 vZOOG31X8p5OoyumdQtQIEpd3ef2mVWOHU2KCwOURMkByefla25RlWmrS4bSwVMHFXxAGEhUJ 1lpOGF9ABUlW1DKygohw== Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Each of the cpufreq drivers uses a fixed set of register bits, copy those definitions into the drivers to avoid including mach/regs-clock.h. Signed-off-by: Arnd Bergmann --- drivers/cpufreq/s3c2410-cpufreq.c | 11 +++++++++-- drivers/cpufreq/s3c2412-cpufreq.c | 20 +++++++++++++++++++- drivers/cpufreq/s3c2440-cpufreq.c | 24 ++++++++++++++++++++++-- drivers/cpufreq/s3c24xx-cpufreq.c | 4 +++- 4 files changed, 53 insertions(+), 6 deletions(-) -- 2.20.0 diff --git a/drivers/cpufreq/s3c2410-cpufreq.c b/drivers/cpufreq/s3c2410-cpufreq.c index 0c4f2ccd7e22..5c6cb590b63f 100644 --- a/drivers/cpufreq/s3c2410-cpufreq.c +++ b/drivers/cpufreq/s3c2410-cpufreq.c @@ -20,11 +20,18 @@ #include #include -#include - #include #include +#include + +#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) + +#define S3C2410_CLKDIVN S3C2410_CLKREG(0x14) + +#define S3C2410_CLKDIVN_PDIVN (1<<0) +#define S3C2410_CLKDIVN_HDIVN (1<<1) + /* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */ static void s3c2410_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) diff --git a/drivers/cpufreq/s3c2412-cpufreq.c b/drivers/cpufreq/s3c2412-cpufreq.c index 53385a9ab957..d922d0d47c80 100644 --- a/drivers/cpufreq/s3c2412-cpufreq.c +++ b/drivers/cpufreq/s3c2412-cpufreq.c @@ -23,12 +23,30 @@ #include #include -#include #include #include #include +#include + +#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) + +#define S3C2410_CLKDIVN S3C2410_CLKREG(0x14) + +#define S3C2412_CLKDIVN_PDIVN (1<<2) +#define S3C2412_CLKDIVN_HDIVN_MASK (3<<0) +#define S3C2412_CLKDIVN_ARMDIVN (1<<3) +#define S3C2412_CLKDIVN_DVSEN (1<<4) +#define S3C2412_CLKDIVN_HALFHCLK (1<<5) +#define S3C2412_CLKDIVN_USB48DIV (1<<6) +#define S3C2412_CLKDIVN_UARTDIV_MASK (15<<8) +#define S3C2412_CLKDIVN_UARTDIV_SHIFT (8) +#define S3C2412_CLKDIVN_I2SDIV_MASK (15<<12) +#define S3C2412_CLKDIVN_I2SDIV_SHIFT (12) +#define S3C2412_CLKDIVN_CAMDIV_MASK (15<<16) +#define S3C2412_CLKDIVN_CAMDIV_SHIFT (16) + /* our clock resources. */ static struct clk *xtal; static struct clk *fclk; diff --git a/drivers/cpufreq/s3c2440-cpufreq.c b/drivers/cpufreq/s3c2440-cpufreq.c index 3f772ba8896e..5fe7a891fa13 100644 --- a/drivers/cpufreq/s3c2440-cpufreq.c +++ b/drivers/cpufreq/s3c2440-cpufreq.c @@ -24,11 +24,31 @@ #include #include -#include - #include #include +#include + +#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) +#define S3C2410_CLKDIVN S3C2410_CLKREG(0x14) +#define S3C2440_CAMDIVN S3C2410_CLKREG(0x18) + +#define S3C2440_CLKDIVN_PDIVN (1<<0) +#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1) +#define S3C2440_CLKDIVN_HDIVN_1 (0<<1) +#define S3C2440_CLKDIVN_HDIVN_2 (1<<1) +#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1) +#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1) +#define S3C2440_CLKDIVN_UCLK (1<<3) + +#define S3C2440_CAMDIVN_CAMCLK_MASK (0xf<<0) +#define S3C2440_CAMDIVN_CAMCLK_SEL (1<<4) +#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8) +#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9) +#define S3C2440_CAMDIVN_DVSEN (1<<12) + +#define S3C2442_CAMDIVN_CAMCLK_DIV3 (1<<5) + static struct clk *xtal; static struct clk *fclk; static struct clk *hclk; diff --git a/drivers/cpufreq/s3c24xx-cpufreq.c b/drivers/cpufreq/s3c24xx-cpufreq.c index ed0e713b1b57..c786e1197d3c 100644 --- a/drivers/cpufreq/s3c24xx-cpufreq.c +++ b/drivers/cpufreq/s3c24xx-cpufreq.c @@ -28,9 +28,11 @@ #include #include -#include +#include /* note, cpufreq support deals in kHz, no Hz */ +#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) +#define S3C2410_MPLLCON S3C2410_CLKREG(0x04) static struct cpufreq_driver s3c24xx_driver; static struct s3c_cpufreq_config cpu_cur;