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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id c26-20020aa7c99a000000b00572405680e8sm1789128edt.21.2024.04.26.12.42.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Harsh Prateek Bora , Richard Henderson , Paolo Bonzini Subject: [PULL 02/38] exec: Reduce tlb_set_dirty() declaration scope Date: Fri, 26 Apr 2024 21:41:22 +0200 Message-ID: <20240426194200.43723-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::234; envelope-from=philmd@linaro.org; helo=mail-lj1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org tlb_set_dirty() is only used in accel/tcg/cputlb.c, where it is defined. Declare it statically, removing the stub. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Harsh Prateek Bora Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-11-philmd@linaro.org> --- include/exec/exec-all.h | 1 - accel/stubs/tcg-stub.c | 4 ---- accel/tcg/cputlb.c | 2 +- 3 files changed, 1 insertion(+), 6 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 3e53501691..9599e16a09 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -654,7 +654,6 @@ static inline void mmap_unlock(void) {} #define WITH_MMAP_LOCK_GUARD() void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); -void tlb_set_dirty(CPUState *cpu, vaddr addr); void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); MemoryRegionSection * diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index 8a496a2a6f..dd890d6cf6 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -18,10 +18,6 @@ void tb_flush(CPUState *cpu) { } -void tlb_set_dirty(CPUState *cpu, vaddr vaddr) -{ -} - int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t retaddr) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 93b1ca810b..e16d02a62c 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1039,7 +1039,7 @@ static inline void tlb_set_dirty1_locked(CPUTLBEntry *tlb_entry, /* update the TLB corresponding to virtual page vaddr so that it is no longer dirty */ -void tlb_set_dirty(CPUState *cpu, vaddr addr) +static void tlb_set_dirty(CPUState *cpu, vaddr addr) { int mmu_idx; From patchwork Fri Apr 26 19:41:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792371 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626754wrh; Fri, 26 Apr 2024 12:49:03 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUsLd1Dr8DXnwVW72PatnsHczxeW985K2UF51UbBLVL3uloKbpok+Wvizn+DKd0UMKpEniJitOd2fxHPIGuv/ZG X-Google-Smtp-Source: AGHT+IG5nuAWzyhylSbZIp5Xzb0yYWyQexG5aXMVrfhexsH8QUlJWXRk+xTXgKTm6j7MQKFw1e9b X-Received: by 2002:a05:620a:c94:b0:790:8110:f7a with SMTP id q20-20020a05620a0c9400b0079081100f7amr3426866qki.65.1714160942832; Fri, 26 Apr 2024 12:49:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160942; cv=none; d=google.com; s=arc-20160816; b=iKxfMOoxDG6LjHHwV6TuvZXtP1++pvVU5M//Xd2olO6DV4EmQm9K8wsJA/LngbQSgj tvNbeOR5VUQ69Z8I6XxrefTQPor21gQEWWA0O95j7jW99SURauoMBZHWxh8tdFI+PXJE Z9oSZq9RP95xryYf+ydDz19XhXC6AlTc5Rd2vmWStQ/gp8JCOIf9T0CXKoH2pjiddgXb aefLqUemCVAgOVs5XaJ3rKgaFcYTVlz6/mLKEfkDF+5XiD9V2HpN0pnQGPmbGx0Ic0+9 LYWbzHOh07B/Cei1uuODwHh8+z5/5T9D0/vbRYuz0xLcFF1VaTa2KxbDV168j5JYnl1U 34vw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NnqT/8KLlXL1A5GjOlmM9XBc7s531rVah3xCrUywBWs=; fh=1toBfyTSePzZo3C4bv48rP4OkybQnEzyMlBrSu2IYKw=; b=i2LQ9KRKHEZcxZ1mYDAZL+hWBc1gzHCZKWQ7KZ46zt5AhjC9r+PpnGzYO5fDXgjrjL L/Hed5QqT163Bn88kfX1GifH6eSpK447LtM7kzKnpBOagqnEg+w4JNUBSrHZwz0RSmaX l8mK3BVBg3t7OsKtT+e5isWUR2PObSddZl+Kwm249X2QL0qpKGnfVP2GWjAaV59tXAOo j2H4Y4XwG9VLbCQJf/U/QtTOALf+ZtQCk1mst2Z6KZa6QPqE8Dv9BZHthnpdKI5W5mSf xGvF3dwA7zmt7g61e9x00H0DLnEdimSEwFi8kQqL4Piprv6uBznFWuUqwZ9OKreF3wJt o+7w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ji4Ua1XC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id q10-20020a170906388a00b00a46aba003eesm10856553ejd.215.2024.04.26.12.42.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Warner Losh , Richard Henderson , Paolo Bonzini Subject: [PULL 03/38] exec: Include 'cpu.h' before validating CPUArchState placement Date: Fri, 26 Apr 2024 21:41:23 +0200 Message-ID: <20240426194200.43723-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=philmd@linaro.org; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org CPUArchState 'env' field is defined within the ArchCPU structure, so we need to include each target "cpu.h" header which defines it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Message-Id: <20231211212003.21686-2-philmd@linaro.org> --- include/exec/cpu-all.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 1a6510fd3b..b86209fc49 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -391,6 +391,7 @@ static inline bool tlb_hit(uint64_t tlb_addr, vaddr addr) #endif /* !CONFIG_USER_ONLY */ /* Validate correct placement of CPUArchState. */ +#include "cpu.h" QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0); QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); From patchwork Fri Apr 26 19:41:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792355 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625515wrh; Fri, 26 Apr 2024 12:45:11 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXkId4L2x3cxo8jrKF1Aa1Gs5lbEOq/rCQdYIrm6DR9avx0Zvt/ZinwXhOT1t03ba2GJfHLrLX7bHCZZC3JAlPv X-Google-Smtp-Source: AGHT+IEgaBliXu7S7DlDn5ZDueBRNKGPk/IPlGlAFwUJYDdic+2XTVjJ5a8vWoz8fKoL4kuCxoxA X-Received: by 2002:a05:620a:8305:b0:78d:743f:34ab with SMTP id pa5-20020a05620a830500b0078d743f34abmr3879272qkn.65.1714160711546; Fri, 26 Apr 2024 12:45:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160711; cv=none; d=google.com; s=arc-20160816; b=QlazVbxoDISNqZirz72T8Ft0T1qXMg7BE5vIh4Y4cwVJAapqpxlaqPQZzMLpZ6xf29 0aIfZJ0bQQ+zc6NOocvASS8EFZt0MioAoAXCJXe8IMtEAAj2advjj2XNzdos57EJENGe S64e0csXjGQSBrfpoFc7HpdbLoeQ7xHtoTgShMimbpBuNXkitrhJIOC9ClNZSvCm8EyM /q8XNqMZZTOu51bNytugSpvzfU2iceLrGNI58VnmFdLrTE6xfUx+6oLnExXcPQbstF+i /yhRBNkCjlyyyNkZMNUt7AilCQehFQ2D0TSNFh0ikehlyhFH+IG3q7uNhwVpPfzPAhQk p1aw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=S4r3G1A3uieLAlLtfe4V5hp04cU912Q1LgbF6VzVX8w=; fh=qazebhOlHzaBfxrU5INcXm/HHTlsf/tJJNQLTH50jKQ=; b=YQd2OsGGwhKtqBaIAeXfizzRnUlJHMsN6/TDgf1jCmhYUcMSukyOr/m7eDmWiX8Vh2 FeckOaZDjP5A9afVAlq/+tN/Phy6lTmGL1qhg7PzM+xjK25GClZzXJgkywF9U44XsxBV RUW8rZrGuGN+AQVlasLMnGq36XUM4SlspTrjzzE7utwpoK8bTBIuL0jQPrpZLzrqONAx EmcQuLvqFd4lcozbCJldONp2vz//94EfL7VVSMxty0driaH5iQU9Dk4id35clbgeelX/ nYgKc4Dv990yByPy0IfKTckqB9V+MIpP/Rfoq8L3V4HvbCUrnAzIQ/6nKxVVP9RjnFpv xxbg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rtYOCSNP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id r25-20020a170906351900b00a55b5c365dfsm6435433eja.199.2024.04.26.12.42.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:27 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Warner Losh , Richard Henderson , Paolo Bonzini , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Thomas Huth , Peter Xu , David Hildenbrand Subject: [PULL 04/38] exec: Expose 'target_page.h' API to user emulation Date: Fri, 26 Apr 2024 21:41:24 +0200 Message-ID: <20240426194200.43723-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::134; envelope-from=philmd@linaro.org; helo=mail-lf1-x134.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org User-only objects might benefit from the "exec/target_page.h" API, which allows to build some objects once for all targets. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-3-philmd@linaro.org> --- meson.build | 2 +- page-target.c | 44 ++++++++++++++++++++++++++++++++++++++++++ system/physmem.c | 30 ---------------------------- target/target-common.c | 10 ---------- target/meson.build | 2 -- 5 files changed, 45 insertions(+), 43 deletions(-) create mode 100644 page-target.c delete mode 100644 target/target-common.c diff --git a/meson.build b/meson.build index 96fdc6dfd2..5db2dbc12e 100644 --- a/meson.build +++ b/meson.build @@ -3523,7 +3523,7 @@ if get_option('b_lto') pagevary = declare_dependency(link_with: pagevary) endif common_ss.add(pagevary) -specific_ss.add(files('page-vary-target.c')) +specific_ss.add(files('page-target.c', 'page-vary-target.c')) subdir('backends') subdir('disas') diff --git a/page-target.c b/page-target.c new file mode 100644 index 0000000000..82211c8593 --- /dev/null +++ b/page-target.c @@ -0,0 +1,44 @@ +/* + * QEMU page values getters (target independent) + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "exec/target_page.h" +#include "exec/cpu-defs.h" +#include "cpu.h" +#include "exec/cpu-all.h" + +size_t qemu_target_page_size(void) +{ + return TARGET_PAGE_SIZE; +} + +int qemu_target_page_mask(void) +{ + return TARGET_PAGE_MASK; +} + +int qemu_target_page_bits(void) +{ + return TARGET_PAGE_BITS; +} + +int qemu_target_page_bits_min(void) +{ + return TARGET_PAGE_BITS_MIN; +} + +/* Convert target pages to MiB (2**20). */ +size_t qemu_target_pages_to_MiB(size_t pages) +{ + int page_bits = TARGET_PAGE_BITS; + + /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ + g_assert(page_bits < 20); + + return pages >> (20 - page_bits); +} diff --git a/system/physmem.c b/system/physmem.c index c3d04ca921..1a81c226ba 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3540,36 +3540,6 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, return 0; } -/* - * Allows code that needs to deal with migration bitmaps etc to still be built - * target independent. - */ -size_t qemu_target_page_size(void) -{ - return TARGET_PAGE_SIZE; -} - -int qemu_target_page_bits(void) -{ - return TARGET_PAGE_BITS; -} - -int qemu_target_page_bits_min(void) -{ - return TARGET_PAGE_BITS_MIN; -} - -/* Convert target pages to MiB (2**20). */ -size_t qemu_target_pages_to_MiB(size_t pages) -{ - int page_bits = TARGET_PAGE_BITS; - - /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ - g_assert(page_bits < 20); - - return pages >> (20 - page_bits); -} - bool cpu_physical_memory_is_io(hwaddr phys_addr) { MemoryRegion*mr; diff --git a/target/target-common.c b/target/target-common.c deleted file mode 100644 index 903b10cfe4..0000000000 --- a/target/target-common.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -#include "qemu/osdep.h" - -#include "cpu.h" -#include "exec/target_page.h" - -int qemu_target_page_mask(void) -{ - return TARGET_PAGE_MASK; -} diff --git a/target/meson.build b/target/meson.build index 59b46b2ef4..1c2e6f2b19 100644 --- a/target/meson.build +++ b/target/meson.build @@ -18,5 +18,3 @@ subdir('sh4') subdir('sparc') subdir('tricore') subdir('xtensa') - -specific_ss.add(files('target-common.c')) From patchwork Fri Apr 26 19:41:25 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id m24-20020a17090607d800b00a524216fe78sm10939590ejc.64.2024.04.26.12.42.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Brian Cain , "Edgar E. Iglesias" Subject: [PULL 05/38] accel: Include missing 'exec/cpu_ldst.h' header Date: Fri, 26 Apr 2024 21:41:25 +0200 Message-ID: <20240426194200.43723-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Theses files call cpu_ldl_code() which is declared in "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-5-philmd@linaro.org> --- accel/tcg/translator.c | 1 + target/hexagon/translate.c | 1 + target/microblaze/cpu.c | 1 + target/microblaze/translate.c | 1 + 4 files changed, 4 insertions(+) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 9de0bc34c8..6832e55135 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -12,6 +12,7 @@ #include "qemu/error-report.h" #include "exec/exec-all.h" #include "exec/translator.h" +#include "exec/cpu_ldst.h" #include "exec/plugin-gen.h" #include "tcg/tcg-op-common.h" #include "internal-target.h" diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index f163eefe97..47a870f42d 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -23,6 +23,7 @@ #include "exec/helper-gen.h" #include "exec/helper-proto.h" #include "exec/translation-block.h" +#include "exec/cpu_ldst.h" #include "exec/log.h" #include "internal.h" #include "attribs.h" diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index f8dc3173fc..9eb7374ccd 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "hw/qdev-properties.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/gdbstub.h" #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index fc451befae..6d89c1a175 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "disas/disas.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" From patchwork Fri Apr 26 19:41:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792349 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625069wrh; Fri, 26 Apr 2024 12:43:49 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVYbeeIhPx5DeidukMDGwRAAPedv6XhrOBDSG9blaL+5kgpPo+jOSEQbdXEViUBYaCYNjPZhwcE+ACppMsdxp1e X-Google-Smtp-Source: AGHT+IGBw8TLiHKpd1Fzr439jZW8wQabgwuq1DIs9EWq9lkBxHj7PkKp3Wjow9e6EcBN17jKvrke X-Received: by 2002:a05:620a:410a:b0:790:aec1:d4b8 with SMTP id j10-20020a05620a410a00b00790aec1d4b8mr3605792qko.12.1714160628869; Fri, 26 Apr 2024 12:43:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160628; cv=none; d=google.com; s=arc-20160816; b=KV/3TiP8mdgNxcq6B3hBPqBa9B8Bcihox/6t8sC1d09Gd1bMTOHu/HbOMET/Csqtsq mV4rCWc6jN+l0wZdUMy8i1hmdaIv6Hg/108QuAo6ePQ2WvOWDcTmTlZtACSo3XkXdPTl IJMJLkBSTgn0DpZ9gPXLBy6j/agTb/AIkj4GPATNnlNFm+kCzDk/ozikPUVNa73jgF1A a2zY+bKnH8D0YSoH6/C5FeugLPS+Bp2pNWXothfbakagU6Y0ztNnK05oHCZ4bIog/27T 6lTTDM7OoOcF1mYNC8wh7IerKENNGKq8h4JZDsXVFjhM06ANwXdYT5IPE7flDvKeV+dR qWpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=4X/VhmwXvkdhIQuo7rHVj9w7BkqzRhVw95Tx0jafh5o=; fh=4dj4UoQTeCVg6RIgAm5X93FgKRA3s9MM3phQRm83OmY=; b=jhFQ0vp9R7nW1sEqDLUtePnHtPosF6irPWBzMpZPwbJcS/hrRAhf7t48O9qe5G/8aF dtwPwh+YAcf5cXngDcxLTvZQgGAhQp9gBd/aivBKW18F3DiIKkhoKQBQAN+V4wZ+ET3j 39Msf+JN4/DjRNqhULpfCMuoGOJCk7jhYaVs92jikBmkLy686J5il4yIgdr7Nx2NCbWy d6kGxKuFA0FJnArjLjbub4LgeiUJe5RDRVDnLpK8TgDp04jUgJoj2TKTmJD85SbMLz/d hO8z8RYNe5yrmx0ztaCWPh3KRNCG+VsjzCOsGRvyXh/Iqc/90teEb94grwq9EqrfE1kR 2jLQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=l9DqV5US; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id n11-20020a170906b30b00b00a5242e285aesm10798927ejz.184.2024.04.26.12.42.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:39 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Warner Losh , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PULL 06/38] gdbstub: Include missing 'hw/core/cpu.h' header Date: Fri, 26 Apr 2024 21:41:26 +0200 Message-ID: <20240426194200.43723-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Functions such gdb_get_cpu_pid() dereference CPUState so require the structure declaration from "hw/core/cpu.h": static uint32_t gdb_get_cpu_pid(CPUState *cpu) { ... return cpu->cluster_index + 1; } Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Message-Id: <20231211212003.21686-15-philmd@linaro.org> Reviewed-by: Richard Henderson --- gdbstub/gdbstub.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index 9c23d44baf..9c2b8b5d0a 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -37,6 +37,7 @@ #include "hw/cpu/cluster.h" #include "hw/boards.h" #endif +#include "hw/core/cpu.h" #include "sysemu/hw_accel.h" #include "sysemu/runstate.h" From patchwork Fri Apr 26 19:41:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792350 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625124wrh; Fri, 26 Apr 2024 12:44:02 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXA9V5aNwqDk/N5NZN0ghw6LAvq9ELW7CAQ1SYA/WWuG9TAGk5L4PVzNChora3mAjszsUOmTIMyhRr1GzDrJ+9M X-Google-Smtp-Source: AGHT+IESsQ6AQvJv51STyPmQEcP17QL3bMRN9VVROQSc2mbjn3vTV2+goFUnTKzsKl4ZBC8eJABR X-Received: by 2002:ac8:58c4:0:b0:436:8356:bf5 with SMTP id u4-20020ac858c4000000b0043683560bf5mr4643403qta.60.1714160642615; Fri, 26 Apr 2024 12:44:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160642; cv=none; d=google.com; s=arc-20160816; b=m5WKQhUOhAW+FgjmyBXmU+Cl1NsUbIS4QVUglLmO92+y9i63eavPD0HlTv1tSBtZTi uOzRzMerG8BUsGmMDpAdET8SVVVHMLpDKjF1T7WOOlJpW7xFaYOiUCkdFBxqatnvZa3M wT3GyEAvI1ITLLP3K5rQxXyX7Wmgm+0CQQY8gVTSp+xYcoQl5MJ0IF3VLeWP4XPk2Mq0 ng5Cm0eBZvDa9KyE0SzDMGVl/3dE4ST7I2rWUp8TM6edoN5JhGjfMIJLlmjXk1G+0joN nB3zvWncdlb9N1RpUbqVt8DzF5LY15IKqdqlj//acsktxDGcZYslZC4C1gjYLhIaBP92 jX7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=t0nMCqhYKzp5r2ZnGbDu0d0x6qlsj2uY/rxTdGpirtw=; fh=l2kfs+/h7+HpgbfyDT1jiv751sa6ON8Djpmc0d1l2tY=; b=NnP9c8trWn3usvq+z+Si2EyO2cMq2SBoIn5u7Xy91eS3ROMh1h30na51l+Y9Rg1AUm Y3lGLY3+uHxZMI33lGUxAjTgK/J1GQX6pPRzLF5JTE+UOYtM2aFkv56Ju8pKd+y06cfw J4ZExCeGOHwbJQPlC+6LPGiHyT7Kl6LBpbtAVjH6sUZu3TVFdxJFSdrvTaiidF7N6Gx+ O0XnXWS91eR8xhL96UGggubJDn6WZw5KtdSrjJypRLWyZl2agmwCdpHiy4L2GwLEeF9x L+R1icDh3WVqfHK+lZy45O4pp/9/bW5CYCDdQ+eH2D9G6qZKfg3TNm/L3Zg8VFbePtPu juxw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qN6nv4rJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id cf8-20020a0564020b8800b0056c24df7a78sm10395889edb.5.2024.04.26.12.42.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PULL 07/38] gdbstub: Simplify #ifdef'ry in helpers.h Date: Fri, 26 Apr 2024 21:41:27 +0200 Message-ID: <20240426194200.43723-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Slightly simplify by checking NEED_CPU_H definition in header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240322161439.6448-2-philmd@linaro.org> --- include/gdbstub/helpers.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index 6b97610f48..6277a858a1 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -12,7 +12,10 @@ #ifndef _GDBSTUB_HELPERS_H_ #define _GDBSTUB_HELPERS_H_ -#ifdef COMPILING_PER_TARGET +#ifndef COMPILING_PER_TARGET +#error "gdbstub helpers should only be included by target specific code" +#endif + #include "cpu.h" /* @@ -96,8 +99,4 @@ static inline uint8_t *gdb_get_reg_ptr(GByteArray *buf, int len) #define ldtul_p(addr) ldl_p(addr) #endif -#else -#error "gdbstub helpers should only be included by target specific code" -#endif - #endif /* _GDBSTUB_HELPERS_H_ */ From patchwork Fri Apr 26 19:41:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792348 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp624932wrh; Fri, 26 Apr 2024 12:43:18 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXbmHTsyNXKWz+ZHwNy1k2+sBY0EvACX73sqFgEEw5N6qfgXw897JulqEw7AgP6l7dQDGJFehRiI22LFDTm4YpZ X-Google-Smtp-Source: AGHT+IHeMvUfKwLcRyh4c/WPadZbKi6pCusF1GQdEGs1+CC+lV5Y7ht9+v3FLFSdbUZNH0jqNI/2 X-Received: by 2002:a05:622a:510:b0:437:9877:9676 with SMTP id l16-20020a05622a051000b0043798779676mr4900926qtx.43.1714160598636; Fri, 26 Apr 2024 12:43:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160598; cv=none; d=google.com; s=arc-20160816; b=kQA6ejIF1XrKsTZ7forLD2hLLehRRBWsj6NGTflHsh3vzr36ZtNMWPuDX2rWEJ+zsd A0Ud1qVtfJYU0p8GmI+phw/mKu303CUDXlXHPgywhGBNEvT95W4hbYTdNoYtbb2Kn4sy or7513MzhDdDggG9x41CUwczSv3I2eLyWCMzHZAeXusfZB01KiV71daLc3E68chJYZKH NkBTZQXzSXKHQxYJhix/agoHiv873EnGJ9rueGVuZoDc6elXzWJvtMln7rTF+UVWEnek jo49QxRvjyxRfzi7lpzR8oU+pqXsRkfcN49g9Aq+5gaubx5e1ZgXPas0m963mMebW0m9 QPBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XHpChPLpjXlPm4sz2ZPmxjIjHGSHb3jC7Cykk4D98j0=; fh=clZ79foyuPApfulJThpshmg/Hn7uNcFdBihbOfWcuY0=; b=zVIDR8ss1IkQDdTdJIdvka3OIzKXy0VsXWuwnFm316geuUPTxt4Q34MEiRXowlnxKR ecoeHWSYLRpqxD81gKbR0ampKEMQacN0tpEnmDEKCP6wXmjvTt3fa7SSOt3ES4Dqm6xH e2A9Q3fxM7w8Vsqw1DdXUK1c9sfxth+Eed3wLAp7vVBMOET8sCt99KW7YBuY34xznN0m HYr6eqgOTvdQFdZxrs4/wu6khrV/Y99hp6+rAF0bD65S0jHjsPQqPhxsWPEXrwhF4Epy 3FwUPXoY/YFCSwIMKskW2cAqDai8JSWKxpwxBbW464DAxYlmxc1Bgzm2VTVzccMO27Or QbSQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AHBocRxb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id t11-20020a170906a10b00b00a5244a80cfcsm10944860ejy.91.2024.04.26.12.42.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= , Michael Rolnik , Bastian Koppelmann Subject: [PULL 08/38] gdbstub: Avoid including 'cpu.h' in 'gdbstub/helpers.h' Date: Fri, 26 Apr 2024 21:41:28 +0200 Message-ID: <20240426194200.43723-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We only need the "exec/tswap.h" and "cpu-param.h" headers. Only include "cpu.h" in the target gdbstub.c source files. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-20-philmd@linaro.org> --- include/gdbstub/helpers.h | 3 ++- target/avr/gdbstub.c | 1 + target/tricore/gdbstub.c | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index 6277a858a1..26140ef1ac 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -16,7 +16,8 @@ #error "gdbstub helpers should only be included by target specific code" #endif -#include "cpu.h" +#include "exec/tswap.h" +#include "cpu-param.h" /* * The GDB remote protocol transfers values in target byte order. As diff --git a/target/avr/gdbstub.c b/target/avr/gdbstub.c index 2eeee2bf4e..d6d3c1479b 100644 --- a/target/avr/gdbstub.c +++ b/target/avr/gdbstub.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "gdbstub/helpers.h" +#include "cpu.h" int avr_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { diff --git a/target/tricore/gdbstub.c b/target/tricore/gdbstub.c index f9309c5e27..29a70051ff 100644 --- a/target/tricore/gdbstub.c +++ b/target/tricore/gdbstub.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "gdbstub/helpers.h" +#include "cpu.h" #define LCX_REGNUM 32 From patchwork Fri Apr 26 19:41:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792354 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625443wrh; Fri, 26 Apr 2024 12:44:55 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUbapXaTC48thdQS6KkI5rWBWuAo7WQJCejXSk8zkvBlomZ7mmAb1ZaBY5v5r1RMySxlIBCaXObra3I7AKY7SUc X-Google-Smtp-Source: AGHT+IG4L9MuenO3xBptWIRK7Uh8TCV0GjghS6cfdt/hf0Kovqij9/EtTc85gtFlyNsXNgkBeox0 X-Received: by 2002:a05:620a:3b93:b0:78f:391:f8d8 with SMTP id ye19-20020a05620a3b9300b0078f0391f8d8mr769774qkn.31.1714160695280; Fri, 26 Apr 2024 12:44:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160695; cv=none; d=google.com; s=arc-20160816; b=dGRlWcaBxwMZzHtCNGnO7FE/LQz6c+7fgUOU5YAB2gVuC85/PPEQcYF64ApSSiI5ad RCkAG+7hvRRMg6hinskr6UxyqNzOIDKxruJvmKMyqj6rTy6miJ89Kxj9j+lE4GPAPEa2 bjfPviWUzzkOd18pqY9BS/Gh+czgQBY/S70rbWiX2rdnC8ZV/nVEex2uSC+N9SjxIn0y 4edHqOFeaQ19XYwg2FfmV7rJVvTyvDAoMBRpubqSqI+/YFXxo8iUdnsYL/2O8RElbUfT tch+prKloe3VHFtBg6PtUAH6DS8AMjemQhtX98HYJRYOMdKiYSz+i9z92O8pAeE4KSnG bQfw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DE5bQD16xfwEMndgjcE7z1cuHvznf4KEW6ZfSJ0m28c=; fh=l2kfs+/h7+HpgbfyDT1jiv751sa6ON8Djpmc0d1l2tY=; b=QKZuLtT039V9wHiIWg871PH9LD65faneL+uTL6c5PAwpp1AjUn/isT3y1gDs50xVlY TJMnKzOgOYxpYgT+la904jiLYZLFrl44r/M9ka6piA3HFo3ZqSjgjcGzvJHB71fJ/k09 O0Q1BvcbJlW1xSulnDFZs4/v7Ogo7fPGHe/TzIkyM1JRSY8KF8n7KVHPzRBVhsPlCgTc FKjRiHxmiCxLOzmtF0kjWYn5l2/kLtkEI/ntGxM9bx0krlGfPy/Wem4BBZKwuUH8QBmV GAxjd1KaNMGyesutWfrlxK3W7J8HH2esSCDj3ekhUuAY6/sLZcYc1Yu116Mfmr3VPkMJ euHg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mtLD3cry; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id n1-20020a170906724100b00a55bef9ab56sm5775865ejk.120.2024.04.26.12.42.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PULL 09/38] semihosting/uaccess: Avoid including 'cpu.h' Date: Fri, 26 Apr 2024 21:41:29 +0200 Message-ID: <20240426194200.43723-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "semihosting/uaccess.h" only requires the following headers: - "exec/cpu-defs.h" for target_ulong, - "exec/cpu-common.h" for cpu_memory_rw_debug() - "exec/tswap.h" for tswap32() and tswap64(). Include them instead of the huge "cpu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <42c6471e-8383-45e0-85ee-e20ca32ecbad@linaro.org> --- include/semihosting/uaccess.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/semihosting/uaccess.h b/include/semihosting/uaccess.h index 3963eafc3e..dd289af8dd 100644 --- a/include/semihosting/uaccess.h +++ b/include/semihosting/uaccess.h @@ -14,7 +14,9 @@ #error Cannot include semihosting/uaccess.h from user emulation #endif -#include "cpu.h" +#include "exec/cpu-common.h" +#include "exec/cpu-defs.h" +#include "exec/tswap.h" #define get_user_u64(val, addr) \ ({ uint64_t val_ = 0; \ From patchwork Fri Apr 26 19:41:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792377 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627214wrh; Fri, 26 Apr 2024 12:50:29 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWLQcg3hIYqNPrNX5M60R3JJurwhc1wRs4yed28polZI9o7w1KMtLQmyN0EvdV3sspO3zapvLiUdSeYKRu1dsU/ X-Google-Smtp-Source: AGHT+IGml5NYr2VUD6MYrT4jSa5knHC1ar+3R4rGyjwKdHDTjzz/j/JHGz1mMuG/K23r/jMX5Vix X-Received: by 2002:aca:1e17:0:b0:3c8:2ae6:4b1b with SMTP id m23-20020aca1e17000000b003c82ae64b1bmr3885620oic.35.1714161029503; Fri, 26 Apr 2024 12:50:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714161029; cv=none; d=google.com; s=arc-20160816; b=HsWvgdzDzh+DOyLGDhk6mjPaTMlAXU4Kxps+43RIKQdVyVtUOwUQFQqQtlYlWpDuFw CghTSklODevYj/vuxDHt+jQmOMRPpfAlKWpb2E/RDSJuDB4+cr5Hhw3Yfkgtvfj5bX+B Wml0EFIztBoA+iRPGFBppAONPWPuVDBYz903u1wZSV1QOnH44p6TItLGFdBebybgBeKh 9wtMgGjDiM43T+jsZy5+LlSaDN4cP/cSBCSTUJL1NsXUPVCyl7shxFeplGb58n32vQF2 KNZ1zzuA8uJDZEWw32164qJrg7IuNk7WKqTYWd5sYCVanscG1BJmf98ocThiOliuO6So ndqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/GRlD0UJ4FFPuLeyFAJhX+j56Axb9nXKO9LompOTbz0=; fh=OMbT1T5hoTkfta/x0LLgpfPG+4DgEN317JeNbS7XBiQ=; b=AdMUnnKJ1q5z2R71/L7Vc2ElYrhd8+8b84K2/1FbwJwAQFbhun3OjwaQecr2s+jauj Ee7Kjztz/WWHY6kP+NxHeNNDZhwegHSsJsQJKK1AUZQ/L6C5k1e8P+MdQ+9wyWB3TO37 dVxjZzezd3TRiY50iHwGlQj8tqhC2MNyxFl7xI/JYsk4nx9GXabHSS3lzjGwXi+c+Tca rrdnZZBfCF/hQJEhHDurN3xljU9lLg+rslq3GEvm59PbmLCI461QoE2a+KfZa0kvjM0J gyhdF+mMwR/H+MGygFG9yeNbFd1SJfrm8Q7xyCdtgVflI8RY/FlYIX1SlRMc1Jo0NIpA sQYA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aCjKQo9M; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id jw24-20020a170906e95800b00a58a3b8589csm2615549ejb.21.2024.04.26.12.43.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PULL 10/38] semihosting/guestfd: Remove unused 'semihosting/uaccess.h' header Date: Fri, 26 Apr 2024 21:41:30 +0200 Message-ID: <20240426194200.43723-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Nothing in guestfd.c requires "semihosting/uaccess.h" nor "qemu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-8-philmd@linaro.org> Reviewed-by: Richard Henderson --- semihosting/guestfd.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/semihosting/guestfd.c b/semihosting/guestfd.c index 955c2efbd0..d3241434c5 100644 --- a/semihosting/guestfd.c +++ b/semihosting/guestfd.c @@ -12,10 +12,7 @@ #include "gdbstub/syscalls.h" #include "semihosting/semihost.h" #include "semihosting/guestfd.h" -#ifdef CONFIG_USER_ONLY -#include "qemu.h" -#else -#include "semihosting/uaccess.h" +#ifndef CONFIG_USER_ONLY #include CONFIG_DEVICES #endif From patchwork Fri Apr 26 19:41:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792383 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627734wrh; Fri, 26 Apr 2024 12:52:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVlGziac782zN6YDfVqp7A7cP6uZKG9iTzEJC8TmAFhKyFEa72Vlu16K2qYq2S1oyuF0Jo73uLwdlnZ3YcTMpUb X-Google-Smtp-Source: AGHT+IFs+F/+OFyE6mbTnxFLHlHyR2a8oE6JkPuza9zbxZSlB0YnJ2FV05A1ZYgIUTnvPn6FSOdS X-Received: by 2002:ad4:5cc7:0:b0:6a0:5344:aed4 with SMTP id iu7-20020ad45cc7000000b006a05344aed4mr4972601qvb.5.1714161124180; Fri, 26 Apr 2024 12:52:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714161124; cv=none; d=google.com; s=arc-20160816; b=B7Uz43crxnpZ67qST70UOUE518fyO91qVyKaq/Cv/Wjy894tl2YO1PfKjmOp0s4e1A /wc7G5hG3He89tkn0PJYfdoF0w4T4iSefx3YTWPyBBAQuS+1ZroaQo98yiFBAy4j+5lz Djsv+16YFuH3L90thKrH8oPcrFuHqfBAw0e6/nl4tMCGHRW60g0GecH95KvW7l3BoQMX 0fYOszH/pQL+d/PHYbO+SHcRuyi8DFCrDYrhYrdz7lQEjLjsMRjA5aqW7eF/WtlcNSUd LUJ2ACWmw03ELHemgA9AYi5VFc5N8s9/aL9YpiiI2mgZN9XwFaOPADDs0nKPPy+lt/Zx dDIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cKe3cZw/HcttjUJbHfrcy+l3NjV8jZoAyEBmM5OCTLI=; fh=xnU+PMCWOZ3v4fG3ajoTD7bqA32SWuY7WVpvSRE7/cs=; b=P8j90sN6MIqwrX/+jfG+amihqGJCZIM49F/cjaHjRJmsoXiOYQhJV6RTjEVVsOSwhB Ki/lSOJ8JTtkY3XKG2TAZA7mvlmKuARTfEeoNJniNw70MByeatfViw8JYnhgioAzDagA fA1aFfzT3p9UOQVIfsiMSZhDNnwqEJnb88nSPmSfBwEhL7Cajx3xhjfCl+M3UUD1rtWp KukrXGoQu9KvF1tMcj/0KmkyOdEuM/HQJhxNnp0Odb/QJo5TmoMIY/KPVmmGxKcqTzVJ +cGlJK9qseifPmcH/ryPtQuQBOa9dzVXve+nf0JHzMuib0o/ApXqQbtTN8XXrG60iTQI Ic/A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FudrCxSc; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id 15-20020a0564021f4f00b00571d74c6074sm8792683edz.46.2024.04.26.12.43.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Nicholas Piggin , Peter Maydell , Michael Rolnik , Paolo Bonzini , Song Gao , "Edgar E. Iglesias" , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Stafford Horne , Daniel Henrique Barboza , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei , Thomas Huth , David Hildenbrand , Ilya Leoshkevich , Mark Cave-Ayland , Artyom Tarasenko , Max Filippov Subject: [PULL 11/38] target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' Date: Fri, 26 Apr 2024 21:41:31 +0200 Message-ID: <20240426194200.43723-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=philmd@linaro.org; helo=mail-ed1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org accel/tcg/ files requires the following definitions: - TARGET_LONG_BITS - TARGET_PAGE_BITS - TARGET_PHYS_ADDR_SPACE_BITS - TCG_GUEST_DEFAULT_MO The first 3 are defined in "cpu-param.h". The last one in "cpu.h", with a bunch of definitions irrelevant for TCG. By moving the TCG_GUEST_DEFAULT_MO definition to "cpu-param.h", we can simplify various accel/tcg includes. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Acked-by: Nicholas Piggin Message-Id: <20231211212003.21686-4-philmd@linaro.org> --- target/alpha/cpu-param.h | 3 +++ target/alpha/cpu.h | 3 --- target/arm/cpu-param.h | 8 +++++--- target/arm/cpu.h | 3 --- target/avr/cpu-param.h | 2 ++ target/avr/cpu.h | 2 -- target/hppa/cpu-param.h | 8 ++++++++ target/hppa/cpu.h | 6 ------ target/i386/cpu-param.h | 3 +++ target/i386/cpu.h | 3 --- target/loongarch/cpu-param.h | 2 ++ target/loongarch/cpu.h | 2 -- target/microblaze/cpu-param.h | 3 +++ target/microblaze/cpu.h | 3 --- target/mips/cpu-param.h | 2 ++ target/mips/cpu.h | 2 -- target/openrisc/cpu-param.h | 2 ++ target/openrisc/cpu.h | 2 -- target/ppc/cpu-param.h | 2 ++ target/ppc/cpu.h | 2 -- target/riscv/cpu-param.h | 2 ++ target/riscv/cpu.h | 2 -- target/s390x/cpu-param.h | 6 ++++++ target/s390x/cpu.h | 3 --- target/sparc/cpu-param.h | 23 +++++++++++++++++++++++ target/sparc/cpu.h | 23 ----------------------- target/xtensa/cpu-param.h | 3 +++ target/xtensa/cpu.h | 3 --- 28 files changed, 66 insertions(+), 62 deletions(-) diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h index c969cb016b..5ce213a9a1 100644 --- a/target/alpha/cpu-param.h +++ b/target/alpha/cpu-param.h @@ -27,4 +27,7 @@ # define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS) #endif +/* Alpha processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 7188a409a0..f9e2ecb90a 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -24,9 +24,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* Alpha processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - #define ICACHE_LINE_SIZE 32 #define DCACHE_LINE_SIZE 32 diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index da3243ab21..2d5f3aa312 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -27,14 +27,16 @@ # else # define TARGET_PAGE_BITS 12 # endif -#else +#else /* !CONFIG_USER_ONLY */ /* * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6 * have to support 1K tiny pages. */ # define TARGET_PAGE_BITS_VARY # define TARGET_PAGE_BITS_MIN 10 - -#endif +#endif /* !CONFIG_USER_ONLY */ + +/* ARM processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 97997dbd08..17efc5d565 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -30,9 +30,6 @@ #include "target/arm/multiprocessing.h" #include "target/arm/gtimer.h" -/* ARM processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - #ifdef TARGET_AARCH64 #define KVM_HAVE_MCE_INJECTION 1 #endif diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h index 9a92bc74fc..93c2f470d0 100644 --- a/target/avr/cpu-param.h +++ b/target/avr/cpu-param.h @@ -32,4 +32,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 24 #define TARGET_VIRT_ADDR_SPACE_BITS 24 +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/avr/cpu.h b/target/avr/cpu.h index d185d20dcb..4725535102 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -30,8 +30,6 @@ #define CPU_RESOLVING_TYPE TYPE_AVR_CPU -#define TCG_GUEST_DEFAULT_MO 0 - /* * AVR has two memory spaces, data & code. * e.g. both have 0 address diff --git a/target/hppa/cpu-param.h b/target/hppa/cpu-param.h index bb3d7ef6f7..473d489f01 100644 --- a/target/hppa/cpu-param.h +++ b/target/hppa/cpu-param.h @@ -21,4 +21,12 @@ #define TARGET_PAGE_BITS 12 +/* PA-RISC 1.x processors have a strong memory model. */ +/* + * ??? While we do not yet implement PA-RISC 2.0, those processors have + * a weak memory model, but with TLB bits that force ordering on a per-page + * basis. It's probably easier to fall back to a strong memory model. + */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index a072d0bb63..fb2e4c4a98 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -25,12 +25,6 @@ #include "qemu/cpu-float.h" #include "qemu/interval-tree.h" -/* PA-RISC 1.x processors have a strong memory model. */ -/* ??? While we do not yet implement PA-RISC 2.0, those processors have - a weak memory model, but with TLB bits that force ordering on a per-page - basis. It's probably easier to fall back to a strong memory model. */ -#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL - #define MMU_ABS_W_IDX 6 #define MMU_ABS_IDX 7 #define MMU_KERNEL_IDX 8 diff --git a/target/i386/cpu-param.h b/target/i386/cpu-param.h index 911b4cd51b..5e15335203 100644 --- a/target/i386/cpu-param.h +++ b/target/i386/cpu-param.h @@ -24,4 +24,7 @@ #endif #define TARGET_PAGE_BITS 12 +/* The x86 has a strong memory model with some store-after-load re-ordering */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + #endif diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 6112e27bfd..565c7a98c3 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -30,9 +30,6 @@ #define XEN_NR_VIRQS 24 -/* The x86 has a strong memory model with some store-after-load re-ordering */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) - #define KVM_HAVE_MCE_INJECTION 1 /* support for self modifying code even if the modified instruction is diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h index cfe195db4e..db5ad1c69f 100644 --- a/target/loongarch/cpu-param.h +++ b/target/loongarch/cpu-param.h @@ -14,4 +14,6 @@ #define TARGET_PAGE_BITS 12 +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index ec37579fd6..abb01b2cc7 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -39,8 +39,6 @@ #define IOCSR_MEM_SIZE 0x428 -#define TCG_GUEST_DEFAULT_MO (0) - #define FCSR0_M1 0x1f /* FCSR1 mask, Enables */ #define FCSR0_M2 0x1f1f0000 /* FCSR2 mask, Cause and Flags */ #define FCSR0_M3 0x300 /* FCSR3 mask, Round Mode */ diff --git a/target/microblaze/cpu-param.h b/target/microblaze/cpu-param.h index 9770b0eb52..e530fead1c 100644 --- a/target/microblaze/cpu-param.h +++ b/target/microblaze/cpu-param.h @@ -29,4 +29,7 @@ /* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */ #define TARGET_PAGE_BITS 12 +/* MicroBlaze is always in-order. */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index c0c7574dbd..3e5a3e5c60 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -24,9 +24,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* MicroBlaze is always in-order. */ -#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL - typedef struct CPUArchState CPUMBState; #if !defined(CONFIG_USER_ONLY) #include "mmu.h" diff --git a/target/mips/cpu-param.h b/target/mips/cpu-param.h index 594c91a156..6f6ac1688f 100644 --- a/target/mips/cpu-param.h +++ b/target/mips/cpu-param.h @@ -30,4 +30,6 @@ #define TARGET_PAGE_BITS_MIN 12 #endif +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 7329226d39..3e906a175a 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -10,8 +10,6 @@ #include "hw/clock.h" #include "mips-defs.h" -#define TCG_GUEST_DEFAULT_MO (0) - typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; /* MSA Context */ diff --git a/target/openrisc/cpu-param.h b/target/openrisc/cpu-param.h index 3f08207485..fbfc0f568b 100644 --- a/target/openrisc/cpu-param.h +++ b/target/openrisc/cpu-param.h @@ -13,4 +13,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index b1b7db5cbd..c9fe9ae12d 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -24,8 +24,6 @@ #include "exec/cpu-defs.h" #include "fpu/softfloat-types.h" -#define TCG_GUEST_DEFAULT_MO (0) - /** * OpenRISCCPUClass: * @parent_realize: The parent class' realize handler. diff --git a/target/ppc/cpu-param.h b/target/ppc/cpu-param.h index b7ad52de03..77c5ed9a67 100644 --- a/target/ppc/cpu-param.h +++ b/target/ppc/cpu-param.h @@ -40,4 +40,6 @@ # define TARGET_PAGE_BITS 12 #endif +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 67e6b2effd..0ac55d6b25 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -29,8 +29,6 @@ #define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU -#define TCG_GUEST_DEFAULT_MO 0 - #define TARGET_PAGE_BITS_64K 16 #define TARGET_PAGE_BITS_16M 24 diff --git a/target/riscv/cpu-param.h b/target/riscv/cpu-param.h index b2a9396dec..1fbd64939d 100644 --- a/target/riscv/cpu-param.h +++ b/target/riscv/cpu-param.h @@ -28,4 +28,6 @@ * - M mode HLV/HLVX/HSV 0b111 */ +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 3b1a02b944..2d0c02c35b 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -43,8 +43,6 @@ typedef struct CPUArchState CPURISCVState; # define TYPE_RISCV_CPU_BASE TYPE_RISCV_CPU_BASE64 #endif -#define TCG_GUEST_DEFAULT_MO 0 - /* * RISC-V-specific extra insn start words: * 1: Original instruction opcode diff --git a/target/s390x/cpu-param.h b/target/s390x/cpu-param.h index 84ca08626b..11d23b600d 100644 --- a/target/s390x/cpu-param.h +++ b/target/s390x/cpu-param.h @@ -13,4 +13,10 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 64 #define TARGET_VIRT_ADDR_SPACE_BITS 64 +/* + * The z/Architecture has a strong memory model with some + * store-after-load re-ordering. + */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + #endif diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 43a46a5a06..414680eed1 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -33,9 +33,6 @@ #define ELF_MACHINE_UNAME "S390X" -/* The z/Architecture has a strong memory model with some store-after-load re-ordering */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) - #define TARGET_HAS_PRECISE_SMC #define TARGET_INSN_START_EXTRA_WORDS 2 diff --git a/target/sparc/cpu-param.h b/target/sparc/cpu-param.h index cb11980404..82293fb844 100644 --- a/target/sparc/cpu-param.h +++ b/target/sparc/cpu-param.h @@ -23,4 +23,27 @@ # define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif +/* + * From Oracle SPARC Architecture 2015: + * + * Compatibility notes: The PSO memory model described in SPARC V8 and + * SPARC V9 compatibility architecture specifications was never implemented + * in a SPARC V9 implementation and is not included in the Oracle SPARC + * Architecture specification. + * + * The RMO memory model described in the SPARC V9 specification was + * implemented in some non-Sun SPARC V9 implementations, but is not + * directly supported in Oracle SPARC Architecture 2015 implementations. + * + * Therefore always use TSO in QEMU. + * + * D.5 Specification of Partial Store Order (PSO) + * ... [loads] are followed by an implied MEMBAR #LoadLoad | #LoadStore. + * + * D.6 Specification of Total Store Order (TSO) + * ... PSO with the additional requirement that all [stores] are followed + * by an implied MEMBAR #StoreStore. + */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) + #endif diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index f3cdd17c62..dfd9512a21 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -6,29 +6,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* - * From Oracle SPARC Architecture 2015: - * - * Compatibility notes: The PSO memory model described in SPARC V8 and - * SPARC V9 compatibility architecture specifications was never implemented - * in a SPARC V9 implementation and is not included in the Oracle SPARC - * Architecture specification. - * - * The RMO memory model described in the SPARC V9 specification was - * implemented in some non-Sun SPARC V9 implementations, but is not - * directly supported in Oracle SPARC Architecture 2015 implementations. - * - * Therefore always use TSO in QEMU. - * - * D.5 Specification of Partial Store Order (PSO) - * ... [loads] are followed by an implied MEMBAR #LoadLoad | #LoadStore. - * - * D.6 Specification of Total Store Order (TSO) - * ... PSO with the additional requirement that all [stores] are followed - * by an implied MEMBAR #StoreStore. - */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) - #if !defined(TARGET_SPARC64) #define TARGET_DPREGS 16 #define TARGET_FCCREGS 1 diff --git a/target/xtensa/cpu-param.h b/target/xtensa/cpu-param.h index b1da0555de..0000725f2f 100644 --- a/target/xtensa/cpu-param.h +++ b/target/xtensa/cpu-param.h @@ -17,4 +17,7 @@ #define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif +/* Xtensa processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 6b8d0636d2..9f2341d856 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -34,9 +34,6 @@ #include "hw/clock.h" #include "xtensa-isa.h" -/* Xtensa processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - enum { /* Additional instructions */ XTENSA_OPTION_CODE_DENSITY, From patchwork Fri Apr 26 19:41:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792353 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625403wrh; Fri, 26 Apr 2024 12:44:47 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUf5N9nEcTZcVkMl6UH/Jgn52yp1+1y2TO69gSFK7VWQIYwH75/2kLQ+DLNdbHxYBZ9fi9HG9FWTM8L2PtXWnpY X-Google-Smtp-Source: AGHT+IEVLDoutPmw4oUlFqrLqNvkLiRuytzTi5zst3Mlifk/Z8lUmUgj5yHF0EyQyUQuxfT/iTIB X-Received: by 2002:a05:620a:4d0e:b0:78e:fd59:3c3b with SMTP id wa14-20020a05620a4d0e00b0078efd593c3bmr6007170qkn.35.1714160687605; Fri, 26 Apr 2024 12:44:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160687; cv=none; d=google.com; s=arc-20160816; b=Y6kylFGYNpYOTIXCm2WgEQrv67IQvSsA09cDWHJ6zywV9w+x115aCYzLvle1SmVI9V YUErisW/UaHFW39HZ9yD1MpSzfiiKbfA+cyFaMMrnio+FA9xv3wAgN1AsjxMkV9jsYey DCEmXFB+LqfUlr3+I08pSLkgW3KYWRBdjRf9pAkeBXzH+7yJfaWRFwV5H+QjxfGU19GS 3994F5GLEs03KwnwOMHBsjvkbk+FhpGWXvdp6iL/xHE2MyeJNjACTgXZ0cy8XFeJwBCh ydc16BJGCYhm0R+kLvvM60NNttVCEY67QqVDqXUwMKiRkNvFxJpIE8wCCEP5BEBkNXF4 IeXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=zCHikf9aNyk3WhcB018t8YJhGkQVI+bzenRpRAy8E10=; fh=vrgnZ2KBskJ2OKJj3lNyG1o4xMqth8alyTyyIGcBdSg=; b=kJBTqqwpZYzORFCsP6s8HiEyt+3obn2LDNgQBUjCA75CDTBOTjEbixM7zWGvyAX4Wo 6uOA7up+UOYg0myEEst87rMlnxe0zMzJPxl5q9kNtyuwHY8+8otFbyE5jtRnFy/F3Rty xf2QPaQZBQ3r/ADZxoMPSDClf+mMFFDa4AkhpvG+jbe+cvr/17312ah/NHpO0o2vwfg7 RCcyRAquXVYjJ/5lvUA5VWyFSuejhcMgmNiZm/nmmF5WpwxisW0eea9Ot8N97Z0ZjaKf 9Pnjn1kcK3ermvmctx/0hsZGULWz0vmP4sFmSsvhvXCa05CRY1DbA23r+2iKL2c82pI9 7jCg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ymlZhQlQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id i13-20020a170906090d00b00a588dab605dsm3666771ejd.88.2024.04.26.12.43.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Nicholas Piggin , Thomas Huth , Richard Henderson , Daniel Henrique Barboza Subject: [PULL 12/38] target/ppc/excp_helper: Avoid 'abi_ptr' in system emulation Date: Fri, 26 Apr 2024 21:41:32 +0200 Message-ID: <20240426194200.43723-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org 'abi_ptr' is a user specific type. The system emulation equivalent is 'target_ulong'. Use it in ppc_ldl_code() to emphasis this is not an user emulation function. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Nicholas Piggin Reviewed-by: Thomas Huth Message-Id: <20231211212003.21686-18-philmd@linaro.org> Reviewed-by: Richard Henderson --- target/ppc/excp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 674c05a2ce..0712098cf7 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -142,7 +142,7 @@ static inline bool insn_need_byteswap(CPUArchState *env) return !!(env->msr & ((target_ulong)1 << MSR_LE)); } -static uint32_t ppc_ldl_code(CPUArchState *env, abi_ptr addr) +static uint32_t ppc_ldl_code(CPUArchState *env, target_ulong addr) { uint32_t insn = cpu_ldl_code(env, addr); From patchwork Fri Apr 26 19:41:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792362 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626207wrh; Fri, 26 Apr 2024 12:47:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXRU870sCwYnRxh+J2M0pfOUQV7d/NSyHxpDLx6iYoOJNZBBaVKmkjK5TeJdg3kffJtDYBKfLrj0LghkPlbU+Dr X-Google-Smtp-Source: AGHT+IF9x38b+xqLMQW1PnXQnUuCpwCrY89P90Ku2eG125wgHpIpXTG0CnCUVRMKDjjoEMsxF3xl X-Received: by 2002:a05:6214:3114:b0:6a0:419f:51f0 with SMTP id ks20-20020a056214311400b006a0419f51f0mr1578799qvb.23.1714160841423; Fri, 26 Apr 2024 12:47:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160841; cv=none; d=google.com; s=arc-20160816; b=0YbssPoMa8xBshGCwZjq3YNaEik2d+eHGRfDq+gUqeBwaMpyOjdQTqH6/qP/6H8ySW ik9YAR5efQ9fkJItJ+UUKLG3bgGLVUrAQLM1neJhH3+jBhuwWJwYMsb4BufJ+wkixrMR aYiI85fuDBshA1uYbY7swaa69mAgtMvtz1Ocg1h1VMBombzjrmdqB23NHHZQzUCGB4Y0 lKnTV34f5Pm0Wfbg9g9APGS9jw5wj0JAC47IsmMm1mB7qGyv+64go5IppGgp9g250mI1 hH3OS7CBftSqA/obMGXqOpvlzc7yDHIdvMPPAj+VXQOXFkIeVIcGvml+er7V27/oisms JaIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=3j5wqqpS7/lf73uUyWBqUlTl3qEW0g75YQa/BO6RAIE=; fh=MNC+rl8xbvphpXeqKM4PfRQNdxufxHuJ5fztMxPpSpQ=; b=x6strWqzOny9LLV4xvqovYX8Ps1WjD579lkV3xPsjd62PaHlP5rPCSFg5csoRlKJjP u2InNHBAaN/NhMt4Msm44YtsiFGi+9Z/2d23eEHeD8z/Rrwq5vA1LjAn316N6s7X677m tx3v8FMXpul/i0xn7pBtC2z1yaP6DtCQBPO9yAcAsS1W1zrdNXEK4PMtazUCSeCx21Yg NK1+dlA7cBvrly8RR10DAk774PvnhYpllHI4t5OFST0tqEBRSq0rY3U2+ZIAwstBLv/y hBatd/bpdG0HuXSVD28dzmAdVbY5wm+QD8WzkBuO7BRvONxsKYq75rYy09WGjC9IfPis /QYA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fmEWD8mr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id dk21-20020a170907941500b00a55aee4bf74sm6993231ejc.79.2024.04.26.12.43.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Mark Cave-Ayland , Artyom Tarasenko Subject: [PULL 13/38] target/sparc: Replace abi_ulong by uint32_t for TARGET_ABI32 Date: Fri, 26 Apr 2024 21:41:33 +0200 Message-ID: <20240426194200.43723-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We have abi_ulong == uint32_t for the 32-bit ABI. Use the generic type to avoid to depend on the "exec/user/abitypes.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-14-philmd@linaro.org> --- target/sparc/gdbstub.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c index 07ea81ab5f..ec0036e9ef 100644 --- a/target/sparc/gdbstub.c +++ b/target/sparc/gdbstub.c @@ -108,7 +108,7 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; #if defined(TARGET_ABI32) - abi_ulong tmp; + uint32_t tmp; tmp = ldl_p(mem_buf); #else From patchwork Fri Apr 26 19:41:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792358 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625928wrh; Fri, 26 Apr 2024 12:46:37 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWipMEdWqo4tiykKQrHhi0HjhdKyjkJo6syo4MxFlzfHtcW01vg1ROe0YfaG0+PeVh6i5Zy8rhq6az7ZBdqEDed X-Google-Smtp-Source: AGHT+IHVFl045hvAs03cvuzJegWkP/BRcHPaJC2jUzwuzGiKgAOi9aI16Tn9/oD8uJeeazdOXPeU X-Received: by 2002:ae9:ec05:0:b0:78e:e7ef:630b with SMTP id h5-20020ae9ec05000000b0078ee7ef630bmr3840783qkg.21.1714160796803; Fri, 26 Apr 2024 12:46:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160796; cv=none; d=google.com; s=arc-20160816; b=vKg9JBOZh8t1SSWdJ3CqmbbZs8dH7mfGRY77KWurmnWijJBzmkVRWpBzbLheDvYfch Ji3eaOC37pfGLB64bwvaHycvOKZ3leg+/jv5YGPqJB7HTL9Olngb3Umo+WQ0ylk30BxK xkpQVoTK92rXxIPuHoCcMgvrvlBtK+plplJi3NnhPDntS6gS6+W+fJwKkLVJC+tbYO9k R43Uc55cXbIRqZBYO7HXRCcsAm/4AFl+Wwt95UJitdgV3u6plSGL+dfn75lXyf2ivQyJ hHle0K9g4/4YfDBSuj5foofYGtVp/cX4E8q9deFY38xx0fYTfTtQrHG3XH5DU+AycC4B LGeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ImXEe3AsI+IkHscdZF2OSgUHx6phFwxkW/+zKfz8Om4=; fh=YHRkik9JmJQ8w2izVVfzcTjygDrvNfNJ7sJS/zde/Xo=; b=t78rDsD6+RZ4/6WuQKt7Yzm1/m9Zcc5kIdent42UGRc9nSTG8MjoZsyNnn8ij/te+l 4LaVzFv8Plyr3gGqSjsIA+G30/yIK7LLex4XLgHCz/P8Iam40S2E6Z2IRVYZfkoMd3OT WqzrsT1QJdmB04LLOXFea5Byfs0u9FCQtCoVsT0vLaN79Zli1vzRWhzRW6u83wHAnQKD ruuwBydv0aZVrWrc1C5pkV22E8XB3Ag2PEsWKo1DESUAjcCNJRi6cms6Rrj3jdZDCJ/u LazYIqbnxL9PvIxW0u6v23UX+jmcf4LqXnXRkc+/Qp137pC8LPp7G3fNftIk0+bMeLYU 0R0A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BSLu+ROa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id bi14-20020a170907368e00b00a5588ed8fa2sm9358983ejc.113.2024.04.26.12.43.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Eduardo Habkost Subject: [PULL 14/38] target/i386: Include missing 'exec/exec-all.h' header Date: Fri, 26 Apr 2024 21:41:34 +0200 Message-ID: <20240426194200.43723-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The XRSTOR instruction ends calling tlb_flush(), declared in "exec/exec-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-13-philmd@linaro.org> --- target/i386/tcg/fpu_helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 4b965a5d6c..ece22a3553 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -21,6 +21,7 @@ #include #include "cpu.h" #include "tcg-cpu.h" +#include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" From patchwork Fri Apr 26 19:41:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792369 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626440wrh; Fri, 26 Apr 2024 12:47:59 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXgualHQl3XtYBXgLycYKW9bdTzNlRG2PgOKNA/EbdtFDgTwCU6hCa2ii+OCEdqrY2DO99bfJmTnXagVvveXI0D X-Google-Smtp-Source: AGHT+IFR/sUn/xbaKULNi+pq/ooAc3Ex1sXg8lZmP0qXulpyfB2Phum7uG13phWk4f7vInPUcsI3 X-Received: by 2002:ac8:5a0a:0:b0:43a:4bb6:e19d with SMTP id n10-20020ac85a0a000000b0043a4bb6e19dmr3754071qta.23.1714160879710; Fri, 26 Apr 2024 12:47:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160879; cv=none; d=google.com; s=arc-20160816; b=Rsc7j5XL4qX2ugUYYBvPFAEELq7MupKvnHztAz2Wyc+6+jyYRQs06hzjc4UcL5rp7Y Nh+mIDpOnoyVagbJy2mS2U9/N780QEDVr8njWdFNkvtHcUgWm9ZJ6sAcNJNvNJJE4f5U Raeej3AZfan2QtsmdU0fxNo93mta+3Y0rSya3DTxs7fiRoSNLs6+TGa2rFopd1FaEbyw WxoVyrvH7qEw+7Z2I5xHcGihFuvjYcoClRfSTl7YxL3bEAvl3y5p+bMwX5wD4PfMsMff 0m8FIL5hjinsaIq1ACKc9uCw6Ry2Xojv40X2xLY0bAUvMMFx7OHPuCCP6pEkvyJmhhkS 7hBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=6ledkbh8k2HTuIvDABWBQUBebX3R5+DXtp/0ED5fWzA=; fh=sYHwNYxcKl934eeYBqheGdiV8Hwbu4VfWXOT5e73QAU=; b=gDcD5M0lKUBO/rewvyx3hwV4H3iWrgZrfUf2yh+OFk4RwUMuxpnaOxboV8ziSj4bh8 LE40AI71PgUB8VXT17AXCT5KmPUOlpgWaeUk5Agth0fh5NeQY8Pt6XOwcnohhl2fXzp7 b2vbrGNJwsFDNzTI8AgN3Z5FOdm+zqgMaL+sugICSmJodOkIjGNKwDTgKH8SFtp/NLtH 4NkkZYJuNdrI3gWu4qZTeEhcDsxbRINQhb0JRZTTOC7Ss6vFMThNYkFqCLUHuL9Mh9o6 b8QBa8expeb+ic/plU6K4hmPtl3gRiWNXVwIL/Jyl1SochyjfjKRjN4iEtwwB6BnyUu4 CuGw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="YDpF/XGp"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id be12-20020a0564021a2c00b0056bf7f92346sm10310057edb.50.2024.04.26.12.43.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Riku Voipio Subject: [PULL 15/38] accel/tcg: Un-inline retaddr helpers to 'user-retaddr.h' Date: Fri, 26 Apr 2024 21:41:35 +0200 Message-ID: <20240426194200.43723-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=philmd@linaro.org; helo=mail-ed1-x531.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org set_helper_retaddr() is only used in accel/tcg/user-exec.c. clear_helper_retaddr() is only used in accel/tcg/cpu-exec.c and accel/tcg/user-exec.c. No need to expose their definitions to all user-emulation files including "exec/cpu_ldst.h", move them to a new "user-retaddr.h" header (restricted to accel/tcg/). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-19-philmd@linaro.org> --- accel/tcg/user-retaddr.h | 28 ++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 28 ++-------------------------- accel/tcg/cpu-exec.c | 3 +++ accel/tcg/user-exec.c | 1 + 4 files changed, 34 insertions(+), 26 deletions(-) create mode 100644 accel/tcg/user-retaddr.h diff --git a/accel/tcg/user-retaddr.h b/accel/tcg/user-retaddr.h new file mode 100644 index 0000000000..e0f57e1994 --- /dev/null +++ b/accel/tcg/user-retaddr.h @@ -0,0 +1,28 @@ +#ifndef ACCEL_TCG_USER_RETADDR_H +#define ACCEL_TCG_USER_RETADDR_H + +#include "qemu/atomic.h" + +extern __thread uintptr_t helper_retaddr; + +static inline void set_helper_retaddr(uintptr_t ra) +{ + helper_retaddr = ra; + /* + * Ensure that this write is visible to the SIGSEGV handler that + * may be invoked due to a subsequent invalid memory operation. + */ + signal_barrier(); +} + +static inline void clear_helper_retaddr(void) +{ + /* + * Ensure that previous memory operations have succeeded before + * removing the data visible to the signal handler. + */ + signal_barrier(); + helper_retaddr = 0; +} + +#endif diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index eb8f3f0595..82690d3947 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -300,31 +300,7 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -#if defined(CONFIG_USER_ONLY) - -extern __thread uintptr_t helper_retaddr; - -static inline void set_helper_retaddr(uintptr_t ra) -{ - helper_retaddr = ra; - /* - * Ensure that this write is visible to the SIGSEGV handler that - * may be invoked due to a subsequent invalid memory operation. - */ - signal_barrier(); -} - -static inline void clear_helper_retaddr(void) -{ - /* - * Ensure that previous memory operations have succeeded before - * removing the data visible to the signal handler. - */ - signal_barrier(); - helper_retaddr = 0; -} - -#else +#if !defined(CONFIG_USER_ONLY) #include "tcg/oversized-guest.h" @@ -376,7 +352,7 @@ static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; } -#endif /* defined(CONFIG_USER_ONLY) */ +#endif /* !defined(CONFIG_USER_ONLY) */ #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5c70748060..225e5fbd3e 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -41,6 +41,9 @@ #include "tb-context.h" #include "internal-common.h" #include "internal-target.h" +#if defined(CONFIG_USER_ONLY) +#include "user-retaddr.h" +#endif /* -icount align implementation. */ diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 3cac3a78c4..1c621477ad 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -31,6 +31,7 @@ #include "tcg/tcg-ldst.h" #include "internal-common.h" #include "internal-target.h" +#include "user-retaddr.h" __thread uintptr_t helper_retaddr; From patchwork Fri Apr 26 19:41:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792367 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626357wrh; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id l2-20020a1709060e0200b00a4da28f42f1sm11065387eji.177.2024.04.26.12.43.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini Subject: [PULL 16/38] accel/tcg: Include missing 'hw/core/cpu.h' header Date: Fri, 26 Apr 2024 21:41:36 +0200 Message-ID: <20240426194200.43723-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org tcg_cpu_init_cflags() accesses CPUState fields, so requires "hw/core/cpu.h" to get its structure definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-12-philmd@linaro.org> Reviewed-by: Richard Henderson --- accel/tcg/tcg-accel-ops.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 9c957f421c..2c7b0cc09e 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -37,6 +37,8 @@ #include "exec/tb-flush.h" #include "exec/gdbstub.h" +#include "hw/core/cpu.h" + #include "tcg-accel-ops.h" #include "tcg-accel-ops-mttcg.h" #include "tcg-accel-ops-rr.h" From patchwork Fri Apr 26 19:41:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792364 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626276wrh; Fri, 26 Apr 2024 12:47:32 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWR+cvjUvj9Qu2bJMvFI1xHlPAai7weyXyDJymCmnO/p2q/g7hU1c1pq7rv+2weUdAbMXMyMHfQsBlXbnER5bxy X-Google-Smtp-Source: AGHT+IFgnqsu27Qw1NDX+UNN81l/rz6rR9rP0wefvvLzbFXbkMvQJWNdrI4yBFbx5TpKqDxmI3OA X-Received: by 2002:a05:622a:2a15:b0:43a:7bb9:db40 with SMTP id hc21-20020a05622a2a1500b0043a7bb9db40mr994200qtb.27.1714160852444; Fri, 26 Apr 2024 12:47:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160852; cv=none; d=google.com; s=arc-20160816; b=GzQNHKmA36yUdkt+K7GjUn1hdQ16G+C+aGA+IXb9wBPBTval1CW9LpKZIEKEaUQJwv 6zyhX6Gf8VDNz2xReHCvCKafZSmkyUIr8+g9U7BmO4iJw4VpfRRxt0ksDSucCRD2s5QN 3ltGHqXtOEZ5zGeksVJFjPCZ24PJ5vUsnn/L2Kg2Y5prIv9eZPRnDrfGoG57xqsQ/N4L ham0QsFU+HGWxHmrqnI1uUgyMyqDPRUkxyA5CtURpWoU0BVASb98HJpHVpQ64eUF85ZY cC/RAzeHEJo1FmqCC3Rqpf1eO7pSwwUafQwI6mvXkNklDjsxkaAAgw17WKEuJTKslibE Txow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=7ENBQU0RX+7z0jYkAe6EtdYUSGSuY24I2mpEgO+y4o0=; fh=gUEsd95llBLtqUKhUnPIoHQ/SNwiv/bmtZ7rMzFWY9Q=; b=I9hfKBO2jI8kl6K++6PGck8BB/drnvZsJxkc4OgIQxmHYGRxHFK4aAzBougFXxvYl/ 66g7UcAmtV0aBbXEm6a5TlbeKHFhvP3ryftl4fQv0i/yORFsSMqDQgqdvrk9UrWsvXO5 FpFGpEt50Jwj3N7IvaVSkXvEk0+ccrt7oHw4VEScnGDuaEuH0g5Ku/ZudMA3a7CecGUM 6qmAs/iSAruZdfg6YuQCgTvpLqzzERjrTQmCD4oR09IvVTwJU2Gg5IV8GqhLeTzXtP2N SlU7kWxBcSPTfZX22fFvT4p08NqvvftnyxKCrkBRDQ8qKUs1w+0cMcIqFP1pECDud82r HZFQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qFvyHQit; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id ek17-20020a056402371100b0057266474cd2sm289245edb.15.2024.04.26.12.43.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 17/38] accel/tcg: Include missing headers in 'tb-jmp-cache.h' Date: Fri, 26 Apr 2024 21:41:37 +0200 Message-ID: <20240426194200.43723-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Due to missing headers, when including "tb-jmp-cache.h" we might get: accel/tcg/tb-jmp-cache.h:21:21: error: field ‘rcu’ has incomplete type 21 | struct rcu_head rcu; | ^~~ accel/tcg/tb-jmp-cache.h:24:9: error: unknown type name ‘vaddr’ 24 | vaddr pc; | ^~~~~ Add the missing "qemu/rcu.h" and "exec/cpu-common.h" headers. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240111162442.43755-1-philmd@linaro.org> --- accel/tcg/tb-jmp-cache.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/accel/tcg/tb-jmp-cache.h b/accel/tcg/tb-jmp-cache.h index 4ab8553afc..184bb3e3e2 100644 --- a/accel/tcg/tb-jmp-cache.h +++ b/accel/tcg/tb-jmp-cache.h @@ -9,6 +9,9 @@ #ifndef ACCEL_TCG_TB_JMP_CACHE_H #define ACCEL_TCG_TB_JMP_CACHE_H +#include "qemu/rcu.h" +#include "exec/cpu-common.h" + #define TB_JMP_CACHE_BITS 12 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS) From patchwork Fri Apr 26 19:41:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792356 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625524wrh; Fri, 26 Apr 2024 12:45:12 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW5Yh3Jp/ifnzqG4YOl1mCGYoZIKzrprfaMc7te8FzVu/ndO3Zw+dC/4dwPrGwIpug4DTsxausLnOEjX3ztOzVj X-Google-Smtp-Source: AGHT+IFGYWk2WZml36BUsP2yDZ1r+Cu13brxP2eUVwHHdwLhKdRw5f03uDasKHq9Bvw0JxOT/t4l X-Received: by 2002:a05:6358:9291:b0:186:1864:81b1 with SMTP id m17-20020a056358929100b00186186481b1mr3518224rwa.21.1714160712220; Fri, 26 Apr 2024 12:45:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160712; cv=none; d=google.com; s=arc-20160816; b=bAvSwa5oUT3q+SQBlXT3/dY78i1kRRd50SLl9TnMxCcBzrNtMtMlJcHZRqtkmd65im mHcgUPSGbgMIg54xuWiBESwgl0Af+E56GCAttxJ7OZs40zHkpYDpL8aH4i7iWbkduvRH kQiw4FZPqE4tkj6f+kF98kNxJpM/XlcGZcK3lnmi5S9GUeYL6XMWggwrL/9HweVUg+E1 HfKsY6eGSZYdAUmKJMg7pJa1CFx1azbp3AR/k0URpnk63Lj9rYnjCgBB5LOA2XvUqJml +Gg1AVxJPNtGkZVwvP1bUI3sgcwmsyVjFLBulJMLspQtEYcf6SmkgA8AdCZPF6kiQ4o4 ngCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=v7EfD6ZqpZav9ENI55PjcdOF+ptN44Hp+/BctxTPyg4=; fh=gUEsd95llBLtqUKhUnPIoHQ/SNwiv/bmtZ7rMzFWY9Q=; b=bmo+irTJFws2jvACXvBOSMW83ahBJdXa4HrNQrlwcWr0n/dTOVuSYgwVpjwLfOzVds e7aYXoMMKQneD/dl3pAESPG5fCnZXpBbxnH2O1/2qfK3yhmeek9oFsXAMIXu9MTrYjm5 KDTqKlVNb7MQ+Ur202jtYrzKWH2d5sFsuPGEusVIEPz5pdKLpy4bCV+gg8g+DY7KYbEh nWc74hjZPDwdDYDfwbLc6Hn8MqaoFI9x+awJGh+uCYj3vm4Wx3CrsTbPov0PXDVYzSYO 7vTQxnr44E+g8V64j/txe97lvWwATnh+2w3SBeEij4AMi83ji3Wzk59CJhUC6S3U3Xpt INXg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cJVZOFYX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id lb9-20020a170906adc900b00a5889e8353esm3839625ejb.44.2024.04.26.12.43.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 18/38] accel/tcg: Rename load-extract/store-insert headers using .h.inc suffix Date: Fri, 26 Apr 2024 21:41:38 +0200 Message-ID: <20240426194200.43723-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=philmd@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename 'store-insert-al16.h' as 'store-insert-al16.h.inc' and 'load-extract-al16-al8.h' as 'load-extract-al16-al8.h.inc'. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240424173333.96148-3-philmd@linaro.org> --- .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 accel/tcg/ldst_atomicity.c.inc | 4 ++-- 8 files changed, 2 insertions(+), 2 deletions(-) rename host/include/aarch64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/aarch64/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/generic/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/generic/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/loongarch64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/loongarch64/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/x86_64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) diff --git a/host/include/aarch64/host/load-extract-al16-al8.h b/host/include/aarch64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/aarch64/host/load-extract-al16-al8.h rename to host/include/aarch64/host/load-extract-al16-al8.h.inc diff --git a/host/include/aarch64/host/store-insert-al16.h b/host/include/aarch64/host/store-insert-al16.h.inc similarity index 100% rename from host/include/aarch64/host/store-insert-al16.h rename to host/include/aarch64/host/store-insert-al16.h.inc diff --git a/host/include/generic/host/load-extract-al16-al8.h b/host/include/generic/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/generic/host/load-extract-al16-al8.h rename to host/include/generic/host/load-extract-al16-al8.h.inc diff --git a/host/include/generic/host/store-insert-al16.h b/host/include/generic/host/store-insert-al16.h.inc similarity index 100% rename from host/include/generic/host/store-insert-al16.h rename to host/include/generic/host/store-insert-al16.h.inc diff --git a/host/include/loongarch64/host/load-extract-al16-al8.h b/host/include/loongarch64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/loongarch64/host/load-extract-al16-al8.h rename to host/include/loongarch64/host/load-extract-al16-al8.h.inc diff --git a/host/include/loongarch64/host/store-insert-al16.h b/host/include/loongarch64/host/store-insert-al16.h.inc similarity index 100% rename from host/include/loongarch64/host/store-insert-al16.h rename to host/include/loongarch64/host/store-insert-al16.h.inc diff --git a/host/include/x86_64/host/load-extract-al16-al8.h b/host/include/x86_64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/x86_64/host/load-extract-al16-al8.h rename to host/include/x86_64/host/load-extract-al16-al8.h.inc diff --git a/accel/tcg/ldst_atomicity.c.inc b/accel/tcg/ldst_atomicity.c.inc index 97dae70d53..134da3c1da 100644 --- a/accel/tcg/ldst_atomicity.c.inc +++ b/accel/tcg/ldst_atomicity.c.inc @@ -9,8 +9,8 @@ * See the COPYING file in the top-level directory. */ -#include "host/load-extract-al16-al8.h" -#include "host/store-insert-al16.h" +#include "host/load-extract-al16-al8.h.inc" +#include "host/store-insert-al16.h.inc" #ifdef CONFIG_ATOMIC64 # define HAVE_al8 true From patchwork Fri Apr 26 19:41:39 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id i22-20020a1709061cd600b00a55a10eb070sm7881150ejh.214.2024.04.26.12.43.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 19/38] accel/tcg: Rename helper-head.h -> helper-head.h.inc Date: Fri, 26 Apr 2024 21:41:39 +0200 Message-ID: <20240426194200.43723-20-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22d; envelope-from=philmd@linaro.org; helo=mail-lj1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename "exec/helper-head.h" as "exec/helper-head.h.inc". Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240424173333.96148-4-philmd@linaro.org> --- include/exec/helper-gen.h.inc | 2 +- include/exec/{helper-head.h => helper-head.h.inc} | 0 include/exec/helper-proto.h.inc | 2 +- include/exec/helper-info.c.inc | 2 +- 4 files changed, 3 insertions(+), 3 deletions(-) rename include/exec/{helper-head.h => helper-head.h.inc} (100%) diff --git a/include/exec/helper-gen.h.inc b/include/exec/helper-gen.h.inc index c009641517..d9fd3ed72a 100644 --- a/include/exec/helper-gen.h.inc +++ b/include/exec/helper-gen.h.inc @@ -8,7 +8,7 @@ #include "tcg/tcg.h" #include "tcg/helper-info.h" -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" #define DEF_HELPER_FLAGS_0(name, flags, ret) \ extern TCGHelperInfo glue(helper_info_, name); \ diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h.inc similarity index 100% rename from include/exec/helper-head.h rename to include/exec/helper-head.h.inc diff --git a/include/exec/helper-proto.h.inc b/include/exec/helper-proto.h.inc index c3aa666929..f8e57e43ce 100644 --- a/include/exec/helper-proto.h.inc +++ b/include/exec/helper-proto.h.inc @@ -5,7 +5,7 @@ * Define HELPER_H for the header file to be expanded. */ -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" /* * Work around an issue with --enable-lto, in which GCC's ipa-split pass diff --git a/include/exec/helper-info.c.inc b/include/exec/helper-info.c.inc index 530d2e6d35..c551736d49 100644 --- a/include/exec/helper-info.c.inc +++ b/include/exec/helper-info.c.inc @@ -7,7 +7,7 @@ #include "tcg/tcg.h" #include "tcg/helper-info.h" -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" /* * Need one more level of indirection before stringification From patchwork Fri Apr 26 19:41:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792360 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625999wrh; Fri, 26 Apr 2024 12:46:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXtLLaoxh/qJdjpUwyMVMl1K83akGHyI1KVvd29AW4GtDakALs51keNSnrlgd37rUY3pjR0dmwtstrp4Sb0Tbu2 X-Google-Smtp-Source: AGHT+IEqwYjrpRBcLTVS/CCveQXxwnpJSV9N/eb1uXsk1/+HyqsBvUhOQ/kRf2TZ/zDqkThYNylc X-Received: by 2002:a05:620a:992:b0:78e:e479:3ddb with SMTP id x18-20020a05620a099200b0078ee4793ddbmr4003765qkx.23.1714160806683; Fri, 26 Apr 2024 12:46:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160806; cv=none; d=google.com; s=arc-20160816; b=oEUZpDRcEybF2/bEwX8NErk9+i0dlrvRnnz6hrm34NszdgnjXAIBNJn9vORS4PXsHn aznwQlosP5ZtRA4spgMtWtJ24T6j530yby/EGrttVioDYnb56pv6rLsApONM2hKvVSqn qkWqY6DdxukrXiJirK0ga199ugQyG+wbxVKY+5L6lCujoKSc9O2iEJPXi+Nn9+5XFJAH xywpNueThVGkurg4+luqNrm9UJIfGniAESoWm03UWkgYL+jWWHApGVyT7yonczWlC50u Bjdhm31GcBCcewU18NP+Qr+ZBNYeZg1BFOUfmSH0OyJnOXqfomDrTk/oQOkEkp6O72/S NirA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wBK1Qu77lYfBqxGndHp709YTz7kNkXLsmRyQsGRMcEU=; fh=hvZPMAvcztJYXkd77b6oZLa+MkEWEjisSs6DkC7CdmA=; b=sVn98ct90gQsf+nsJgMwtkPYndcJrUOLajcWZrkdRoR/VvZxcdeUtYHnqV8l/Z/N11 HDvnGe4hMnBr+SCkNzTohcCaUWkRUaCVXCVUWT3mYlnGEAoUjkRr1/hqi/ZBAbwWu7ND vlAyGTApUCpdlHKkxPhn4UhFv0hs4RuUHFzfrctqHpI8BfbaT+TWjdPcz2ZX96pk4iKl AaGg/+l6ZesVrbspKDPQIwrGy42M8lOdf2kU5PsD3EgCLMs9bxWWnpwZuE10wEjmDIRg Ffv7fhtoC4EuvBGbeh+LN4ckNzpEFSwhoB6E4SbZe/IkBGnWh9V7BF2Iawj8a4bLknAG elQw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=r2rxBUEs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id k25-20020a1709062a5900b00a55a06d7744sm7902411eje.73.2024.04.26.12.43.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Sunil Muthuswamy Subject: [PULL 20/38] accel/whpx: Use accel-specific per-vcpu @dirty field Date: Fri, 26 Apr 2024 21:41:40 +0200 Message-ID: <20240426194200.43723-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org WHPX has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-2-philmd@linaro.org> --- target/i386/whpx/whpx-all.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 31eec7048c..b08e644517 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -237,6 +237,7 @@ struct AccelCPUState { uint64_t tpr; uint64_t apic_base; bool interruption_pending; + bool dirty; /* Must be the last field as it may have a tail */ WHV_RUN_VP_EXIT_CONTEXT exit_ctx; @@ -839,7 +840,7 @@ static HRESULT CALLBACK whpx_emu_setreg_callback( * The emulator just successfully wrote the register state. We clear the * dirty state so we avoid the double write on resume of the VP. */ - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; return hr; } @@ -1394,7 +1395,7 @@ static int whpx_last_vcpu_stopping(CPUState *cpu) /* Returns the address of the next instruction that is about to be executed. */ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid) { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { /* The CPU registers have been modified by other parts of QEMU. */ return cpu_env(cpu)->eip; } else if (exit_context_valid) { @@ -1713,9 +1714,9 @@ static int whpx_vcpu_run(CPUState *cpu) } do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (exclusive_step_mode == WHPX_STEP_NONE) { @@ -2063,9 +2064,9 @@ static int whpx_vcpu_run(CPUState *cpu) static void do_whpx_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { whpx_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } } @@ -2073,20 +2074,20 @@ static void do_whpx_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_data arg) { whpx_set_registers(cpu, WHPX_SET_RESET_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_whpx_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_data arg) { whpx_set_registers(cpu, WHPX_SET_FULL_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu, run_on_cpu_data arg) { - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } /* @@ -2095,7 +2096,7 @@ static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu, void whpx_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_whpx_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -2235,7 +2236,7 @@ int whpx_init_vcpu(CPUState *cpu) } vcpu->interruptable = true; - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; cpu->accel = vcpu; max_vcpu_index = max(max_vcpu_index, cpu->cpu_index); qemu_add_vm_change_state_handler(whpx_cpu_update_state, env); From patchwork Fri Apr 26 19:41:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792382 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627609wrh; Fri, 26 Apr 2024 12:51:41 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV3neHcCtaChDX+lWFzkOW8p0JOBcu1PsCsGUQsIii6aGlyuOSHWevPyl4f2nL6rRe1h++EnIUVzF2yCfPVf5Uz X-Google-Smtp-Source: AGHT+IEExkkIYZeEruDPqP40nPBvSLrAcA5BoimeBpqPjQkqp7tvo4NVZxNXFw6pM+4C1j5Azi2x X-Received: by 2002:a05:620a:43aa:b0:790:9860:1e09 with SMTP id a42-20020a05620a43aa00b0079098601e09mr4633519qkp.42.1714161101740; Fri, 26 Apr 2024 12:51:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714161101; cv=none; d=google.com; s=arc-20160816; b=yKxdarLHdemS8t3P0gl9rY21LB9kuEK+Wd4L9JbUnAg6w83f2G9vIw3xvJ2Q2iduEi 5KxiLRMm0uvImzeNOqF+jPRxQBbP5IToWp9GfHIPuHIJrWIko1S2o9M6IF7RMMzHUAqD z/cH6TyzBzs3RqVFv1CcyTfKUSMFQCufJRMIN1NTVYKHtuSW8PKE5b1ja8daO0+NzeV2 voQj0joEQIkcNaOvcdQsTW0mXF3mGp1YP2zurXTv01VlRE/w9VNzh5z1DjYYm/RLOYwu Ce4WSvj6sQHcmjXmkpV4LTDRN+PDrI3M8wIyH5l8/DF3LoiNf57KaMEQgaqv1+mU42yA 0rgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Yi4qzwVEIokTDVOXJGX3UXAbAGnKr2+Pju6ZmUzQWug=; fh=AbeTq7OKo/slgVqwO48iS0yQftxGrIIvu+7dQHo4VqY=; b=zwUHQDAFVdB/3Oiu18SOqZ4QFYDPvLnAUfqyVxN+M39nmvhmm+EbJ/Yl1QNxC7zYxK J74rA7uq1FlWQvCk4lpH1a3gEGFSTCtoKCJHsI/ll9eBitVzPX2yb3ZWpyD6eh8h/9px F8jTMEmnvtf/iBDDhcWWOONbUD/NZvYknSoGIq9N9wBxaGgR2J+Vf3ho88JiNK9oJ9Sy ncP41VXWaXo3hXIanxYIjDfCw4Wl89JTgKKQesU6OUZBiUer7LfSjPCMSVoM7qPAP+qM n8J/gjuLy4kG982bvNi3+mU2WKaysF1hIb1iVTABqxLiagkfmfBCDNDj20DcIgZD57DG LoOg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JlxMWkm6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id bf17-20020a0564021a5100b0056bf6287f32sm10263342edb.26.2024.04.26.12.44.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:05 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Reinoud Zandijk Subject: [PULL 21/38] accel/nvmm: Use accel-specific per-vcpu @dirty field Date: Fri, 26 Apr 2024 21:41:41 +0200 Message-ID: <20240426194200.43723-22-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52b; envelope-from=philmd@linaro.org; helo=mail-ed1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org NVMM has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-3-philmd@linaro.org> --- target/i386/nvmm/nvmm-all.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c index 49a3a3b916..f9cced53b3 100644 --- a/target/i386/nvmm/nvmm-all.c +++ b/target/i386/nvmm/nvmm-all.c @@ -30,6 +30,7 @@ struct AccelCPUState { struct nvmm_vcpu vcpu; uint8_t tpr; bool stop; + bool dirty; /* Window-exiting for INTs/NMIs. */ bool int_window_exit; @@ -507,7 +508,7 @@ nvmm_io_callback(struct nvmm_io *io) } /* Needed, otherwise infinite loop. */ - current_cpu->vcpu_dirty = false; + current_cpu->accel->dirty = false; } static void @@ -516,7 +517,7 @@ nvmm_mem_callback(struct nvmm_mem *mem) cpu_physical_memory_rw(mem->gpa, mem->data, mem->size, mem->write); /* Needed, otherwise infinite loop. */ - current_cpu->vcpu_dirty = false; + current_cpu->accel->dirty = false; } static struct nvmm_assist_callbacks nvmm_callbacks = { @@ -726,9 +727,9 @@ nvmm_vcpu_loop(CPUState *cpu) * Inner VCPU loop. */ do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (qcpu->stop) { @@ -826,32 +827,32 @@ static void do_nvmm_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { nvmm_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } static void do_nvmm_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_data arg) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_nvmm_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_data arg) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_nvmm_cpu_synchronize_pre_loadvm(CPUState *cpu, run_on_cpu_data arg) { - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } void nvmm_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_nvmm_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -981,7 +982,7 @@ nvmm_init_vcpu(CPUState *cpu) } } - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; cpu->accel = qcpu; return 0; From patchwork Fri Apr 26 19:41:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792372 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626776wrh; Fri, 26 Apr 2024 12:49:05 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUturerBs6fSZbc1EjZHSrLETvDjUtdu10fMGDZX2uMOmk4QcRVeETU0yvolJowWIQYoiq+cKfSqZvkYsju2vKR X-Google-Smtp-Source: AGHT+IGjMo8lQbjqOgSrcWzmnuVdc7+IHAx5Hy+JZt+ZoqsQiAzOmkPciUA+4XYmW5XomoDhG29b X-Received: by 2002:a05:6358:c94:b0:186:45c:d6de with SMTP id o20-20020a0563580c9400b00186045cd6demr3422789rwj.26.1714160945441; Fri, 26 Apr 2024 12:49:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160945; cv=none; d=google.com; s=arc-20160816; b=ud41lH1dm3jWkeveyMr72zB51EuT1uqiEpRmWySy1GnsnOmWEwnvpQiFNn4Vi+VOOc viZr8yz/Rb09/X0YXFgVa3UW5mH1Gc24Ew2Hq/3wpM+TqMcgKdb4f/zox2UOHBJ2lA+r xBb26tzGo7G7TojLteE8UxWK+Mrz92yXkkS8XaZ5ruFppnkN8ujj/FEBW0PX5bF/llTi 2GOLLpRdC6+jn7k83+YtmDsaPePmOPLlSNkxi+gGGvqc6bVw82Vnd0BGQpv1YXoWDbpE fFMoiVo3NCKInLmq3vLUpAUlEUY/NgYfmKBsJ7rKTmM683obAIMXbVZ/V8YsYiDvGp2P bntA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Qa1f/IUXOXDzam0s/oPvMcTs9laXpRm0rBkY9PGU7o4=; fh=kzJlNHp4x+homlRj/h4v+8gZBoPkSjOQM/OzXQ8hDeI=; b=Uh8yF1uQ6yTpoUY5aHfwe6+j+ChnwGqOFN/lrEhOA+eu3s5T4EoVuGMKZyJH23CByJ SSTH6AI8NcO+qZUk0s8SH8jI7novbWo3TZRTd3+sQo6YbCo5fboDyMst7rohwRUIuFP1 WZUN2lT5z47xAz7g6Pk3317x/Bzkh5v74rR0fl6JY0yGTUDlzVfcdYir4f9IiC9Q15Co jI70DTnsZqR/VfVz++ASZYWkrvJkVkj2w1xP6Gdp1cxP3PSmIbhlYq3bpHlBE6lxeizC /XkFNEA7x8OoUfEOF3Ygyne3CZB7Q4CGETWwlrgOjZU4HYaKkIrWPg1nb0S2cH3T2eR0 ZyDg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Qz99Ul1a; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id dk21-20020a170907941500b00a55aee4bf74sm6993909ejc.79.2024.04.26.12.44.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Cameron Esfahani , Roman Bolshakov , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Alexander Graf , Peter Maydell Subject: [PULL 22/38] accel/hvf: Use accel-specific per-vcpu @dirty field Date: Fri, 26 Apr 2024 21:41:42 +0200 Message-ID: <20240426194200.43723-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=philmd@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org HVF has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-4-philmd@linaro.org> --- include/hw/core/cpu.h | 3 +-- include/sysemu/hvf_int.h | 1 + accel/hvf/hvf-accel-ops.c | 10 +++++----- target/arm/hvf/hvf.c | 4 ++-- target/i386/hvf/hvf.c | 4 ++-- target/i386/hvf/x86hvf.c | 2 +- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 7f037b158e..cead8f01a6 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -525,6 +525,7 @@ struct CPUState { uint32_t kvm_fetch_index; uint64_t dirty_pages; int kvm_vcpu_stats_fd; + bool vcpu_dirty; /* Use by accel-block: CPU is executing an ioctl() */ QemuLockCnt in_ioctl_lock; @@ -546,8 +547,6 @@ struct CPUState { int32_t exception_index; AccelCPUState *accel; - /* shared by kvm and hvf */ - bool vcpu_dirty; /* Used to keep track of an outstanding cpu throttle thread for migration * autoconverge diff --git a/include/sysemu/hvf_int.h b/include/sysemu/hvf_int.h index 718beddcdd..4a327fd526 100644 --- a/include/sysemu/hvf_int.h +++ b/include/sysemu/hvf_int.h @@ -55,6 +55,7 @@ struct AccelCPUState { bool vtimer_masked; sigset_t unblock_ipi_mask; bool guest_debug_enabled; + bool dirty; }; void assert_hvf_ok(hv_return_t ret); diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index d94d41ab6d..40d4187d9d 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -204,15 +204,15 @@ static void hvf_set_phys_mem(MemoryRegionSection *section, bool add) static void do_hvf_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { hvf_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } } static void hvf_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_hvf_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -221,7 +221,7 @@ static void do_hvf_cpu_synchronize_set_dirty(CPUState *cpu, run_on_cpu_data arg) { /* QEMU state is the reference, push it to HVF now and on next entry */ - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } static void hvf_cpu_synchronize_post_reset(CPUState *cpu) @@ -402,7 +402,7 @@ static int hvf_init_vcpu(CPUState *cpu) #else r = hv_vcpu_create((hv_vcpuid_t *)&cpu->accel->fd, HV_VCPU_DEFAULT); #endif - cpu->vcpu_dirty = 1; + cpu->accel->dirty = true; assert_hvf_ok(r); cpu->accel->guest_debug_enabled = false; diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 65a5601804..db628c1cba 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -806,9 +806,9 @@ int hvf_put_registers(CPUState *cpu) static void flush_cpu_state(CPUState *cpu) { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { hvf_put_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } } diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 1ed8ed5154..e493452acb 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -419,9 +419,9 @@ int hvf_vcpu_exec(CPUState *cpu) } do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { hvf_put_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (hvf_inject_interrupts(cpu)) { diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index be2c46246e..1569f860eb 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -427,7 +427,7 @@ int hvf_process_events(CPUState *cs) X86CPU *cpu = X86_CPU(cs); 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id cn18-20020a0564020cb200b00571bfc97b79sm10018803edb.55.2024.04.26.12.44.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Peter Xu , David Hildenbrand Subject: [PULL 23/38] exec/cpu-all: Reduce 'qemu/rcu.h' header inclusion Date: Fri, 26 Apr 2024 21:41:43 +0200 Message-ID: <20240426194200.43723-24-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h", however "exec/ram_addr.h" does. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-17-philmd@linaro.org> --- include/exec/cpu-all.h | 1 - include/exec/ram_addr.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index b86209fc49..586dc56d9e 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -24,7 +24,6 @@ #include "exec/tswap.h" #include "qemu/thread.h" #include "hw/core/cpu.h" -#include "qemu/rcu.h" /* some important defines: * diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index 07c8f86375..891c44cf2d 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -26,6 +26,7 @@ #include "exec/ramlist.h" #include "exec/ramblock.h" #include "exec/exec-all.h" +#include "qemu/rcu.h" extern uint64_t total_dirty_pages; From patchwork Fri Apr 26 19:41:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792361 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626140wrh; Fri, 26 Apr 2024 12:47:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWS7qeNVKndk19rqMZKbVIrwYoz+9VdJC6cWeinsHvmKSTNpgg3a+toft/hGsDiH2qKQWAjDzSKLrXiscHhI/WJ X-Google-Smtp-Source: AGHT+IG39mF1o+vg983kYYdqs4DuNHOA8odhcHrrsPmlMIyEW+utpji07YGNXFZ+jkQ4PnplAjTH X-Received: by 2002:ac8:5f47:0:b0:437:9be4:6679 with SMTP id y7-20020ac85f47000000b004379be46679mr3684965qta.34.1714160834607; Fri, 26 Apr 2024 12:47:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160834; cv=none; d=google.com; s=arc-20160816; b=qsKjlupEH8hwQYcQWMZg0e9KsHZxjjpsPDHbPgLtVgqfa61dv8iCSZOXm4DBarZLEn /C/05E+1It9mngov1mVJ6zuNoGU5f81MmV7UdXujv49NQAyG6Hd0VkR6lTFGg5NfXqm5 N0gs9XJm2ZsU3nvLilXzLumGSfoCPZGdH+kLFCEqhTKgCKoqJxNhLAntN6+oxL7V5bqb 7e3pXtSx9uffBw4fTmhYkWBkWC9dMcTkCpYcm53mP95GEumhU6pRGKXouFD7ob5lmz36 5FEiDH5V5w/rUVuQ01xl9ay0sSZQeKkKKhN5IAr0jjKPbvmjjKCPMfBiEuJp7FlY9Hqk k8og== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=hRodVMKRPlEehBD+pKF9cYT1VEV2JM/RMXBv7TIb/2Y=; fh=5/3pYq1KAvHonxEvUpwdHvaCf4rwzSKbdhOfqjldFeE=; b=BWQvYfcZKczxcIXM5pjxBY9/yxtWmUdjCeQb7Wi8vUVV3143HL4tZtMO/7YebNthpw o5xOHznvRtby41Wh6HvWW1KvQivecG7On3WLykIH2FYS57eTw+pnemkQQDRSYTnwm28D iGo/Qy6cgGzP8YEbQsC0oJUbj4vb8GAFe7vbMTpWbMezSWnq6rtgzkWLSFY/jMlj5lfg IYOEauoGxhv7CtW/LISJut1v88ZP0u4Fy8cRvabtoxlQmCC5fHZkj6tmMt7d/BS73XG0 O12J8KJ25iZ21UmcY6VWalRlkprrvnYzY7oYa3p38fxsyNIa4NZx9qE1a8aLZJ2ntHd/ 2f4w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=azNxgAXh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id f20-20020a17090624d400b00a5575cde7cdsm10578996ejb.220.2024.04.26.12.44.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini Subject: [PULL 24/38] exec/cpu-all: Remove unused 'qemu/thread.h' header Date: Fri, 26 Apr 2024 21:41:44 +0200 Message-ID: <20240426194200.43723-25-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=philmd@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Nothing is required from "qemu/thread.h" in "exec/cpu-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-13-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 586dc56d9e..4de0d5a0d7 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -22,7 +22,6 @@ #include "exec/cpu-common.h" #include "exec/memory.h" #include "exec/tswap.h" -#include "qemu/thread.h" #include "hw/core/cpu.h" /* some important defines: From patchwork Fri Apr 26 19:41:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792385 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627825wrh; Fri, 26 Apr 2024 12:52:19 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWM8uAhyD5CLW7u2WpfYcTQHQjk1LgXUkIjFDetT5TbQwbrNh0FqAKxnJRzJUM+7gMU3xElEl/RmHT2hLu0TDKS X-Google-Smtp-Source: AGHT+IElrXkihvWhJZI/MmbpRaHYW3nqOMaZSnCn16jDyWnHyM0BixDlg3dgqbF8makAhE5l5+qO X-Received: by 2002:a05:620a:21d8:b0:790:81e5:5f30 with SMTP id h24-20020a05620a21d800b0079081e55f30mr4434840qka.70.1714161139587; Fri, 26 Apr 2024 12:52:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714161139; cv=none; d=google.com; s=arc-20160816; b=GjogMDe4Mzca0azrt7t1pULxGgraMO4vkFhqbaU+yiC4M+IGVGvKK/VdpPVQbJVptW fkobsrprvDT6N2J4YTUO7Ngmw0DVH9w/SsHjU2CVvGHaZG6eamUo0Z5q3gitefBNOlia ++TkoqCu9Jtyow/0nUAriNbJLdYj0HQi1rgx67aTVhMCFbMrUQpMe9f09zDXTb7PJPL7 UV+JWks3HaX72rtzX51mS6XYoVKqdlBzSXejX401nXfmlmkVQnqeTobY2qLyZmIWcqCT 6IqoxVjmcvdNUBiEJy09ra+WMmHCiMJX5tN8pM2xNLT6GWqBHMQpaWPXwpi9ftknKGfZ GFEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=P0UDCxOSM6losMm33QUR2Xxw05S6cfuoGa+9agKli+0=; fh=5/3pYq1KAvHonxEvUpwdHvaCf4rwzSKbdhOfqjldFeE=; b=cZN3xLX+qt+Ojiz3wbqt4RffAs3RdIbVfRhpzbwuCVcY6Nyb6MKtaqY63Vq5ZNmYZs qGSXhYnPvrd3yiW4N8OTH/66j6USbhzkAC8C83MT2yJyxpL7UYpMxgAegpNTTyIbmtN2 9fcFXn5pj1uZi4FQFNqDQ2zYPiKlixOS3FWC1udTXcF3eMe0XRG1LOTeztpR/HrygG/I Qq0X8ngvOsu7e3UOPnKMuN56k8Q2oFjMl/bGHmTEe9BR7OIqhIkFxn8DpusIdPAKVDHM RmJQyFEeqxVLEzKodmuTKsy/FU2zk7Dl9qu101DRp4xFpjEugWniun3cpAiOuAuPGwsz Y0RQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hssJiEDI; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id da25-20020a056402177900b005700024ca57sm10440528edb.4.2024.04.26.12.44.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini Subject: [PULL 25/38] exec/cpu-all: Remove unused tswapls() definitions Date: Fri, 26 Apr 2024 21:41:45 +0200 Message-ID: <20240426194200.43723-26-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12c; envelope-from=philmd@linaro.org; helo=mail-lf1-x12c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Last use of tswapls() was removed 2 years ago in commit aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-15-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 4de0d5a0d7..7c44ffb3af 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -38,11 +38,9 @@ #if TARGET_LONG_SIZE == 4 #define tswapl(s) tswap32(s) -#define tswapls(s) tswap32s((uint32_t *)(s)) #define bswaptls(s) bswap32s(s) #else #define tswapl(s) tswap64(s) -#define tswapls(s) tswap64s((uint64_t *)(s)) #define bswaptls(s) bswap64s(s) #endif From patchwork Fri Apr 26 19:41:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792357 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp625638wrh; Fri, 26 Apr 2024 12:45:38 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCU5D1zhy360Exdy37ruMV15CBNUwc1T0cyUT+tMHAIcRJqNf5kpm5lzYC0e9apjLA+YCEA6lNDruvfkRIX52gix X-Google-Smtp-Source: AGHT+IERHSloUpOsAFrKQdThHcDq38GnKItV9NO3Mb2+aUkJgg+2SlRg+ccJbmjpC0P+Qez9+NNi X-Received: by 2002:a05:6808:3a9a:b0:3c7:1d7e:f7d6 with SMTP id fb26-20020a0568083a9a00b003c71d7ef7d6mr3760923oib.18.1714160738037; Fri, 26 Apr 2024 12:45:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160738; cv=none; d=google.com; s=arc-20160816; b=bAILFB0APofu6x1YO+YbtyqVqd/X/VRLyTlch+qqMerjnGRELx9SLUmAaQ/ajvjxp4 yKsZzKbnyL7BXbzXJmzy6N4VRSPXjl6cSDpRDXfGxg4HYGSPwZUx9DQhJEvM47yntxag 5SgexK8woEmegS8gRfw+LcM+zl5fK6agbW6ZPhq+30BZpZZ4kEqe12F5xFutNg0zFE0S ajnyatcsQhcagXXM1Z8O54wVQs89z+b+kgyPkR7dFcwHhTbOGbFg406QEO2u/AweJTAf sAXRkZoR2kSUf1ptl9yKaGaJASyZ3Nt0Ij5pC2e0SUn+G63cX2Abb+RRudblMS/rhWab mPng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=gRQC9Ufjc2oRJM0oXSiGkyeAlDlLBhL0/a+ZOEekFQY=; fh=JQjYqxYXvpXCnSKlnOXsgmJp7BZKEdUECSSVGZb1pK0=; b=FF8V8jIB9o6/VhwKjd4vGXlsUMUnS06u/oOougBbGzF9RQc50f79ULNWmar7VgKu2F xrmI9Cnr8nNHM72ml/h+1Vw+wmnpPySyl2F3NNIavGOchJlC2vUUWTwyKpB12f75JsMj D91vggwD02iyFNIknqw9j98/RHqiLwP1vZ+JvbuE3l84MjGunh1qIID1ITDnjNN3pw2g azJNvXV5XtBgj7DU7nayTjHSIykCZTSDfHGzT1X2sXXy+MaaJOyKZKsDuVCNO7EvWHEB G4cwXWpgc3npb3PQC+jIeDe2rpzpdViIS/B70RPodvMKEiLXH9d+zt6Q+jHILZk7tSQF uhNQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bSeDSl62; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id f1-20020a170906ef0100b00a587cfd7a37sm4742921ejs.84.2024.04.26.12.44.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini , "Michael S. Tsirkin" , Gerd Hoffmann , Manos Pitsidianakis , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Alistair Francis Subject: [PULL 26/38] exec: Declare target_words_bigendian() in 'exec/tswap.h' Date: Fri, 26 Apr 2024 21:41:46 +0200 Message-ID: <20240426194200.43723-27-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We usually check target endianess before swapping values, so target_words_bigendian() declaration makes sense in "exec/tswap.h" with the target swapping helpers. Remove "hw/core/cpu.h" when it was only included to get the target_words_bigendian() declaration. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-16-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/tswap.h | 12 +++++++++++- include/hw/core/cpu.h | 11 ----------- cpu-target.c | 1 + disas/disas.c | 1 + hw/audio/virtio-snd.c | 2 +- hw/core/cpu-sysemu.c | 2 +- hw/core/generic-loader.c | 2 +- hw/display/vga.c | 2 +- hw/virtio/virtio.c | 1 + 9 files changed, 18 insertions(+), 16 deletions(-) diff --git a/include/exec/tswap.h b/include/exec/tswap.h index 5089cd6a4c..b7a4191347 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -8,9 +8,19 @@ #ifndef TSWAP_H #define TSWAP_H -#include "hw/core/cpu.h" #include "qemu/bswap.h" +/** + * target_words_bigendian: + * Returns true if the (default) endianness of the target is big endian, + * false otherwise. Note that in target-specific code, you can use + * TARGET_BIG_ENDIAN directly instead. On the other hand, common + * code should normally never need to know about the endianness of the + * target, so please do *not* use this function unless you know very well + * what you are doing! + */ +bool target_words_bigendian(void); + /* * If we're in target-specific code, we can hard-code the swapping * condition, otherwise we have to do (slower) run-time checks. diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index cead8f01a6..d89b2cffcb 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1168,17 +1168,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); void cpu_exec_reset_hold(CPUState *cpu); -/** - * target_words_bigendian: - * Returns true if the (default) endianness of the target is big endian, - * false otherwise. Note that in target-specific code, you can use - * TARGET_BIG_ENDIAN directly instead. On the other hand, common - * code should normally never need to know about the endianness of the - * target, so please do *not* use this function unless you know very well - * what you are doing! - */ -bool target_words_bigendian(void); - const char *target_name(void); #ifdef COMPILING_PER_TARGET diff --git a/cpu-target.c b/cpu-target.c index 4c0621bf33..f88649c299 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -35,6 +35,7 @@ #endif #include "sysemu/cpus.h" #include "sysemu/tcg.h" +#include "exec/tswap.h" #include "exec/replay-core.h" #include "exec/cpu-common.h" #include "exec/exec-all.h" diff --git a/disas/disas.c b/disas/disas.c index 7e3b0bb46c..ec14715ecd 100644 --- a/disas/disas.c +++ b/disas/disas.c @@ -6,6 +6,7 @@ #include "disas/disas.h" #include "disas/capstone.h" #include "hw/core/cpu.h" +#include "exec/tswap.h" #include "exec/memory.h" /* Filled in by elfload.c. Simplistic, but will do for now. */ diff --git a/hw/audio/virtio-snd.c b/hw/audio/virtio-snd.c index c80b58bf5d..6a2ee085c0 100644 --- a/hw/audio/virtio-snd.c +++ b/hw/audio/virtio-snd.c @@ -20,11 +20,11 @@ #include "qemu/log.h" #include "qemu/error-report.h" #include "include/qemu/lockable.h" +#include "exec/tswap.h" #include "sysemu/runstate.h" #include "trace.h" #include "qapi/error.h" #include "hw/audio/virtio-snd.h" -#include "hw/core/cpu.h" #define VIRTIO_SOUND_VM_VERSION 1 #define VIRTIO_SOUND_JACK_DEFAULT 0 diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index d0d6a910f9..2a9a2a4eb5 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "hw/core/sysemu-cpu-ops.h" bool cpu_paging_enabled(const CPUState *cpu) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index d4b5c501d8..ea8628b892 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -31,7 +31,7 @@ */ #include "qemu/osdep.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "sysemu/dma.h" #include "sysemu/reset.h" #include "hw/boards.h" diff --git a/hw/display/vga.c b/hw/display/vga.c index e91a76bf76..30facc6c8e 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -26,7 +26,7 @@ #include "qemu/units.h" #include "sysemu/reset.h" #include "qapi/error.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "hw/display/vga.h" #include "hw/i386/x86.h" #include "hw/pci/pci.h" diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 871674f9be..893a072c9d 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -20,6 +20,7 @@ #include "qemu/log.h" #include "qemu/main-loop.h" #include "qemu/module.h" +#include "exec/tswap.h" #include "qom/object_interfaces.h" #include "hw/core/cpu.h" #include "hw/virtio/virtio.h" From patchwork Fri Apr 26 19:41:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792370 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626524wrh; Fri, 26 Apr 2024 12:48:16 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV/tpGemRI4mt/oaPZiTY+6JBGmutdFM4HVlmZ3rw8JCB+XFe+K0oDX9y9Ch/bNTi7tgMsWqkNfaPGPn97JoCN4 X-Google-Smtp-Source: AGHT+IH2rWWgOLDRhcpjrPyC9sikzlctgwYiVppDwp321PQSbQI4V+iGVkgre2AVLl7vDn/1p0l5 X-Received: by 2002:a05:6214:f69:b0:699:45f8:dbf1 with SMTP id iy9-20020a0562140f6900b0069945f8dbf1mr4740021qvb.22.1714160895932; Fri, 26 Apr 2024 12:48:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160895; cv=none; d=google.com; s=arc-20160816; b=sGsK0gt5tUz32prW69dEF2YM2C2SKPtgbZn0+7eHomyTdokVHV1//Ua3339e7YdVJr jLcmDt/Y2Np2wbKunF36+pj5F2kX2b/BGwpHOWDlRHc9BnlzNf1rgFBUToEUfJMWWCxA G1OLhnsIqiTu8EQyG0yCqPERm/CR3KSssqUNkvLnCSizFn31awHoJbVexHCqHHZ6RqXP QmaN3Z/KtlmaiHeymW5w29GF2X6lD27VcqQeQEJ3gHbH0XmSBbT/qcOYsFRwqnZb9AQ9 Ejlqar4pHOxlzatbz3jl1DFfnRUaN6H7iNeB44yReFaT9uJm5jkspvqoBDhVNT+RgeFH EjUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=WYKx5VszY8nnZEUuUG4wRLUF4gkwtzF7xUPTRJGo2+Q=; fh=UsvrWiw8iuAIKc6VNCTZEK8fw8WS394Hi7v6I2mixnA=; b=uL3rX9RcugFspb2kZSQngUCi0eGmHrz539bqAZSvHbZvFSU1jT59v2Bgd0MBWJtgYA cEdX0p6OxcXVIrO2YMTZIUXd8IEz7Niu6ymunkLHUWnn7lZS9XqM4OnmhiZsXagDT7aJ 61XFPg1PLfWxmFdKbjef4/6Mc7a7BiA7sJSIAP0nuwufGXBXKGXgC6xxTeeyi7cvskt6 w5w3cvKFWGLlchCUQjzZ7YKe3OQCfqyIxbs6FBOrR8IGzgsoMMuDY8RFN7rCAYZCaLgy gN857v53AqpGLbe/ZA9MZuGA/czOxB4GfJ8tprOMz4yoiOBNJKNmouPZw1OV9gZKPeMC vFxA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="zU/XCxym"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id l11-20020a50cbcb000000b0057030326144sm10281434edi.47.2024.04.26.12.44.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Warner Losh , Kyle Evans , Paolo Bonzini , Riku Voipio , Laurent Vivier Subject: [PULL 27/38] exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h' Date: Fri, 26 Apr 2024 21:41:47 +0200 Message-ID: <20240426194200.43723-28-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=philmd@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org tswapl() and bswaptls() are target-dependent and only used by user emulation. Move their definitions to a new header: "exec/user/tswap-target.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-17-philmd@linaro.org> Reviewed-by: Richard Henderson --- MAINTAINERS | 1 + bsd-user/freebsd/target_os_elf.h | 1 + bsd-user/freebsd/target_os_stack.h | 1 + bsd-user/netbsd/target_os_elf.h | 1 + bsd-user/openbsd/target_os_elf.h | 1 + include/exec/cpu-all.h | 8 -------- include/exec/user/abitypes.h | 1 + include/user/tswap-target.h | 22 ++++++++++++++++++++++ bsd-user/signal.c | 1 + bsd-user/strace.c | 1 + linux-user/elfload.c | 1 + linux-user/i386/signal.c | 1 + linux-user/ppc/signal.c | 1 + 13 files changed, 33 insertions(+), 8 deletions(-) create mode 100644 include/user/tswap-target.h diff --git a/MAINTAINERS b/MAINTAINERS index 96411e6adf..302b6fd00c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3692,6 +3692,7 @@ Overall usermode emulation M: Riku Voipio S: Maintained F: accel/tcg/user-exec*.c +F: include/exec/user/ F: include/user/ F: common-user/ diff --git a/bsd-user/freebsd/target_os_elf.h b/bsd-user/freebsd/target_os_elf.h index 9df17d56d8..01124979f7 100644 --- a/bsd-user/freebsd/target_os_elf.h +++ b/bsd-user/freebsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" #define bsd_get_ncpu() 1 /* until we pull in bsd-proc.[hc] */ diff --git a/bsd-user/freebsd/target_os_stack.h b/bsd-user/freebsd/target_os_stack.h index d15fc3263f..ac0ef22cd7 100644 --- a/bsd-user/freebsd/target_os_stack.h +++ b/bsd-user/freebsd/target_os_stack.h @@ -23,6 +23,7 @@ #include #include "target_arch_sigtramp.h" #include "qemu/guest-random.h" +#include "user/tswap-target.h" /* * The initial FreeBSD stack is as follows: diff --git a/bsd-user/netbsd/target_os_elf.h b/bsd-user/netbsd/target_os_elf.h index 2f3cb20871..9de0f290c0 100644 --- a/bsd-user/netbsd/target_os_elf.h +++ b/bsd-user/netbsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" /* this flag is uneffective under linux too, should be deleted */ #ifndef MAP_DENYWRITE diff --git a/bsd-user/openbsd/target_os_elf.h b/bsd-user/openbsd/target_os_elf.h index 6dca9c5a85..4cf5747dcd 100644 --- a/bsd-user/openbsd/target_os_elf.h +++ b/bsd-user/openbsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" /* this flag is uneffective under linux too, should be deleted */ #ifndef MAP_DENYWRITE diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 7c44ffb3af..78848f018c 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -36,14 +36,6 @@ #define BSWAP_NEEDED #endif -#if TARGET_LONG_SIZE == 4 -#define tswapl(s) tswap32(s) -#define bswaptls(s) bswap32s(s) -#else -#define tswapl(s) tswap64(s) -#define bswaptls(s) bswap64s(s) -#endif - /* Target-endianness CPU memory access functions. These fit into the * {ld,st}{type}{sign}{size}{endian}_p naming scheme described in bswap.h. */ diff --git a/include/exec/user/abitypes.h b/include/exec/user/abitypes.h index db4a670328..731f345ff5 100644 --- a/include/exec/user/abitypes.h +++ b/include/exec/user/abitypes.h @@ -2,6 +2,7 @@ #define EXEC_USER_ABITYPES_H #include "cpu.h" +#include "user/tswap-target.h" #ifdef TARGET_ABI32 #define TARGET_ABI_BITS 32 diff --git a/include/user/tswap-target.h b/include/user/tswap-target.h new file mode 100644 index 0000000000..4719330dbb --- /dev/null +++ b/include/user/tswap-target.h @@ -0,0 +1,22 @@ +/* + * target-specific swap() definitions + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef USER_TSWAP_H +#define USER_TSWAP_H + +#include "exec/cpu-defs.h" +#include "exec/tswap.h" + +#if TARGET_LONG_SIZE == 4 +#define tswapl(s) tswap32(s) +#define bswaptls(s) bswap32s(s) +#else +#define tswapl(s) tswap64(s) +#define bswaptls(s) bswap64s(s) +#endif + +#endif diff --git a/bsd-user/signal.c b/bsd-user/signal.c index e5a773ddde..b2faf1d0dd 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu.h" +#include "user/tswap-target.h" #include "gdbstub/user.h" #include "signal-common.h" #include "trace.h" diff --git a/bsd-user/strace.c b/bsd-user/strace.c index 96499751eb..6dc01d3be7 100644 --- a/bsd-user/strace.c +++ b/bsd-user/strace.c @@ -22,6 +22,7 @@ #include #include "qemu.h" +#include "user/tswap-target.h" #include "os-strace.h" /* OS dependent strace print functions */ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index a0999dac15..207455c1ba 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -7,6 +7,7 @@ #include #include "qemu.h" +#include "user/tswap-target.h" #include "user-internals.h" #include "signal-common.h" #include "loader.h" diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index cfe70fc5cf..990048f42a 100644 --- a/linux-user/i386/signal.c +++ b/linux-user/i386/signal.c @@ -21,6 +21,7 @@ #include "user-internals.h" #include "signal-common.h" #include "linux-user/trace.h" +#include "user/tswap-target.h" /* from the Linux kernel - /arch/x86/include/uapi/asm/sigcontext.h */ diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c index 652038a53c..a1d8c0bccc 100644 --- a/linux-user/ppc/signal.c +++ b/linux-user/ppc/signal.c @@ -21,6 +21,7 @@ #include "user-internals.h" #include "signal-common.h" #include "linux-user/trace.h" +#include "user/tswap-target.h" #include "vdso-asmoffset.h" /* See arch/powerpc/include/asm/ucontext.h. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id qt11-20020a170906eceb00b00a55ab2630c3sm7155905ejb.38.2024.04.26.12.44.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Richard Henderson , Riku Voipio Subject: [PULL 28/38] exec/user: Do not include 'cpu.h' in 'abitypes.h' Date: Fri, 26 Apr 2024 21:41:48 +0200 Message-ID: <20240426194200.43723-29-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "exec/user/abitypes.h" requires: - "exec/cpu-defs.h" (TARGET_LONG_BITS) - "exec/tswap.h" (tswap32) In order to avoid "cpu.h", pick the minimum required headers. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20231212123401.37493-20-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/user/abitypes.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/exec/user/abitypes.h b/include/exec/user/abitypes.h index 731f345ff5..3ec1969368 100644 --- a/include/exec/user/abitypes.h +++ b/include/exec/user/abitypes.h @@ -1,7 +1,12 @@ #ifndef EXEC_USER_ABITYPES_H #define EXEC_USER_ABITYPES_H -#include "cpu.h" +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + +#include "exec/cpu-defs.h" +#include "exec/tswap.h" #include "user/tswap-target.h" #ifdef TARGET_ABI32 From patchwork Fri Apr 26 19:41:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792365 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626320wrh; Fri, 26 Apr 2024 12:47:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWPaMVmPMpD4B3iI1b1X0puXyGmZvOK0USHShMEaoxop1Ok6sP09gPc9l8n4eAMiWN4rBUpvG69qm+b0LYP76mU X-Google-Smtp-Source: AGHT+IHwYUdB8KEOdNJgyfYo13xdbhAP6DSJ0jCyvpTTiIF2VHJ7ersJIngwDJbDQkwDUzYGjedO X-Received: by 2002:a05:6214:1d0c:b0:6a0:7240:9a89 with SMTP id e12-20020a0562141d0c00b006a072409a89mr4199022qvd.54.1714160858849; Fri, 26 Apr 2024 12:47:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160858; cv=none; d=google.com; s=arc-20160816; b=ezqeDRCeSAMohbfM/XXR0zJNHqY8pTuhfvz7zKiflwQxSapaakbQt6lOT6GEsuZWsc FJtFU4Tu//uP5pqiibD0FQYx4dg90msM6ONpTeJyPg4fGIXZJw4cAkvlCQV7DXE5I7MR aQHPjFAKU2BoSGSDT2fSz0/NiiP5Lg+rq9pkDeHDlk7hnownXXQvthb9rhP2xulxzytX BfMy0hQYKytZ7DfLgbPKEfhV8jT9BEIjOA/PZ5gLkx+lNysWtc9XBtP3VJK3hxRDYrgg W59hxzrOV64f7yXAa4J0oz04RN97s9O7Q+N+CAt85fiS3JJZmrtvgYDuzkBxFiIxKMQF LxvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=O9yWcGZAI9YJhaaCrPIJ5UzojqcAhJ+99W/2NEpvWPY=; fh=gUEsd95llBLtqUKhUnPIoHQ/SNwiv/bmtZ7rMzFWY9Q=; b=UvNvEJRN+IO0Dv9uqckdbGIuaBCeFIkp3E5Wqjs2Hz1/KHSzz6+b3biUWR+5S2DvJL ktIX+YTHARuWIbKjAXQ912G6ig73eOGp4B06kVImwjvdS/DbMdfOGW+nRQaPsrNIfabJ YiECM5sAE9XtC9tXm/bbvjBRUbaqpV7iIFu9ghAYXcTcFEG0x1oZ/dMpCO2QsJMvYWz9 iiHpCluiZ8uc9B/L7TOJewARJIT64w8Xk4pohs4ds1tC+Yaj7NEAgShQqw3t7lYT05I0 f+wYNxbEOWDJbkLS629UNJAudI0aLWRkplAwhGTpnHP9nTqmnX0Cbtc4B5idTlg14hbV uwqw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XM+o+9A7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id jw17-20020a170906e95100b00a58df78ab27sm188914ejb.166.2024.04.26.12.44.51 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 29/38] exec: Declare abi_ptr type in its own 'abi_ptr.h' header Date: Fri, 26 Apr 2024 21:41:49 +0200 Message-ID: <20240426194200.43723-30-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=philmd@linaro.org; helo=mail-lf1-x131.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The abi_ptr type is declared in "exec/cpu_ldst.h" with all the load/store helpers. Some source files requiring abi_ptr type don't need the load/store helpers. In order to simplify, create a new "exec/abi_ptr.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231212123401.37493-21-philmd@linaro.org> --- include/exec/abi_ptr.h | 33 +++++++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 17 +++-------------- include/exec/exec-all.h | 1 + include/exec/translator.h | 5 ++++- 4 files changed, 41 insertions(+), 15 deletions(-) create mode 100644 include/exec/abi_ptr.h diff --git a/include/exec/abi_ptr.h b/include/exec/abi_ptr.h new file mode 100644 index 0000000000..2aedcceb0c --- /dev/null +++ b/include/exec/abi_ptr.h @@ -0,0 +1,33 @@ +/* + * QEMU abi_ptr type definitions + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef EXEC_ABI_PTR_H +#define EXEC_ABI_PTR_H + +#include "cpu-param.h" + +#if defined(CONFIG_USER_ONLY) +/* + * sparc32plus has 64bit long but 32bit space address + * this can make bad result with g2h() and h2g() + */ +#if TARGET_VIRT_ADDR_SPACE_BITS <= 32 +typedef uint32_t abi_ptr; +#define TARGET_ABI_FMT_ptr "%x" +#else +typedef uint64_t abi_ptr; +#define TARGET_ABI_FMT_ptr "%"PRIx64 +#endif + +#else /* !CONFIG_USER_ONLY */ + +#include "exec/target_long.h" + +typedef target_ulong abi_ptr; +#define TARGET_ABI_FMT_ptr TARGET_FMT_lx + +#endif /* !CONFIG_USER_ONLY */ + +#endif diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 82690d3947..64e0319996 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -63,20 +63,11 @@ #define CPU_LDST_H #include "exec/memopidx.h" +#include "exec/abi_ptr.h" #include "qemu/int128.h" #include "cpu.h" #if defined(CONFIG_USER_ONLY) -/* sparc32plus has 64bit long but 32bit space address - * this can make bad result with g2h() and h2g() - */ -#if TARGET_VIRT_ADDR_SPACE_BITS <= 32 -typedef uint32_t abi_ptr; -#define TARGET_ABI_FMT_ptr "%x" -#else -typedef uint64_t abi_ptr; -#define TARGET_ABI_FMT_ptr "%"PRIx64 -#endif #ifndef TARGET_TAGGED_ADDRESSES static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) @@ -120,10 +111,8 @@ static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len) assert(h2g_valid(x)); \ h2g_nocheck(x); \ }) -#else -typedef vaddr abi_ptr; -#define TARGET_ABI_FMT_ptr VADDR_PRIx -#endif + +#endif /* CONFIG_USER_ONLY */ uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr); diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 9599e16a09..530d442112 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -22,6 +22,7 @@ #include "cpu.h" #if defined(CONFIG_USER_ONLY) +#include "exec/abi_ptr.h" #include "exec/cpu_ldst.h" #endif #include "exec/translation-block.h" diff --git a/include/exec/translator.h b/include/exec/translator.h index 2c4fb818e7..6cd937ac5c 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -19,7 +19,10 @@ */ #include "qemu/bswap.h" -#include "exec/cpu_ldst.h" /* for abi_ptr */ +#include "exec/cpu-common.h" +#include "exec/cpu-defs.h" +#include "exec/abi_ptr.h" +#include "cpu.h" /** * gen_intermediate_code From patchwork Fri Apr 26 19:41:50 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id qt3-20020a170906ece300b00a5887fed95dsm3904481ejb.2.2024.04.26.12.44.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang Subject: [PULL 30/38] exec: Declare MMUAccessType type in 'mmu-access-type.h' header Date: Fri, 26 Apr 2024 21:41:50 +0200 Message-ID: <20240426194200.43723-31-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The MMUAccessType enum is declared in "hw/core/cpu.h". "hw/core/cpu.h" contains declarations related to CPUState and CPUClass. Some source files only require MMUAccessType and don't need to pull in all CPU* declarations. In order to simplify, create a new "exec/mmu-access-type.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-2-philmd@linaro.org> --- include/exec/cpu_ldst.h | 1 + include/exec/exec-all.h | 1 + include/exec/mmu-access-type.h | 18 ++++++++++++++++++ include/hw/core/cpu.h | 8 +------- 4 files changed, 21 insertions(+), 7 deletions(-) create mode 100644 include/exec/mmu-access-type.h diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 64e0319996..5b99666702 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -64,6 +64,7 @@ #include "exec/memopidx.h" #include "exec/abi_ptr.h" +#include "exec/mmu-access-type.h" #include "qemu/int128.h" #include "cpu.h" diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 530d442112..4c5e470581 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -25,6 +25,7 @@ #include "exec/abi_ptr.h" #include "exec/cpu_ldst.h" #endif +#include "exec/mmu-access-type.h" #include "exec/translation-block.h" #include "qemu/clang-tsa.h" diff --git a/include/exec/mmu-access-type.h b/include/exec/mmu-access-type.h new file mode 100644 index 0000000000..28bbb05b94 --- /dev/null +++ b/include/exec/mmu-access-type.h @@ -0,0 +1,18 @@ +/* + * QEMU MMU Access type definitions + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef EXEC_MMU_ACCESS_TYPE_H +#define EXEC_MMU_ACCESS_TYPE_H + +typedef enum MMUAccessType { + MMU_DATA_LOAD = 0, + MMU_DATA_STORE = 1, + MMU_INST_FETCH = 2 +#define MMU_ACCESS_COUNT 3 +} MMUAccessType; + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d89b2cffcb..759c3e7d89 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -25,6 +25,7 @@ #include "exec/hwaddr.h" #include "exec/vaddr.h" #include "exec/memattrs.h" +#include "exec/mmu-access-type.h" #include "exec/tlb-common.h" #include "qapi/qapi-types-run-state.h" #include "qemu/bitmap.h" @@ -80,13 +81,6 @@ DECLARE_CLASS_CHECKERS(CPUClass, CPU, typedef struct ArchCPU CpuInstanceType; \ OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME); -typedef enum MMUAccessType { - MMU_DATA_LOAD = 0, - MMU_DATA_STORE = 1, - MMU_INST_FETCH = 2 -#define MMU_ACCESS_COUNT 3 -} MMUAccessType; - typedef struct CPUWatchpoint CPUWatchpoint; /* see accel-cpu.h */ From patchwork Fri Apr 26 19:41:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792374 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627114wrh; Fri, 26 Apr 2024 12:50:12 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXQByZOoHVmH/8BM/gvet1zffPs6JmUtm1NW0i6jsTkfdccYW17mXdOY7CTWtk/JgrTMif02vz3TY9TL67DOX8n X-Google-Smtp-Source: AGHT+IGEogk9KjMbSEQqKkJn/NJcWt24VHYsuqj4B4opXL2TzlV1cICTBUykh7bWELe9mrb/BXYE X-Received: by 2002:a05:622a:1821:b0:439:b3ce:d736 with SMTP id t33-20020a05622a182100b00439b3ced736mr801066qtc.25.1714161011926; Fri, 26 Apr 2024 12:50:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714161011; cv=none; d=google.com; s=arc-20160816; b=G0mer7R7WhjQMU0jTba9nzmH9+dZ0TG+O0tSrsbc4fCD9HjTMN3sKcen51goHz/hn7 LuM/ysTdaP0GE9dD0uJsrDonVu5AyytJTSTN+jBuc3B/sjuHqFVEQXhh1FgxxzKxc4fO peN9Y0TqC+tbxdX44NFV/K4TCdFTVC3j6m36zk4d/da8T9ilxq7Sibbo9LcB9ngGlBd3 j7/F/45lYNOmBc8GEZY3m4TvGOZB2QeEOK/G2airKE1yG4NTqGXj0KsVHKUYOU7Mezjl mIm0xhXEO4Oem7WFwDjW798SL39yLs1hh3uEIeYzJWLVKi6UX5gOF2R9JGfUbOW517jF +BWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=fHVia7emVLdfn7RVXOtjmfvyr/0v1O15dG1Znnu+R50=; fh=qFbY957xn2WKUIsgUAk4y13IQubbF/CwCepoK9/6lAg=; b=w1bAvGDlPITRTw6Y9++71FMWE05eCOVVrWOe2buB1FTTm+cOrHbbaCFHn21wWzsK2Y BaBj/3FrLNwODzoT9v6xyts+yrZ/p35F2j8zAB7Xag5EYUg95w+NlA+PRuJl1PTYQ2rI D281X1tIsfblNStFLAkEFuNEHdVUb97aetIjcovQWLE7A57f3cdkC5c1dkMR6VFyYrHX siyYytfBhVZ561VfDToUWQAipw0eZDW5MErXiumGosZYev9Nbh8RveM1krNZrriEX6Bu Dk6on+uuo0RgXfa294Sj2E9lvXeep8crQS9PA5tWROko3P475vPFIFkvt/4nydcImqi5 LQJw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VD3YBFow; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id ef15-20020a17090697cf00b00a58bcfa6610sm1863773ejb.185.2024.04.26.12.45.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:06 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Anton Johansson , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Peter Maydell , Nicholas Piggin , Daniel Henrique Barboza , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei Subject: [PULL 31/38] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header Date: Fri, 26 Apr 2024 21:41:51 +0200 Message-ID: <20240426194200.43723-32-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The CPUBreakpoint and CPUWatchpoint structures are declared in "hw/core/cpu.h", which contains declarations related to CPUState and CPUClass. Some source files only require the BP/WP definitions and don't need to pull in all CPU* API. In order to simplify, create a new "exec/breakpoint.h" header. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20240418192525.97451-3-philmd@linaro.org> --- include/exec/breakpoint.h | 30 ++++++++++++++++++++++++++++++ include/hw/core/cpu.h | 16 +--------------- target/arm/internals.h | 1 + target/ppc/internal.h | 1 + target/riscv/debug.h | 2 ++ 5 files changed, 35 insertions(+), 15 deletions(-) create mode 100644 include/exec/breakpoint.h diff --git a/include/exec/breakpoint.h b/include/exec/breakpoint.h new file mode 100644 index 0000000000..95f0482e6d --- /dev/null +++ b/include/exec/breakpoint.h @@ -0,0 +1,30 @@ +/* + * QEMU breakpoint & watchpoint definitions + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef EXEC_BREAKPOINT_H +#define EXEC_BREAKPOINT_H + +#include "qemu/queue.h" +#include "exec/vaddr.h" +#include "exec/memattrs.h" + +typedef struct CPUBreakpoint { + vaddr pc; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUBreakpoint) entry; +} CPUBreakpoint; + +typedef struct CPUWatchpoint { + vaddr vaddr; + vaddr len; + vaddr hitaddr; + MemTxAttrs hitattrs; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUWatchpoint) entry; +} CPUWatchpoint; + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 759c3e7d89..46b99a7ea5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -22,6 +22,7 @@ #include "hw/qdev-core.h" #include "disas/dis-asm.h" +#include "exec/breakpoint.h" #include "exec/hwaddr.h" #include "exec/vaddr.h" #include "exec/memattrs.h" @@ -347,21 +348,6 @@ typedef struct CPUNegativeOffsetState { bool can_do_io; } CPUNegativeOffsetState; -typedef struct CPUBreakpoint { - vaddr pc; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUBreakpoint) entry; -} CPUBreakpoint; - -struct CPUWatchpoint { - vaddr vaddr; - vaddr len; - vaddr hitaddr; - MemTxAttrs hitattrs; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUWatchpoint) entry; -}; - struct KVMState; struct kvm_run; diff --git a/target/arm/internals.h b/target/arm/internals.h index b53f5e8ff2..e40ec453d5 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -25,6 +25,7 @@ #ifndef TARGET_ARM_INTERNALS_H #define TARGET_ARM_INTERNALS_H +#include "exec/breakpoint.h" #include "hw/registerfields.h" #include "tcg/tcg-gvec-desc.h" #include "syndrome.h" diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 5b20ecbd33..601c0b533f 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -18,6 +18,7 @@ #ifndef PPC_INTERNAL_H #define PPC_INTERNAL_H +#include "exec/breakpoint.h" #include "hw/registerfields.h" /* PM instructions */ diff --git a/target/riscv/debug.h b/target/riscv/debug.h index 5794aa6ee5..c347863578 100644 --- a/target/riscv/debug.h +++ b/target/riscv/debug.h @@ -22,6 +22,8 @@ #ifndef RISCV_DEBUG_H #define RISCV_DEBUG_H +#include "exec/breakpoint.h" + #define RV_MAX_TRIGGERS 2 /* register index of tdata CSRs */ From patchwork Fri Apr 26 19:41:52 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id jz12-20020a17090775ec00b00a58a9a56c44sm2359531ejc.16.2024.04.26.12.45.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 32/38] exec: Restrict TCG specific declarations of 'cputlb.h' Date: Fri, 26 Apr 2024 21:41:52 +0200 Message-ID: <20240426194200.43723-33-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Avoid TCG specific declarations being used from non-TCG accelerators. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-5-philmd@linaro.org> --- include/exec/cputlb.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 6da1462c4f..ef18642a32 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -22,9 +22,14 @@ #include "exec/cpu-common.h" +#ifdef CONFIG_TCG + #if !defined(CONFIG_USER_ONLY) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); #endif + +#endif /* CONFIG_TCG */ + #endif From patchwork Fri Apr 26 19:41:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792373 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627099wrh; Fri, 26 Apr 2024 12:50:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUU1UAiVLtViM2kAQ2Kv+y3YHBalohGmzzZ4y5NWcn//Wh2+7hhUo81Bl2ax3GIA3r5CzMEZayw7hseQL+ceMYo X-Google-Smtp-Source: AGHT+IHYtpVWPWi69qhe9+wuoG2TjRppg1iALzNtAd0JqYyADw9FsRSNq9PCWJfGW6/rDDzK2ss0 X-Received: by 2002:a05:620a:124b:b0:790:888e:4c5a with SMTP id a11-20020a05620a124b00b00790888e4c5amr4121317qkl.34.1714161009424; Fri, 26 Apr 2024 12:50:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714161009; cv=none; d=google.com; s=arc-20160816; b=GMVMoyRijMicz7SRc5MLCEA7dCCr6sYbTuNzkKT0lLUeJWr9Y9lxKRSXroTflyRDyi Sn1jJ8VbgqQmxzDqCVMP49mWb1h0Phhve1LRotBi8ytPU6Ch4XYfRSYwmeCdVDZoHixV lXzrPvDwe7K4EBWDzL44k0EAi66r7Ifg0rDCdeQLVy3q+F8Cdg7V9SJzeI0A4vDnU03O 9chvYz/GhmjlqdEjykEkjPbMg1QjvdEU8ORm3ypIi0u9BgX4cMg8OoCZ6fQIeSz+WqwC A9PBHlMdm4YMdl9qmDTDT6rXe2KIxOG/JWVhMnNBxFdE2AoeY2qcHywDLFTDwMywzFnH TLew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IXDAwLQsv2ww5TZLeRIWY1HIfD/SnMqDRj2dwvAIHgY=; fh=gUEsd95llBLtqUKhUnPIoHQ/SNwiv/bmtZ7rMzFWY9Q=; b=l487jWgUdiLmRFQMPoSLWHqpnBBgodhodefQoQBWhW9jkTMGtXkCXjL70L3PAf3r+s meUA1MNL8iscjisTSgbbRUgu7FKLuheWr/11PvodsdlL1cmVmfKYEusAts+XU7u38RBg SCe3h5ZlKacf8iwPk8dqQ5HVKijA+kQpU2x83nfOZzs3b0VVYsGc10S9+LguSNcklBLp AZBaaOpE2dxd2B0VMSDHcoYerF0VOyNnP35wRNygj11AZFlsIQP/8f9rZzUuVKE4R/Qq WNM/5FRDJZPYtYYoA+5t70sIZnpU6EUOkIS3onoVyEW1DE5+Eh6I7kLi7Pm1BPQLQT6c IKSQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zu0zykhT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id cd19-20020a170906b35300b00a4673706b4dsm10888091ejb.78.2024.04.26.12.45.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 33/38] exec: Restrict 'cpu_ldst.h' to TCG accelerator Date: Fri, 26 Apr 2024 21:41:53 +0200 Message-ID: <20240426194200.43723-34-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=philmd@linaro.org; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "exec/cpu_ldst.h" is specific to TCG, do not allow its inclusion from other accelerators. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-6-philmd@linaro.org> --- include/exec/cpu_ldst.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 5b99666702..f3c2a3ca74 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -1,5 +1,5 @@ /* - * Software MMU support + * Software MMU support (per-target) * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public @@ -62,6 +62,10 @@ #ifndef CPU_LDST_H #define CPU_LDST_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/memopidx.h" #include "exec/abi_ptr.h" #include "exec/mmu-access-type.h" From patchwork Fri Apr 26 19:41:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792363 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626244wrh; Fri, 26 Apr 2024 12:47:29 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXr6kE+OHfiMBhv90MVvsGZVIXzrPp1kPWKWd1GXuTnPSha9ZJqI4yrrV+gvz2LfPR3UbZj/T1jvXI14vO1X34A X-Google-Smtp-Source: AGHT+IFuEHJ7xIsQgAyRPwSYoV772lDlTV4WOrRXsj7I0KU3iwgScIMzPkJYu9enr0OIG1r1lqjG X-Received: by 2002:aca:1305:0:b0:3c7:5539:5633 with SMTP id e5-20020aca1305000000b003c755395633mr3888027oii.36.1714160849007; Fri, 26 Apr 2024 12:47:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160848; cv=none; d=google.com; s=arc-20160816; b=r5Q8fnuaaaIzR8knWFhPV6/8mA3PsgKpqIkuYeehxhczldaYk04QeqcreRaLyMBRr5 xInLLXjS4T7SvH+eD1MFHZPN+X8r/tdstvBhYM99+pSBkaNKyaLyAe+gBek8JxgNw+Ok cbLObaZ0TchBOa85XjOC4a04yQB2J5lD/zAD0YNY4jTZSE49Ps0FMLWsTPHW0O5fC43h 1AZ6QVKmOnmVz7eyu3ggAAhiyosQMi6CKgbMkZ8iDCzmHLqTzzyqNChMD2qC9vQmgV6F cmfTijATzaTs98OMDtXXUzT77P2EfHteB9BZaVBXUFxakb5zEUBmTKqAOHh1ygNVb8JP J7Tw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bzDVxW+21MsfKgGbGkgEmh47Dcww+z+68N+3YiFHARY=; fh=ZOQHQHwB41A+wOMTUQbdDSrQAgLvz5JLhjlv9rNMVPY=; b=vIvG0Q3qJlaXhZ+qCIMLZulA57yMr77xQeCGapiPm2pe/BUdU1TAZZEB8iujT6yn5T szSXmKe3jNvFKOAOOgmYoNXDM82Ylwvy/hiEXBa71tZRxrD9lHvYnBdY7PJty6qKOYO4 CVqeKudzwsabjSur6mxF66nmffKzwTAmhaRJW/YV4EemST6cJSxRKUoTcwUEXSmG7CQL zVHDCESbMZAV+9gheprYB1pg6uIaPSYsXFJJ+IyqPsSEi5pIolmbuZ+RpnJfi+oLwcRq 50+it667NKXRG44Vyyivlyv0yoiJP6B4cdfLcN/Y33HQCqf25/3P9Yes/DAGuX0XpikL fJJA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aU4oToG0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id z2-20020a1709063ac200b00a4e1a9e1ab4sm10875255ejd.157.2024.04.26.12.45.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini , Riku Voipio Subject: [PULL 34/38] exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h' Date: Fri, 26 Apr 2024 21:41:54 +0200 Message-ID: <20240426194200.43723-35-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The include/user/ directory contains the user-emulation specific headers. Move guest-base.h there too. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20240418192525.97451-15-philmd@linaro.org> --- include/exec/cpu-all.h | 2 +- include/{exec => }/user/guest-base.h | 4 ++-- tcg/tcg.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) rename include/{exec => }/user/guest-base.h (72%) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 78848f018c..027f19e052 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -65,7 +65,7 @@ #if defined(CONFIG_USER_ONLY) #include "exec/user/abitypes.h" -#include "exec/user/guest-base.h" +#include "user/guest-base.h" extern bool have_guest_base; diff --git a/include/exec/user/guest-base.h b/include/user/guest-base.h similarity index 72% rename from include/exec/user/guest-base.h rename to include/user/guest-base.h index afe2ab7fbb..1e42bca5db 100644 --- a/include/exec/user/guest-base.h +++ b/include/user/guest-base.h @@ -4,8 +4,8 @@ * Copyright (c) 2003 Fabrice Bellard */ -#ifndef EXEC_USER_GUEST_BASE_H -#define EXEC_USER_GUEST_BASE_H +#ifndef USER_GUEST_BASE_H +#define USER_GUEST_BASE_H extern uintptr_t guest_base; diff --git a/tcg/tcg.c b/tcg/tcg.c index 0c0bb9d169..6a32656cd4 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -57,7 +57,7 @@ #include "tcg-internal.h" #include "tcg/perf.h" #ifdef CONFIG_USER_ONLY -#include "exec/user/guest-base.h" +#include "user/guest-base.h" #endif /* Forward declarations for functions declared in tcg-target.c.inc and From patchwork Fri Apr 26 19:41:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792379 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627373wrh; Fri, 26 Apr 2024 12:50:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUmlwew8Uyhey1kHyggHDUjb/LdnwNQrahP0h7vdlHQmLD8eQ9OLy03gpkt7tIKHvSGQBsxAC8DkCKSgtVWha4S X-Google-Smtp-Source: AGHT+IFVqxc/FztW86Vgkn8tw/iT85ZkaP+zndHvuMYmzVumz8Vq1rOsRWyfQcnJ0K+ESRqD7kn2 X-Received: by 2002:a05:6359:5097:b0:18a:5676:2fd0 with SMTP id on23-20020a056359509700b0018a56762fd0mr3838485rwb.10.1714161058657; Fri, 26 Apr 2024 12:50:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714161058; cv=none; d=google.com; s=arc-20160816; b=AF4uYGb9DTlq7MPBHHZD+4miqfw2D40sr29RWJ1SrliTjEFipbU9bJmrWn424cnaJV uu5zEEOjxWH1ZgzTqkJnjEBZvQT25yujI8ese9gDAKg6hFPTLaFZbWuIKjxlcDcAXr0A r+xGo9Lb5KAMwnM9VrNqT+Ul21NYlnslUjPHIm/7QMcP/37YDJfeUgF7LJnb3Hbg5HRs d24pnZ+ef2nUsJui5QoiQKsH/1FUSV3cjz3rtvSiehN1Jpy9jiElFyL9edq9VtKvKC27 qu6Wep6O9VUD4G3n2ncgkXa7KmOq64NY+gvwP4by/32syeC1rdUtPvw4SoXtsoPliR0S AGxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Z+2jDyZubLtcgNSevFNEEciw6F0x1NCcSU5rQYS3oAw=; fh=Pw2rna1XKA6Q6oVrBm5QfqVdprGO4k4MCabOwh7/beA=; b=E+IrOlFTTbs9OlkMfNpM5jUcIojvX0QiHBXrKJXejwposKUHKQLXcK7UOQu8+2w4X8 YZcEyFZCWoJZ6rdItMJ+8tAoLxUgiADiRSn0a1IIoswXfgWjPCtUi0ktJGb+yvdhBN/a 3dd+E49NclKYtEnUG1/6iUDSLp5PXFs0V/nzBa7qu9fxJ3z+hmbAI0zzWh2KljJFyWKi 7QewFCMeUaazJKjtzpQvoyz6EB00GNjeOQ1taewZGdKApkc1U85ifqZQEEYX3QEzR98U CZqhli+IJ1T3vYxr/+EKuk1/Dxd7EiBu+xNhxNPGu+1+O2wj3CHAcn5okBRztaG++F64 LETQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UhjCGqBE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id l10-20020a056402124a00b00571bec923bcsm10012663edw.93.2024.04.26.12.45.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Anton Johansson , Warner Losh , Kyle Evans , Paolo Bonzini , Riku Voipio , Laurent Vivier Subject: [PULL 35/38] exec: Restrict inclusion of 'user/guest-base.h' Date: Fri, 26 Apr 2024 21:41:55 +0200 Message-ID: <20240426194200.43723-36-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::234; envelope-from=philmd@linaro.org; helo=mail-lj1-x234.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Declare 'have_guest_base' in "user/guest-base.h". Very few files require this header, so explicitly include it there instead of "exec/cpu-all.h" which is used in many source files. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-23-philmd@linaro.org> Reviewed-by: Anton Johansson --- include/exec/cpu-all.h | 3 --- include/exec/cpu_ldst.h | 2 ++ include/user/guest-base.h | 6 ++++++ bsd-user/main.c | 1 + linux-user/elfload.c | 1 + linux-user/main.c | 1 + 6 files changed, 11 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 027f19e052..e75ec13cd0 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -65,9 +65,6 @@ #if defined(CONFIG_USER_ONLY) #include "exec/user/abitypes.h" -#include "user/guest-base.h" - -extern bool have_guest_base; /* * If non-zero, the guest virtual address space is a contiguous subset diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index f3c2a3ca74..7d0a0412ad 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -74,6 +74,8 @@ #if defined(CONFIG_USER_ONLY) +#include "user/guest-base.h" + #ifndef TARGET_TAGGED_ADDRESSES static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) { diff --git a/include/user/guest-base.h b/include/user/guest-base.h index 1e42bca5db..055c1d14fe 100644 --- a/include/user/guest-base.h +++ b/include/user/guest-base.h @@ -7,6 +7,12 @@ #ifndef USER_GUEST_BASE_H #define USER_GUEST_BASE_H +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + extern uintptr_t guest_base; +extern bool have_guest_base; + #endif diff --git a/bsd-user/main.c b/bsd-user/main.c index 01b313756e..29a629d877 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -36,6 +36,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "exec/exec-all.h" +#include "user/guest-base.h" #include "tcg/startup.h" #include "qemu/timer.h" #include "qemu/envlist.h" diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 207455c1ba..f9461d2844 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -8,6 +8,7 @@ #include "qemu.h" #include "user/tswap-target.h" +#include "user/guest-base.h" #include "user-internals.h" #include "signal-common.h" #include "loader.h" diff --git a/linux-user/main.c b/linux-user/main.c index 149e35432e..94e4c47f05 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -38,6 +38,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "qemu/plugin.h" +#include "user/guest-base.h" #include "exec/exec-all.h" #include "exec/gdbstub.h" #include "gdbstub/user.h" From patchwork Fri Apr 26 19:41:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792368 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp626393wrh; Fri, 26 Apr 2024 12:47:50 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWLg1VHAaT/7qhxVdBGr6UhUXXL3kBVgjdnu5R24PEq4ElJ3NjrNkKX70ZD6gPdqI0FpxxMmjaCkcFT66EQLY/e X-Google-Smtp-Source: AGHT+IFyKYI/Y03wpAZiUU52xmRJ9EjAwWOGSBK6zRiKeJ2jecKrAPKPqBRNDmjNZA86R//MofEX X-Received: by 2002:a05:6214:c2f:b0:6a0:9049:d663 with SMTP id a15-20020a0562140c2f00b006a09049d663mr4773299qvd.26.1714160870352; Fri, 26 Apr 2024 12:47:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714160870; cv=none; d=google.com; s=arc-20160816; b=Dj1TLd7al5mrEkWvvP0lTBachYZlO2ZohJesLbS0TFcEJjYJv01w1kHH+V0sZVHOAe fixLAY7NRy0j7M7Mo3g275NXr7Ade4dV+s9XeHCPDue4eZ5NQRPYYHJH4+rsegDsA8Zx qMthTf/d4dEm+9lfoPXdWu3wXEfx7cPI5KE8tnHAp7CgcBORtUtPpbqLJiBB5i5MxP6a yQaUIWxbmU4KeVG893FpVjuIZyncmWwu1ygYibCvBPVMWTjJw3lw8qrR+3AX+FQspqzB c36DOtfeugfykr3h5+Fb9Fgy9bdMLmYvZjS2YZRnSVxMqzR2KZhEP37b0ypHHMSByM4C +T+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=1K8YiKF1aId8lywgtec1SE+/hOSGvJR5IQSEQZIayng=; fh=gUEsd95llBLtqUKhUnPIoHQ/SNwiv/bmtZ7rMzFWY9Q=; b=qtKSjj6GYAnqzlIie7+2GUWPnKBaiJ2AbB8DvD+n6ZRWm1B9eWu2YLPWho5UUVT5ZI YkM76M/7IWZBCXsYN3W5EFOyCkngu3R/fk29qNnjzrrcEIYnKSR3WuaGXoAwKlP7hqTg YTtamRYe7hbDAxPMlKNgtoPUEGds/DWKNX7Z6/KSARNLbCC4gyw7VjSRHMDvnOlGW5Yj uVl9qi2ooCoGet1ZF5slvIDnYlZ5IxnNGMHVPVCJAtVh9EMPIjWaASrruf/oWcbPZ0Dx y8NMKSXqS2xtTbliRc72Fzoo1J6VEz1x0JJ4rIVBBwcba0J7cz6hxvHqaEWCI1to7E7k yV0Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ivfiCW9h; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id fk6-20020a056402398600b00571ba529bbasm10313860edb.44.2024.04.26.12.45.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 36/38] exec: Move CPUTLBEntry helpers to cputlb.c Date: Fri, 26 Apr 2024 21:41:56 +0200 Message-ID: <20240426194200.43723-37-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=philmd@linaro.org; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c: - tlb_index() - tlb_entry() - tlb_read_idx() - tlb_addr_write() Move them to this file, allowing to remove the huge "cpu.h" header inclusion from "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-13-philmd@linaro.org> --- include/exec/cpu_ldst.h | 55 ----------------------------------------- accel/tcg/cputlb.c | 51 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 55 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 7d0a0412ad..11ba3778ba 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -70,7 +70,6 @@ #include "exec/abi_ptr.h" #include "exec/mmu-access-type.h" #include "qemu/int128.h" -#include "cpu.h" #if defined(CONFIG_USER_ONLY) @@ -296,60 +295,6 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -#if !defined(CONFIG_USER_ONLY) - -#include "tcg/oversized-guest.h" - -static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry, - MMUAccessType access_type) -{ - /* Do not rearrange the CPUTLBEntry structure members. */ - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) != - MMU_DATA_LOAD * sizeof(uint64_t)); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) != - MMU_DATA_STORE * sizeof(uint64_t)); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) != - MMU_INST_FETCH * sizeof(uint64_t)); - -#if TARGET_LONG_BITS == 32 - /* Use qatomic_read, in case of addr_write; only care about low bits. */ - const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type]; - ptr += HOST_BIG_ENDIAN; - return qatomic_read(ptr); -#else - const uint64_t *ptr = &entry->addr_idx[access_type]; -# if TCG_OVERSIZED_GUEST - return *ptr; -# else - /* ofs might correspond to .addr_write, so use qatomic_read */ - return qatomic_read(ptr); -# endif -#endif -} - -static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry) -{ - return tlb_read_idx(entry, MMU_DATA_STORE); -} - -/* Find the TLB index corresponding to the mmu_idx + address pair. */ -static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, - vaddr addr) -{ - uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS; - - return (addr >> TARGET_PAGE_BITS) & size_mask; -} - -/* Find the TLB entry corresponding to the mmu_idx + address pair. */ -static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, - vaddr addr) -{ - return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; -} - -#endif /* !defined(CONFIG_USER_ONLY) */ - #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data # define cpu_ldsw_data cpu_ldsw_be_data diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index e16d02a62c..953c437ba9 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -27,6 +27,9 @@ #include "exec/tb-flush.h" #include "exec/memory-internal.h" #include "exec/ram_addr.h" +#include "exec/mmu-access-type.h" +#include "exec/tlb-common.h" +#include "exec/vaddr.h" #include "tcg/tcg.h" #include "qemu/error-report.h" #include "exec/log.h" @@ -95,6 +98,54 @@ static inline size_t sizeof_tlb(CPUTLBDescFast *fast) return fast->mask + (1 << CPU_TLB_ENTRY_BITS); } +static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry, + MMUAccessType access_type) +{ + /* Do not rearrange the CPUTLBEntry structure members. */ + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) != + MMU_DATA_LOAD * sizeof(uint64_t)); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) != + MMU_DATA_STORE * sizeof(uint64_t)); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) != + MMU_INST_FETCH * sizeof(uint64_t)); + +#if TARGET_LONG_BITS == 32 + /* Use qatomic_read, in case of addr_write; only care about low bits. */ + const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type]; + ptr += HOST_BIG_ENDIAN; + return qatomic_read(ptr); +#else + const uint64_t *ptr = &entry->addr_idx[access_type]; +# if TCG_OVERSIZED_GUEST + return *ptr; +# else + /* ofs might correspond to .addr_write, so use qatomic_read */ + return qatomic_read(ptr); +# endif +#endif +} + +static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry) +{ + return tlb_read_idx(entry, MMU_DATA_STORE); +} + +/* Find the TLB index corresponding to the mmu_idx + address pair. */ +static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, + vaddr addr) +{ + uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS; + + return (addr >> TARGET_PAGE_BITS) & size_mask; +} + +/* Find the TLB entry corresponding to the mmu_idx + address pair. */ +static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, + vaddr addr) +{ + return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; +} + static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns, size_t max_entries) { From patchwork Fri Apr 26 19:41:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792380 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627385wrh; Fri, 26 Apr 2024 12:51:00 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXXGbP1Gq70uAITbCuriaHfgUE4qiEFuh0S0FUu26oidSvy71mrO0DBf0MYA5GjdKg8U1sT8PUTmZrIE+zhukMw X-Google-Smtp-Source: AGHT+IHEueqNTQH3E5Yz3nPbHbF4SHmDlBC+AlW7dQu13HqtxRI5BAjqtP7bAiR1P0Uez2jph+2R X-Received: by 2002:a05:620a:1a23:b0:790:adca:156b with SMTP id bk35-20020a05620a1a2300b00790adca156bmr2971656qkb.29.1714161059698; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id se12-20020a170906ce4c00b00a587271f77dsm5326419ejb.176.2024.04.26.12.45.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 37/38] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h' Date: Fri, 26 Apr 2024 21:41:57 +0200 Message-ID: <20240426194200.43723-38-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Only include what is required, avoiding the full CPUState API from the huge "hw/core/cpu.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-4-philmd@linaro.org> --- include/hw/core/tcg-cpu-ops.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index dc1f16a977..9387d38748 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -10,7 +10,11 @@ #ifndef TCG_CPU_OPS_H #define TCG_CPU_OPS_H -#include "hw/core/cpu.h" +#include "exec/breakpoint.h" +#include "exec/hwaddr.h" +#include "exec/memattrs.h" +#include "exec/mmu-access-type.h" +#include "exec/vaddr.h" struct TCGCPUOps { /** From patchwork Fri Apr 26 19:41:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792375 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp627124wrh; Fri, 26 Apr 2024 12:50:14 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW1M/Nbr4EK6pYLrJ6rgG2piHhRdnSNjBzFV8eGouT0Ual+WrdL1G/judPOVvsgASkkq/rzxEoMdChTKE6zpbjs X-Google-Smtp-Source: AGHT+IHE6pyryooSIAeQFMLur+YVRyFlPW/7pRKC0Rb/i4PyS3+yNw7RiW/tip2O/34kHb9tFcLM X-Received: by 2002:a05:622a:298e:b0:43a:357c:322a with SMTP id hd14-20020a05622a298e00b0043a357c322amr1326677qtb.34.1714161014314; Fri, 26 Apr 2024 12:50:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714161014; cv=none; d=google.com; s=arc-20160816; b=iszvA6++Hq2G70qfYsYtNVNwLhFSpd7d1u2uYx69PzvV3T74x6lt1G5lwOU4ZLd7nb 1F1b0H7Jgfp64HcFlMpHhlsFnj1Hylwy/jjQDBQlsSbNGK0iV9r1VL6EKAu/3EJqx2S6 QdiSZL32HiA6qxoRSCQ8CMf5l2qiFq1oEEkBBp03lRApmHRBocbncGh+d2mL4IZijN8v jipYIj1sc0tL1xi4Tby4plwy3UkYgb82Qs/NUhSSu2QXCGtSkhnSXcROPFwa4R5xcM8P 4XEncK1HhD8FH2B45h9tmE0+Dmiy9ZQhlKrFSqKDDutpEb3Q+pp+ZaIPyBAF4/DhQGVV YvaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=q7YRlrLoDVqcKqwJc5XUnzy4U8ujSMb/8xBf3PSdyhk=; fh=n3gkbBeRJa9ccDejgMfLQBEAuhbGXuRpY2MjR4eenmg=; b=IYbETFKosqtr1kNrwR1MxSOlmUOu1gWJ5/0Szf38Q68+myTpsc+bMDrYDRrbFGykwF Ztpe6hqy13mUHpGQWa1oY+rDBp2921flPRlxZS/sXXLQbWNHKN2u6DegbhBnHRj0u3gB SvqrDeXltBbIGGM3IDmBXEWGSI+0iDML4+LQn/18If6u2vI6Ah0ZkFSP+1ePRHudzOtg VwM0BMw6bpYS5bdhdfHh3vYowhPQc7vYhyZqd4YN57M7RjwTxa16lkS6iP8QkX+SuiWe dvyGhZZJgFUp+BtZIbI/J2140s2k53axodd92owtXeBNZguc8H6OsZuAmewzMVNo8+aj mLIA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MnmuAFn3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id g4-20020a056402320400b00572593ddf22sm854298eda.58.2024.04.26.12.45.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Pierrick Bouvier Subject: [PULL 38/38] plugins: Include missing 'qemu/bitmap.h' header Date: Fri, 26 Apr 2024 21:41:58 +0200 Message-ID: <20240426194200.43723-39-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12d; envelope-from=philmd@linaro.org; helo=mail-lf1-x12d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit c006147122 ("plugins: create CPUPluginState and migrate plugin_mask") "qemu/plugin.h" uses DECLARE_BITMAP(), which is declared in "qemu/bitmap.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240418192525.97451-19-philmd@linaro.org> --- include/qemu/plugin.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 12a96cea2a..41db748eda 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -13,6 +13,7 @@ #include "qemu/queue.h" #include "qemu/option.h" #include "qemu/plugin-event.h" +#include "qemu/bitmap.h" #include "exec/memopidx.h" #include "hw/core/cpu.h"